On 13 April 2016 at 17:28, Vincent Guittot wrote:
> On 13 April 2016 at 17:13, Dietmar Eggemann wrote:
>> On 10/04/16 23:36, Yuyang Du wrote:
>>> In __update_load_avg(), the current period is never complete. This
>>> basically leads to a slightly over-decayed average, say on average we
>>> have 5
On Wed, Apr 13, 2016 at 6:22 PM, James Morse wrote:
> Kcov causes the compiler to add a call to __sanitizer_cov_trace_pc() in
> every basic block. Ftrace patches in a call to _mcount() to each function
> it has annotated.
>
> Letting these mechanisms annotate each other is a bad thing. Break the
>
Hi James,
On Wed, Apr 13, 2016 at 6:12 PM, James Morse wrote:
> Hi Alex,
>
> On 12/04/16 12:17, Alexander Potapenko wrote:
>> I also wonder if we can, say, land the change to arch/arm64/Kconfig
>> separately from makefile changes that improve the precision or fix
>> certain build configurations.
On Wed, Apr 13, 2016 at 07:21:53PM +0300, Andy Shevchenko wrote:
> On Wed, 2016-04-13 at 21:47 +0530, Vinod Koul wrote:
> > On Wed, Apr 13, 2016 at 07:05:48PM +0300, Andy Shevchenko wrote:
> > > The old is still supported and benefit is apparently in unifying
> > > standard properties across the d
On 11.04.2016 18:44, Peter Griffin wrote:
Hi Mathias,
On Fri, 25 Mar 2016, Peter Griffin wrote:
Otherwise generic-xhci and xhci-platform which have no data get wrongly
detected as XHCI_PLAT_TYPE_MARVELL_ARMADA by xhci_plat_type_is().
This fixes a regression in v4.5 for STiH407 family SoC's wh
On Wed, 2016-04-13 at 10:15 -0500, Josh Poimboeuf wrote:
> On Wed, Apr 13, 2016 at 07:36:07AM -0500, Josh Poimboeuf wrote:
> > On Wed, Apr 13, 2016 at 02:12:25PM +0200, Denys Vlasenko wrote:
> > > On 04/13/2016 05:36 AM, Josh Poimboeuf wrote:
> > > > On Thu, Feb 04, 2016 at 08:45:35PM +0100, Denys
On 04/08/2016 11:44 PM, Andy Lutomirski wrote:
Feel free to ask for help on some of these details. user_64bit_mode
will be helpful too.
Hello again,
here are some questions on TIF_IA32 removal:
- in function intel_pmu_pebs_fixup_ip: there is need to
know if process was it native/compat mode f
On Tue, Apr 12, 2016 at 01:17:00PM +0200, Alexander Potapenko wrote:
> On Mon, Apr 4, 2016 at 7:30 PM, Dmitry Vyukov wrote:
> > I did not look at all boot crashes and hangs. The low level arch code
> > like interrupts and early bootstrap is not interesting in this
> > setting, so I just bisected d
On Wed, Apr 13, 2016 at 09:46:45AM +0300, Dan Carpenter wrote:
> My static checker complains that if create_strip_zones() fails then we
> use "priv_conf" without initializing it. Fix this by checking for
> failure.
It's more convenient setting '*private_conf = ERR_PTR(-ENOMEM);' at the
begining o
On Wed, Apr 13, 2016 at 09:58:05AM +0300, Jarkko Sakkinen wrote:
> > > It prevents everything including the kernel from issuing a command
> >
> >
> > That lock is not used to exclude kernel access. Read lock is only taken
> > for the user space device
2016-04-08 07:49-0500, Suravee Suthikulpanit:
> From: Suravee Suthikulpanit
>
> This patch introduces a new IOMMU interface, amd_iommu_update_ga(),
> which allows KVM (SVM) to update existing posted interrupt IOMMU IRTE when
> load/unload vcpu.
>
> Signed-off-by: Suravee Suthikulpanit
> ---
> d
On Wed, Apr 13, 2016 at 09:55:09AM -0700, James Bottomley wrote:
> On Wed, 2016-04-13 at 10:15 -0500, Josh Poimboeuf wrote:
> > On Wed, Apr 13, 2016 at 07:36:07AM -0500, Josh Poimboeuf wrote:
> > > On Wed, Apr 13, 2016 at 02:12:25PM +0200, Denys Vlasenko wrote:
> > > > On 04/13/2016 05:36 AM, Josh
On Wed, Apr 13, 2016 at 10:22:06AM +0300, Jarkko Sakkinen wrote:
> rmmod crashes the driver because tpm_chip_unregister() already sets ops
> to NULL. This commit fixes the issue by moving tpm2_shutdown() to
> tpm_chip_unregister(). This commit is also cleanup because it removes
> duplicate code fro
On Wednesday 13 April 2016 09:51 PM, Mark Brown wrote:
The patch
regulator: max8973: add support for junction thermal warning
has been applied to the regulator tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integr
Em Wed, Apr 13, 2016 at 08:21:03AM +, Wang Nan escreveu:
> This patch set is a preparation to support overwritable ring buffer.
> However, even without the kernel side core patch [1] is accept this
> patch set is still useful.
> With this patch set, perf switches output when receiving SIGUSR2
Since the pmic8xxx-pwrkey driver is already supported in the
qcom-apq8064.dtsi, and the pmic8xxx-pwrkey supports logic to
configure proper device shutdown when ps_hold goes low, it is
better to use that driver then a generic gpio button.
Thus this patch remove the gpio power key entry here, so we
On Tue, Apr 12, 2016 at 10:24:25PM -0700, Dan Williams wrote:
> On Tue, Apr 12, 2016 at 5:10 PM, Toshi Kani wrote:
> > After 'commit fc0c2028135c ("x86, pmem: use memcpy_mcsafe()
> > for memcpy_from_pmem()")', probing a PMEM device hits the BUG()
> > error below on X86_32 kernel.
> >
> > kernel B
On Tue, Apr 12, 2016 at 11:05:06AM +1000, Suraj Jitindar Singh wrote:
> Add a binding to Documentation/devicetree/bindings/powerpc/opal
> (oppanel-opal.txt) for the operator panel which is present on IBM
> pseries machines with FSPs.
>
> Signed-off-by: Suraj Jitindar Singh
> ---
> .../devicetree
Hi all,
this series is RFC but has already been tested on a sama5d2x xplained
board with the Atmel QSPI controller + Micron n25q128a13:
compatible = "micron,n25q128a13", "jedec,spi-nor";
This first 3 patches of the series are stable and have already been
submitted to linux-mtd. They are required
This patch provides an alternative mean to support memory above 16MiB
(128Mib) by replacing 3byte address op codes by their associated 4byte
address versions.
Using the dedicated 4byte address op codes doesn't change the internal
state of the SPI NOR memory as opposed to using other means such as
Some SPI memories like Macronix MX25L25635E and MX25L25673G share the very
same JEDEC ID with no ext ID but provide different hardware capabilities.
For instance, the 35E revision doesn't support the dedicated 4byte address
opcodes for (Fast) Read, Page Program and Sector Erase operations whereas
t
On Wed, Apr 13, 2016 at 09:59:00AM +0200, Giuseppe CAVALLARO wrote:
> On 4/13/2016 8:15 AM, Mark Brown wrote:
> >>>+static void st_get_satinize_powerup_voltage(struct st_vsense *vsense)
> >>>+{
> >or am I missing something? Why do we need to do this anyway, it's very
> >surprsing?
> This functio
The quad (or dual) mode of a spi-nor memory may be enabled at boot time by
non-volatile bits in some setting register. Also such a mode may have
already been enabled at early stage by some boot loader.
Hence, we should not guess the spi-nor memory is always configured for the
regular SPI 1-1-1 pro
On 13/04/16 18:16, John Stultz wrote:
Since the pmic8xxx-pwrkey driver is already supported in the
qcom-apq8064.dtsi, and the pmic8xxx-pwrkey supports logic to
configure proper device shutdown when ps_hold goes low, it is
better to use that driver then a generic gpio button.
Thus this patch re
Before this patch, m25p80_read() supported few SPI protocols:
- regular SPI 1-1-1
- SPI Dual Output 1-1-2
- SPI Quad Output 1-1-4
On the other hand, all other m25p80_*() hooks only supported SPI 1-1-1.
However once their Quad mode enabled, Micron and Macronix spi-nor memories
expect all commands t
The Macronix MX25L25635E and MX25L25673G share the same JEDEC ID, C22019,
with no extended ID to differenciate them at runtime.
However, the 73G supports dedicated 4byte address op code for (Fast) Read,
Page Program and Sectore Erase Operation whereas the 35E doesn't.
So this patch adds a specifi
Signed-off-by: Cyrille Pitchen
---
drivers/mtd/spi-nor/spi-nor.c | 275 --
include/linux/mtd/spi-nor.h | 1 +
2 files changed, 265 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 3573cc708
This patch documents the DT bindings for the driver of the Atmel QSPI
controller embedded inside sama5d2x SoCs.
Signed-off-by: Cyrille Pitchen
Acked-by: Rob Herring
Acked-by: Nicolas Ferre
---
.../devicetree/bindings/mtd/atmel-quadspi.txt | 32 ++
1 file changed, 32 in
This driver add support to the new Atmel QSPI controller embedded into
sama5d2x SoCs. It expects a NOR memory to be connected to the QSPI
controller.
Signed-off-by: Cyrille Pitchen
Acked-by: Nicolas Ferre
---
drivers/mtd/spi-nor/Kconfig | 9 +
drivers/mtd/spi-nor/Makefile| 1
On Tue, Apr 12, 2016 at 08:35:18AM +0200, John Crispin wrote:
> The current binding document only describes a single interrupt. Update the
> document by adding the 2 other interrupts.
>
> The driver currently only uses a single interrupt. The HW is however able
> to using IRQ grouping to split TX
On Wed, Apr 13, 2016 at 10:24 AM, Sudeep Holla wrote:
>
>
> On 13/04/16 18:16, John Stultz wrote:
>>
>> Since the pmic8xxx-pwrkey driver is already supported in the
>> qcom-apq8064.dtsi, and the pmic8xxx-pwrkey supports logic to
>> configure proper device shutdown when ps_hold goes low, it is
>> b
On Tue, Apr 12, 2016 at 10:14:22AM +0100, Jose Abreu wrote:
> The ARC SDP I2S clock can be programmed using a
> specific PLL.
>
> This patch has the goal of adding a clock driver
> that programs this PLL.
>
> At this moment the rate values are hardcoded in
> a table but in the future it would be
On 29/03/16 00:27, Anup Patel wrote:
> This patchset primarily adds more PL330 and PL022 DT nodes for
> NS2 SVK. It also moves clock DT nodes to separate file to be
> consistent with other Broadcom SoCs DT files.
>
> The patchset is based on v4.6-rc1 tag and is available in ns2_dt3_v1
> branch of
On 04/12/2016 09:27 PM, Boris Ostrovsky wrote:
On 04/12/2016 07:15 PM, Stefano Stabellini wrote:
On Tue, 12 Apr 2016, Boris Ostrovsky wrote:
On 04/12/2016 05:56 PM, Stefano Stabellini wrote:
I am not sure, maybe you didn't have CONFIG_SPARSE_IRQ?
But I am certain that 4.6-rc2, with the atta
This patch adds dummy function for regmap_can_raw_write() in the header
file, so that the code can be atleast compiled without regmap enabled.
This kind of setup is mostly tested using randomconfig or zero
day-testing.
Signed-off-by: Srinivas Kandagatla
---
include/linux/regmap.h | 6 ++
1 f
With recent patch 922a9f936e40 ("regmap: mmio: Convert to regmap_bus
and fix accessor usage") nvmem providers based on regmap-mmio stopped
working, as nvmem core was using raw accessors.
This patch series adds new regmap_can_raw_read() api to check
if the regmap supports raw access. And the follow
With the recent patch of removing the raw accessors form regmap-mmio,
broke the qfprom support. This patch attempts to fix that regression
by adding check before calling regmap raw accessors functions.
Without this patch nvmem providers based on regmap mmio would not work.
Reported-by: Rajendra N
This patch adds regmap_can_raw_read() api so that users like nvmem can
check if the regmap is capable of doing a raw accessors. This can also
be used by other infrastructures like nvmem which are based on regmap.
Signed-off-by: Srinivas Kandagatla
---
drivers/base/regmap/regmap.c | 13 ++
On Wed, Apr 13, 2016 at 11:36:27PM +0900, Masanari Iida wrote:
> This patch fix spelling typos found in Documentation/Docbook/libata.xml.
> It is because the file was generated from comments in source,
> I had to fix comments in libata-core.c
>
> Signed-off-by: Masanari Iida
Applied to libata/fo
On Sat, 2016-04-02 at 14:57 +0800, Yingjoe Chen wrote:
> The debounce time unit for gpio_chip.set_debounce is us but
> mtk_gpio_set_debounce regard it as ms.
> Fix this by correct debounce time array dbnc_arr so it can find correct
> debounce setting. Debounce time for first debounce setting is 500
On Tue, Apr 12, 2016 at 08:02:17PM -0700, Jason Low wrote:
> For qspinlocks on ARM64, we would like to use WFE instead
> of purely spinning. Qspinlocks internally have lock
> contenders spin on an MCS lock.
>
> Update arch_mcs_spin_lock_contended() such that it uses
> the new smp_cond_load_acquire
On Sat, Apr 09, 2016 at 05:27:45PM +0530, Amitoj Kaur Chawla wrote:
> Replace deprecated create_singlethread_workqueue with
> alloc_ordered_workqueue.
>
> Work items include getting tx/rx frame sizes, resetting MPI processor,
> setting asic recovery bit so ordering seems necessary as only one work
On 04/13/2016 11:03 AM, Christoph Lameter wrote:
On Tue, 12 Apr 2016, Waiman Long wrote:
List entry insertion is strictly per cpu. List deletion, however, can
happen in a cpu other than the one that did the insertion. So we still
need lock to protect the list. Because of that, there may still b
On 12/04/16 13:14, Christoffer Dall wrote:
On Mon, Apr 11, 2016 at 03:33:45PM +0100, Suzuki K Poulose wrote:
On 08/04/16 16:05, Christoffer Dall wrote:
On Mon, Apr 04, 2016 at 05:26:15PM +0100, Suzuki K Poulose wrote:
diff --git a/arch/arm64/include/asm/stage2_pgtable.h
b/arch/arm64/include
On 04/12/2016 10:09 PM, Boqun Feng wrote:
Hi Waiman,
On Tue, Apr 12, 2016 at 06:54:43PM -0400, Waiman Long wrote:
[...]
+
+/*
+ * Initialize the per-cpu list head
+ */
+int init_pcpu_list_head(struct pcpu_list_head **ppcpu_head)
+{
+ struct pcpu_list_head *pcpu_head = alloc_percpu(struct
On 04/13/2016 07:45 AM, Rafael J. Wysocki wrote:
>> I'm concerned generally with the latency to react to changes in
>> > required capacity due to remote wakeups, which are quite common on SMP
>> > platforms with shared cache. Unless the hook is called it could take
>> > up to a tick to react AFAICS
On Wed, Apr 13, 2016 at 10:02:40AM -0700, Shaohua Li wrote:
> On Wed, Apr 13, 2016 at 09:46:45AM +0300, Dan Carpenter wrote:
> > My static checker complains that if create_strip_zones() fails then we
> > use "priv_conf" without initializing it. Fix this by checking for
> > failure.
>
> It's more
simple-pwrseq and emmc-pwrseq drivers rely on platform_device
structure from of_find_device_by_node(), this works mostly. But, as there
is no driver associated with this devices, cases like default/init pinctrl
setup would never be performed by pwrseq. This becomes problem when the
gpios used in pw
This patch adds to_pwrseq_simple() macro to make the code more readable.
Signed-off-by: Srinivas Kandagatla
---
drivers/mmc/core/pwrseq_simple.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c
Just realized that I sent v3 patches long back with a title of v2, so resending
the v3 once again with proper version number.
Thanks for reviewing v2.
This patchset aims at converting the pwrseq devices to proper in drivers,
The issue is that on Qualcomm based platforms, most of the gpios require
This patch adds to_pwrseq_emmc() macro to make the code more readable.
Signed-off-by: Srinivas Kandagatla
---
drivers/mmc/core/pwrseq_emmc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/core/pwrseq_emmc.c b/drivers/mmc/core/pwrseq_emmc.c
index 4a82bc7..
On 04/11/2016 09:18 PM, tamizhchel...@codeaurora.org wrote:
> + qcom,msi_addr = <0x0b006040>;
> + qcom,msi_base = <0x50>;
Are these properties used? I couldn't find any usage in the driver but I
may have missed it.
--
Qualcomm Innovation Center, Inc. is a
Hello, Serge.
Sorry about the delay.
On Mon, Mar 21, 2016 at 06:41:33PM -0500, Serge E. Hallyn wrote:
> struct kernfs_syscall_ops {
> int (*remount_fs)(struct kernfs_root *root, int *flags, char *data);
> - int (*show_options)(struct seq_file *sf, struct kernfs_root *root);
> + int
On Wed, Apr 13, 2016 at 11:36 AM, Andrea Merello
wrote:
> According to Documentation/i2c/smbus-protocol, a smbus controller driver
> that wants to hook-in smbus extensions support, can call
> i2c_setup_smbus_alert(). There are very few drivers that are currently
> doing this.
>
> However the i2c-s
The driver was originally written by Gilad Avidov, but it's now
being supported by Timur Tabi.
Signed-off-by: Timur Tabi
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4851f02..8c580f8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9128
On Wed, 13 Apr 2016, Waiman Long wrote:
> I am fine with a name change. I am not that good in naming stuff. How about
> distributed and locked list, or dlock_list in short?
dlock_list sounds better.
On 04/13/2016 09:07 AM, Rafael J. Wysocki wrote:
> If you want to do remote updates, I guess that will require an
> irq_work to run the update on the target CPU, but then you'll probably
> want to neglect the rate limit on it as well, so it looks like a
> "need_update" flag in struc
This commit adds a new led_cdev flag LED_PANIC_INDICATOR, which
allows to mark a specific LED to be switched to the "panic"
trigger, on a kernel panic.
This is useful to allow the user to assign a regular trigger
to a given LED, and still blink that LED on a kernel panic.
Signed-off-by: Ezequiel
It's desirable to specify which LEDs are to be blinked on a kernel
panic. Therefore, introduce a devicetree boolean property to mark
which LEDs should be treated this way, if possible.
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/leds/common.txt | 3 +++
1 file changed, 3
As per commit 916fe619951f ("leds: trigger: Introduce a kernel
panic LED trigger"), the kernel now supports a new LED trigger
to hook on the panic blink.
However, the only way of using this is to dedicate a LED device
to this function.
To overcome this limitation, the present series introduces th
Calling a GPIO LEDs is quite likely to work even if the kernel
has paniced, so they are ideal to blink in this situation.
This commit adds support for the new "panic-indicator"
firmware property, allowing to mark a given LED to blink on
a kernel panic.
Signed-off-by: Ezequiel Garcia
---
drivers/
On Tue, Mar 29, 2016 at 06:07:09PM +0200, Nicolas Ferre wrote:
> Arnd, Olof, Kevin,
>
> Here again, some little update on the DT front. Nothing big nor surprising.
> As for the "soc" PR, it's not urgent and I can rebase this one as well if
> needed.
> More material will certainly stack on this la
Hi,
On 13/04/2016 at 10:00:51 -0700, Olof Johansson wrote :
> Note that your GPG key has expired, you might want to take care of that.
>
>
I think he did for the previous release, you may want to refresh your
keys.
> -Olof
>
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and An
>Variable lustre_profile_list is only used inside obd_config.c,
>better make it static
>
>Signed-off-by: Iban Rodriguez
Acked-by: James Simmons
>---
> drivers/staging/lustre/lustre/obdclass/obd_config.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/lustre/
Do not have the machine Kconfig entry point need to select
BRCMSTB_GISB_ARB, instead, just let it be default ARCH_BRCMSTB which is
a better way to deal with this. While at it, also make it default
BMIPS_GENERIC so the legacy MIPS-based STB platforms can benefit from
the same thing.
Signed-off-by:
On Sun, Mar 20, 2016 at 02:31:58PM +0100, Borislav Petkov wrote:
> On Sat, Mar 19, 2016 at 01:08:37AM +0100, Marc Haber wrote:
> > Booting Debian Linux, apt-get update, apt-get upgrade, and run aide
> > (which builds checksums for the entire filesystem, a rather disk-bound
> > activity).
>
> So I
On Tue, Mar 29, 2016 at 06:05:58PM +0200, Nicolas Ferre wrote:
> Arnd, Olof, Kevin,
>
> A little SoC update with this new chipid code. Pretty simple feature indeed.
> If you feel like waiting more material before taking this PR, not problem. I
> can also rebase it on another "-rc" if needed.
>
>
+++ Miroslav Benes [13/04/16 15:01 +0200]:
On Wed, 13 Apr 2016, Michael Ellerman wrote:
This series adds live patching support for powerpc (ppc64le only ATM).
It's unchanged since the version I posted on March 24, with the exception that
I've dropped the first patch, which was a testing-only p
On Sun, Mar 20, 2016 at 07:58:13PM +0100, Borislav Petkov wrote:
> So I'm not sure what even happens here yet. I haven't seen anything out
> of the ordinary in Marc's dmesg and I wasn't able to reproduce either.
> So would it be good to try with "npt=0"? Sure, why not.
npt=0 goes on the kernel com
Hi Dave,
few very small fixes for 4.6. All but one are either build fixes or
memory leaks. More info in the signed tag below.
Please let me know if there are any problems.
Kalle
The following changes since commit 9a3492194eca6253ae7ba93c7a402cecad7f1c94:
Merge branch 'AF_VSOCK-missed-wakeups
On Wed, Apr 13, 2016 at 09:08:36AM -0600, Toshi Kani wrote:
> > Could you do something like:
> >
> > #ifdef CONFIG_FS_DAX
> > struct page *read_dax_sector(struct block_device *bdev, sector_t n);
> > +unsigned long dax_get_unmapped_area(struct file *filp, unsigned long
> > addr,
> > +
> 11:56:36 +0200)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
> tags/perf-core-for-mingo-20160413
>
> for you to fetch changes up to 59247e33ff494e3643cdff54b64bf72575052b76:
>
> perf trace: Do not acce
On Mon, Apr 11, 2016 at 07:12:08AM +0200, Juergen Gross wrote:
> On 08/04/16 22:40, Luis R. Rodriguez wrote:
> > On Wed, Apr 06, 2016 at 10:40:08AM +0100, David Vrabel wrote:
> >> On 06/04/16 03:40, Luis R. Rodriguez wrote:
> >>>
> >>> * You don't need full EFI emulation
> >>
> >> I think needi
Hello, Petr.
(cc'ing Johannes)
On Wed, Apr 13, 2016 at 11:42:16AM +0200, Petr Mladek wrote:
...
> By other words, "memcg_move_char/2860" flushes a work. But it cannot
> get flushed because one worker is blocked and another one could not
> get created. All these operations are blocked by the very
On Fri, Mar 18, 2016 at 11:01:46AM +0100, Paolo Bonzini wrote:
> On 17/03/2016 19:11, Borislav Petkov wrote:
> > I'm going to try reproducing the issue on a less "important" machine
> > so that bisecting is less painful, but maybe you guys have an idea
> > what's going wrong here.
>
> No idea, sor
On Wed, Apr 13, 2016 at 08:19:05PM +0200, Alexandre Belloni wrote:
> Hi,
>
> On 13/04/2016 at 10:00:51 -0700, Olof Johansson wrote :
> > Note that your GPG key has expired, you might want to take care of that.
> >
> >
>
> I think he did for the previous release, you may want to refresh your
> k
On 13/04/16 04:59, Weidong Wang wrote:
> When tested the PHY SGMII Loopback,:
> 1.set the LOOPBACK bit,
> 2.set the autoneg to AUTONEG_DISABLE, it calls the
> genphy_setup_forced which will clear the bit.
>
> So just keep the LOOPBACK bit while setup forced mode.
Humm, it makes sense why we want
Quoting Tejun Heo (t...@kernel.org):
> Hello, Serge.
>
> Sorry about the delay.
>
> On Mon, Mar 21, 2016 at 06:41:33PM -0500, Serge E. Hallyn wrote:
> > struct kernfs_syscall_ops {
> > int (*remount_fs)(struct kernfs_root *root, int *flags, char *data);
> > - int (*show_options)(struct seq
On Wed, 13 Apr 2016 05:49:53 -0700
"Paul E. McKenney" wrote:
> We currently do
> not have a good way to tell which translations are no longer keeping up
> and thus need to be pruned, and we would need one.
So I have to play the devil's advocate a bit here... we don't currently
have a mechanism
On Wed, Apr 13, 2016 at 11:54:29AM +0200, Roger Pau Monné wrote:
> On Fri, Apr 08, 2016 at 11:58:54PM +0200, Luis R. Rodriguez wrote:
> > OK thanks for the clarification -- still no custom entries for Xen!
> > We should strive for that, at the very least.
> >
> > You do have a point about the lega
Hello, Serge.
On Wed, Apr 13, 2016 at 01:46:39PM -0500, Serge E. Hallyn wrote:
> It's not a leak of any information we're trying to hide. I realize
> something like 8 years have passed, but I still basically go by the
> ksummit guidance that containers are ok but the kernel's first priority
> is
ENOMANPAGE
On Wed, Apr 13, 2016 at 11:05:00AM +0100, George Dunlap wrote:
> On Tue, Apr 12, 2016 at 11:12 PM, Luis R. Rodriguez wrote:
> > Also, x86 does have a history of short DT use. Just pointing that its there
> > as
> > an option as well. I'll Cc you on some thread about that.
>
> I'm not sure how th
Hello,
On Thu, Apr 07, 2016 at 02:59:41PM -0700, Ben Greear wrote:
> This is from a modified 4.4.6+ kernel, with local patches. Git tree found
> below, but I don't think this lockup is related to any local changes we have
> made.
>
> http://dmz2.candelatech.com/?p=linux-4.4.dev.y/.git;a=summary
On Wed, 2016-04-13 at 14:22 -0400, Matthew Wilcox wrote:
> On Wed, Apr 13, 2016 at 09:08:36AM -0600, Toshi Kani wrote:
> >
> > >
> > > Could you do something like:
> > >
> > > #ifdef CONFIG_FS_DAX
> > > struct page *read_dax_sector(struct block_device *bdev, sector_t n);
> > > +unsigned long d
Quoting Tejun Heo (t...@kernel.org):
> Hello, Serge.
>
> On Wed, Apr 13, 2016 at 01:46:39PM -0500, Serge E. Hallyn wrote:
> > It's not a leak of any information we're trying to hide. I realize
> > something like 8 years have passed, but I still basically go by the
> > ksummit guidance that contai
Device is an integrated gyro/accel/magn and temperature sensor. The
device has two i2c/spi interfaces: one for the gyro and one for the
accel/magn/temp sensor.
Datasheet: http://www2.st.com/resource/en/datasheet/lsm9ds0.pdf
The patch uses existing iio st_sensor infrastructure and just adds a
bunc
On Wed, Apr 13, 2016 at 02:33:09PM -0400, Tejun Heo wrote:
> An easy solution would be to make lru_add_drain_all() use a
> WQ_MEM_RECLAIM workqueue. A better way would be making charge moving
> asynchronous similar to cpuset node migration but I don't know whether
> that's realistic. Will prep a
Before this change it was not possible to read the umask of the
current process from a shared library in a way that is safe if the
process uses multiple threads.
Define a variation of the umask system call with a flags parameter.
If flags=0 it behaves like the old umask call. If flags=UMASK_GET_M
Signed-off-by: Richard W.M. Jones
---
arch/x86/entry/syscalls/syscall_32.tbl | 1 +
arch/x86/entry/syscalls/syscall_64.tbl | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/x86/entry/syscalls/syscall_32.tbl
b/arch/x86/entry/syscalls/syscall_32.tbl
index b30dd81..ccf75ba 100644
--- a/arc
On Wed, Apr 13, 2016 at 11:52:53AM -0700, Davidlohr Bueso wrote:
> ENOMANPAGE
Where do man pages go? In the man-pages project?
Rich.
--
Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones
Read my programming and virtualization blog: http://rwmj.wordpress.com
libguestf
Signed-off-by: Richard W.M. Jones
---
tools/testing/selftests/Makefile | 1 +
tools/testing/selftests/fs/.gitignore | 1 +
tools/testing/selftests/fs/Makefile | 9
tools/testing/selftests/fs/umask2-tests.c | 77 +++
4 files changed, 88 insert
v3 -> v4:
- Rename the syscall: getumask becomes umask2.
- Add flags parameter, with one flag (UMASK_GET_MASK).
- Expand the rationale for this change in the first commit message.
- Add a selftest.
- Retest everything.
It's not possible to read the process umask wit
On Wed, Apr 13, 2016 at 12:46:22PM -0600, Jonathan Corbet wrote:
> On Wed, 13 Apr 2016 05:49:53 -0700
> "Paul E. McKenney" wrote:
>
> > We currently do
> > not have a good way to tell which translations are no longer keeping up
> > and thus need to be pruned, and we would need one.
>
> So I hav
On Wed, Apr 13, 2016 at 12:25:03PM +0200, Roger Pau Monné wrote:
> On Wed, Apr 13, 2016 at 12:12:25AM +0200, Luis R. Rodriguez wrote:
> [...]
> > Also, x86 does have a history of short DT use. Just pointing that its there
> > as
> > an option as well. I'll Cc you on some thread about that.
>
> I
On 04/13/2016 01:36 PM, Boris Ostrovsky wrote:
On 04/12/2016 09:27 PM, Boris Ostrovsky wrote:
On 04/12/2016 07:15 PM, Stefano Stabellini wrote:
On Tue, 12 Apr 2016, Boris Ostrovsky wrote:
On 04/12/2016 05:56 PM, Stefano Stabellini wrote:
I am not sure, maybe you didn't have CONFIG_SPARSE_I
- On Apr 13, 2016, at 3:06 PM, Richard W.M. Jones rjo...@redhat.com wrote:
> On Wed, Apr 13, 2016 at 11:52:53AM -0700, Davidlohr Bueso wrote:
>> ENOMANPAGE
>
> Where do man pages go? In the man-pages project?
Yes. I usually also put a rendered version of the man page after the
changelog of
Hello,
On Wed, Apr 13, 2016 at 02:01:52PM -0500, Serge E. Hallyn wrote:
> I don't think so - we could be in a cgroup namespace but still have
> access only to bind-mounted cgroups. So we need to compare the
> superblock dentry root field to the nsroot= value.
I see. No objection then.
Thanks.
On Wed, Apr 13, 2016 at 03:02:26PM -0400, Konrad Rzeszutek Wilk wrote:
> On Wed, Apr 13, 2016 at 08:50:10PM +0200, Luis R. Rodriguez wrote:
> > On Wed, Apr 13, 2016 at 11:54:29AM +0200, Roger Pau Monné wrote:
> > > On Fri, Apr 08, 2016 at 11:58:54PM +0200, Luis R. Rodriguez wrote:
> > > > OK thanks
On Wed, 2016-04-13 at 11:59 -0400, Tejun Heo wrote:
> Are you saying that you're aware that google or another big outfit is
> making active use of internal tasks competing against sibling cgroups
> for proportional CPU distribution? If so, can you please be more
> specific?
What I'm aware of is
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