In order to guarantee that readers don't race with trace enabling,
both should happen under the same mutex. Having two mutexes seems
like an overkill, considering that because of the above, they'll
have to be acquired together, around trace enabling and char device
opening.
This patch makes both
Right now it's possible to unload the msu driver while its character
device is open. Prevent it by setting fops::owner, which will result
in the module reference being held while the device node is open.
Signed-off-by: Alexander Shishkin
Reviewed-by: Laurent
Dear Sudeep,
On Tue, 19 Apr 2016 13:30:12 +0100 Sudeep Holla wrote:
> This patch adds appropriate callbacks to support ACPI Low Power Idle
> (LPI) on ARM64.
>
> It also selects ARCH_SUPPORTS_ACPI_PROCESSOR_LPI if ACPI is enabled
> on ARM64.
>
> Cc: Lorenzo Pieralisi
Some subdevices (MSU, PTI) need to register their own driver-specific
attribute groups. Provide a way for those to pass their attribute
groups to the core driver in their driver structure so that the
core can take care of creating and removing them.
Signed-off-by: Alexander Shishkin
Readability: a postfix increment is used on a pointer which is not
used anywhere afterwards, which may send the reader looking through
the function one extra time. Drop the unnecessary increment.
Reported-by: Alan Cox
Signed-off-by: Alexander Shishkin
The core intel_th driver allows subdevices to bring in their sysfs
attributes. Use this instead of taking care of them in probe and
remove.
Signed-off-by: Alexander Shishkin
Reviewed-by: Laurent Fert
---
If output subdevice driver is not loaded, activating it will try to
call its ->activate method and crash. Fix this by explicitly checking
for the driver.
Signed-off-by: Alexander Shishkin
Reviewed-by: Laurent Fert
---
Changing nr_dummies after the module has been loaded doesn't actually
change anything, so just make it read-only.
Reported-by: Alan Cox
Signed-off-by: Alexander Shishkin
Reviewed-by: Laurent Fert
---
Right now it's possible to unload the output subdevice's driver while
the capture to this output is active. Prevent this by holding the
output driver's module reference.
Signed-off-by: Alexander Shishkin
Reviewed-by: Laurent Fert
---
On Fri, 2016-04-15 at 10:31 +0100, Luis Henriques wrote:
> NOTE: 3.16.7-ckt27 release will be the last 3.16 stable kernel
> release provided by the Canonical kernel team. However, as
> previously announced [1], Ben Hutchings will continue to maintain it
> for the Debian 8 'jessie'.
[...]
Thanks
There are only 3 differences (not including the name) in the definitions
of the gic_chip and gic_eoimode1_chip structures. Instead of statically
defining the gic_eoimode1_chip structure, remove it and populate the
eoimode1 functions dynamically for the appropriate GIC irqchips.
Signed-off-by: Jon
Hi,
This patchset fix some issues and optimized some features for
the RK3399 clock controller in the development process.
Thanks.
Xing Zheng (6):
clk: rockchip: rk3399: export some necessary clock IDs
clk: rockchip: rk3399: add some frequencies on the PLL table
clk: rockchip: rk3399:
Some IRQ chips may be located in a power domain outside of the CPU
subsystem and hence will require device specific runtime power
management. In order to support such IRQ chips, add a pointer for a
device structure to the irq_chip structure, and if this pointer is
populated by the IRQ chip driver
On 19/02/16 09:44, John Crispin wrote:
This series adds support for the MT6323 PMIC and the MT2701/7623 SoC.
MT6323 is slightly different to the already supported PMIC. This series
makes a few changes to the code to allow easy addition of the new PMIC
and SoCs.
Changes in V6
* 4/11 - make
Hi,
On Thursday 24 March 2016 07:04:10 Ratna Manoj wrote:
> From: Ratna Manoj Bolla
>
> When a filesystem is mounted on a nbd device and on a disconnect, because
> of kill_bdev(), and resetting bdev size to zero, buffer_head mappings are
> getting destroyed under mounted
We export some clock IDs for the reference drivers need them.
Signed-off-by: Xing Zheng
---
drivers/clk/rockchip/clk-rk3399.c | 12 ++--
include/dt-bindings/clock/rk3399-cru.h |5 -
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git
On Thu, Apr 14, 2016 at 11:32:07AM -0700, Andy Lutomirski wrote:
> On Thu, Apr 14, 2016 at 11:10 AM, Dmitry Safonov
> wrote:
> > We can use user_64bit_mode(regs) here instead of thread flag
> > because we have full register frame.
> >
> > Signed-off-by: Dmitry Safonov
On 30/11/15 12:42, Sascha Hauer wrote:
This adds the thermal controller and auxadc nodes to the Mediatek MT8173
dtsi file.
Signed-off-by: Sascha Hauer
Reviewed-by: Daniel Kurtz
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 17
Commit-ID: 89e9e66ba1b3bde9d8ea90566c2aee20697ad681
Gitweb: http://git.kernel.org/tip/89e9e66ba1b3bde9d8ea90566c2aee20697ad681
Author: Sebastian Andrzej Siewior
AuthorDate: Fri, 15 Apr 2016 14:35:39 +0200
Committer: Thomas Gleixner
CommitDate:
On 04/18/2016 06:31 PM, Mark Brown wrote:
On Mon, Apr 18, 2016 at 04:48:27PM +0530, Bhuvanchandra DV wrote:
+++ b/Documentation/ABI/testing/sysfs-bus-spi-spidev
@@ -0,0 +1,8 @@
+What: /sys/bus/spi/drivers/spidev/new_id
+Date: March 2016
+Description:
+ This
On Tue, Apr 19, 2016 at 04:06:08PM +0100, Mark Rutland wrote:
> On Wed, Mar 09, 2016 at 05:21:03PM +0100, Jan Glauber wrote:
> > Provide "uncore" facilities for different non-CPU performance
> > counter units. Based on Intel/AMD uncore pmu support.
> >
> > The uncore drivers cover quite different
On Wed, Apr 20, 2016 at 04:21:17PM +0800, Wangnan (F) wrote:
>
>
> On 2016/4/20 15:59, Jiri Olsa wrote:
> >On Mon, Apr 18, 2016 at 02:55:29PM +, Wang Nan wrote:
> >>Without this patch, the last output doesn't have timestamp appended if
> >>--timestamp-filename is not explicitly provided. For
On 19/04/16 16:40, Arnaldo Carvalho de Melo wrote:
> Em Tue, Apr 19, 2016 at 11:17:27AM +0300, Andrey Ryabinin escreveu:
>> write_buildid() increments 'name_len' with intention to take into account
>> trailing zero byte. However, 'name_len' was already incremented in
>>
Hi Eric,
On 19/04/16 17:56, Eric Auger wrote:
Introduce a new DOMAIN_ATTR_MSI_MAPPING domain attribute. If supported,
this means the MSI addresses need to be mapped in the IOMMU.
x86 IOMMUs typically don't expose the attribute since on x86, MSI write
transaction addresses always are within the
On 19/04/16 17:56, Eric Auger wrote:
This patch introduces some new fields in the iommu_domain struct,
dedicated to reserved iova management.
In a similar way as DMA mapping IOVA window, we need to store
information related to a reserved IOVA window.
The reserved_iova_cookie will store the
On 04/14/2016 03:53 PM, Jisheng Zhang wrote:
If i2c_dw_probe() fail, we should call i2c_dw_plat_prepare_clk() to
disable and unprepare the clk, otherwise the clk enable and prepare
is left unbalanced.
Signed-off-by: Jisheng Zhang
---
On Wed, Apr 20, 2016 at 10:13 AM, Jiang Qiu wrote:
> This patchset adds gpio-signaled acpi events support for power button on
> hisilicon
> D02 board.
>
> The three patches respectively:
> - remove name from dwapb_port_property
> - convert device node to
6 16:03:24 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/ash/stm.git
tags/stm-for-greg-20160420
for you to fetch changes up to aaa3ca82286d53c5409d2c22204426c9ca419d8c:
intel_th: pci: Add Broxton-M SOC support (2016-04-19 22:5
On Tue, Apr 19, 2016 at 02:07:01PM -0700, Andy Lutomirski wrote:
> On Tue, Apr 19, 2016 at 1:54 PM, Michael S. Tsirkin wrote:
> > On Tue, Apr 19, 2016 at 01:27:29PM -0700, Andy Lutomirski wrote:
> >> On Tue, Apr 19, 2016 at 1:16 PM, Michael S. Tsirkin
> >>
On 04/20/16 10:37, Chris Wilson wrote:
> If the caller, in this case efivarfs_callback(), only provides sufficent
> room for the expanded utf8 and not enough to include the terminating NUL
> byte, that NUL byte is skipped. When the caller then interprets it as a
> string, it may then read from
Hi again,
Felipe Balbi writes:
> David Woodhouse writes:
>> On Tue, 2016-04-19 at 14:38 +0300, Felipe Balbi wrote:
>>>
>>> The reason for that I'm using a manually created platform_device and
>>> that misses dev->archdata which the
We don't need to many clocks enable after startup, to reduce some
power consumption.
Signed-off-by: Xing Zheng
---
drivers/clk/rockchip/clk-rk3399.c | 314 ++---
1 file changed, 157 insertions(+), 157 deletions(-)
diff --git
We need to declare that we enable all NOCs which are critical
clocks always and clearly and explicitly show that we have enabled
them at clk_summary.
We need to add some has been verified and required critical clocks
in the development process.
And the pclk_perilp1_noc is also add
This patch add some necessary frequencies for the RK3399 clock.
Signed-off-by: Xing Zheng
---
drivers/clk/rockchip/clk-rk3399.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3399.c
Hi Sinan,
We are working in Mellanox for a solution which
removes the vmap call and allocate contiguous memory (using dma_alloc_coherent).
Thanks,
Eran
On Tue, Apr 19, 2016 at 9:37 PM, Sinan Kaya wrote:
> On 4/19/2016 2:22 PM, Christoph Hellwig wrote:
>> What I think we
On Mon, Apr 18, 2016 at 01:38:14PM -0700, Stefan Agner wrote:
> Introduce bus_flags to specify display bus properties like signal
> polarities. This is useful for parallel display buses, e.g. to
> specify the pixel clock or data enable polarity.
>
> Suggested-by: Thierry Reding
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R
---
v2: rebased on linux-next 20160419 to
This patch updates the binding doc with clock description
for vdma.
Signed-off-by: Kedareswara rao Appana
---
Changes for v2:
--> Listed down all the clocks supported by the h/w
as suggested by the Datta.
--> Used IP clock names instead of shortcut clock names.
Hi Rafael,
On 13/04/16 06:52, Rafael J. Wysocki wrote:
On Tue, Apr 12, 2016 at 7:38 AM, Viresh Kumar wrote:
Hi Rafael,
On 15-03-16, 16:10, Dawei Chien wrote:
MT8173 cpufreq driver select of_cpufreq_power_cooling_register registering
cooling devices with dynamic
On 20/04/2016 at 10:31:06 +, Anurag Kumar Vulisha wrote :
> > Yeas, I understood that. But my question was whether the interrupt handling
> > was necessary at all.
> > Instead of waiting for an interrupt to set time_updated, can't you simply
> > read
> > RTC_INT_STS and check for the
On Wed, Apr 20, 2016 at 05:43:32PM +0530, Bhuvanchandra DV wrote:
> SPI drivers bind to the device as configured in DT, but in case of
> spidev(non DT approach) the device is not available in hand to bind the
> driver. So tried this approach of creating the device and then bind spidev.
> I agree
On 4/11/2016 7:50 PM, Stuart Yoder wrote:
> From: Horia Geanta
>
> dpseci objects < 4.0 are not coherent-- in spite of the fact
> that the MC reports them to be coherent in certain versions.
> Add a special case to set the no shareability flag for dpseci
> objects < 4.0.
>
On Wed, Apr 20, 2016 at 02:43:29PM +0200, Thomas Gleixner wrote:
> > So its semantically icky to have the two tasks running off the same
> > state and practically icky when you consider bandwidth inheritance --
> > where the boosted task wants to explicitly modify the state of the
> > booster.
> >
This adds support for mpu9150 explictly. This device includes a MPU60X0 and
AK8975 inside the same package. It also cleans the chip_type <=> hw_info
mappings which were just a mess.
Crestez Dan Leonard (5):
iio: inv_mpu6050: Cleanup hw_info mapping
iio: inv_mpu6050: Remove
b4ff8389ed14 is incomplete: relies on nr_legacy_irqs() to get the number
of legacy interrupts when actually nr_legacy_irqs() returns 0 after
probe_8259A(). Use NR_IRQS_LEGACY instead.
Signed-off-by: Stefano Stabellini
diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c
On Mon, Apr 11, 2016 at 03:51:00PM +0300, Andy Shevchenko wrote:
> This is combined series of two things:
> - split out the Intel LPSS specific driver from 8250_pci into 8250_lpss
> - enable DMA support on Intel Quark UART
>
> The patch has been tested on few Intel SoCs / platforms.
>
> This is
On 20/04/16 08:40, PC Liao wrote:
This patch adds second I2S connection to rt5650 codec for capture path on
mt8173-rt5650 machine driver.
Signed-off-by: PC Liao
---
.../devicetree/bindings/sound/mt8173-rt5650.txt|6 +++
sound/soc/mediatek/mt8173-rt5650.c
Hi Soren,
> -Original Message-
> From: Sören Brinkmann [mailto:soren.brinkm...@xilinx.com]
> Sent: Wednesday, April 20, 2016 7:58 PM
> To: Appana Durga Kedareswara Rao
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
>
Hi Soren,
> -Original Message-
> From: Sören Brinkmann [mailto:soren.brinkm...@xilinx.com]
> Sent: Wednesday, April 20, 2016 8:06 PM
> To: Appana Durga Kedareswara Rao
> Cc: robh...@kernel.org; pawel.m...@arm.com; mark.rutl...@arm.com;
> ijc+devicet...@hellion.org.uk;
On Wed, 20 Apr 2016 16:32:24 +0200,
Marcel Holtmann wrote:
>
> Hi Takashi,
>
> > hci_vhci driver creates a hci device object dynamically upon each
> > HCI_VENDOR_PKT write. Although it checks the already created object
> > and returns an error, it's still racy and may build multiple hci_dev
> >
We programe RTC time using SET_TIME_WRITE register and read the RTC
current time using CURRENT_TIME register. When we set the time by
writing into SET_TIME_WRITE Register and immediately try to read the
rtc time from CURRENT_TIME register, the previous old value is
returned instead of the new
On Wed, Apr 20, 2016 at 03:18:15PM +0200, Andreas Werner wrote:
> The num_cells variable is only used in the dev_dbg print,
> but we can directly use the ret variable which also includes the same
> value.
>
> Signed-off-by: Andreas Werner
> ---
> drivers/mcb/mcb-pci.c | 4
On Wed, Apr 20, 2016 at 03:17:55PM +0200, Andreas Werner wrote:
> Replaced ioremap with devm_ioremap and request_mem_region with
> devm_request_mem_region. This makes the code much more cleaner.
>
> Signed-off-by: Andreas Werner
> ---
> drivers/mcb/mcb-pci.c | 19
On Fri 08-04-16 02:31:47, Sergey Senozhatsky wrote:
> Change `synchronous' printk param to be RW, so user space
> can change printk mode back and forth to/from sync mode
> (which is considered to be more reliable).
>
> Signed-off-by: Sergey Senozhatsky
I finally
The clk32k clock is prepared and enabled in twl6040_power() but the clock
is left enabled in case of an error while it should be disable/unprepared.
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/twl6040.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
The clk_prepare_enable() function can fail so check the return
value and propagate the error in case of a failure.
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/twl6040.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select/deselect ops to be in terms of the i2c mux core
instead of the child adapter.
Add a mask to handle the case where not all child adapters should
cause a mux deselect to happen, now that there is a common
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select/deselect ops to be in terms of the i2c mux core
instead of the child adapter.
Signed-off-by: Peter Rosin
---
drivers/i2c/muxes/i2c-mux-pinctrl.c | 83
All i2c-muxes have a parent adapter and one or many child
adapters. A mux also has some means of selection. Previously,
this was stored per child adapter, but it is only needed
to keep track of this per mux.
Add an i2c mux core, that keeps track of this consistently.
Also add some glue for users
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select/deselect ops to be in terms of the i2c mux core
instead of the child adapter.
Signed-off-by: Peter Rosin
---
drivers/i2c/muxes/i2c-mux-pca9541.c | 58
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select/deselect ops to be in terms of the i2c mux core
instead of the child adapter.
Signed-off-by: Peter Rosin
---
drivers/i2c/muxes/i2c-arb-gpio-challenge.c | 47
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select/deselect ops to be in terms of the i2c mux core
instead of the child adapter.
Acked-by: Jonathan Cameron
Signed-off-by: Peter Rosin
---
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select/deselect ops to be in terms of the i2c mux core
instead of the child adapter.
Signed-off-by: Peter Rosin
---
drivers/i2c/muxes/i2c-mux-gpio.c | 55
Reviewed-by: Antti Palosaari
Signed-off-by: Peter Rosin
---
drivers/media/dvb-frontends/rtl2832_sdr.c | 302 +-
1 file changed, 132 insertions(+), 170 deletions(-)
diff --git a/drivers/media/dvb-frontends/rtl2832_sdr.c
The root i2c adapter lock is then no longer held by the i2c mux during
accesses behind the i2c gate, and such accesses need to take that lock
just like any other ordinary i2c accesses do.
So, declare the i2c gate mux-locked, and zap the code that makes the
unlocked i2c accesses and just use
Hi,
[auto build test WARNING on kvm/linux-next]
[also build test WARNING on v4.6-rc4 next-20160420]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Greg-Kurz/KVM-remove-buggy-vcpu-id-check
On Tue, Apr 19, 2016 at 05:09:59PM +0100, Jon Hunter wrote:
> On 19/04/16 16:40, Mark Brown wrote:
> > This is *really* weird. Why would we need the list lock to do a
> > device_register()?
> So I did not think that we would want someone to be able to
> look-up the regulator via
On 16-04-20 03:51 AM, Bob Stlt wrote:
Fixed codeing style formatting errors.
Signed-off-by: Bob Stlt
---
drivers/scsi/libiscsi.c | 90 -
1 file changed, 45 insertions(+), 45 deletions(-)
diff --git
On Wed, Apr 20, 2016 at 5:55 PM, Eric W. Biederman
wrote:
> Linus Torvalds writes:
>
>> On Tue, Apr 19, 2016 at 9:36 PM, Konstantin Khlebnikov
>> wrote:
>>> On Wed, Apr 20, 2016 at 6:04 AM, Eric W. Biederman
The
When doing a make allmodconfig, I hit the following compile error:
In file included from builtin-check.c:32:0:
elf.h:22:18: fatal error: gelf.h: No such file or directory
compilation terminated.
In file included from special.h:22:0,
from special.c:26:
elf.h:22:18: fatal error:
Use the fbdev deferred io support in drm_fb_helper.
The (struct fb_ops *)->fb_{fillrect,copyarea,imageblit} functions will
now be deferred in the same way that mmap damage is, instead of being
flushed directly.
This patch has only been compile tested.
Signed-off-by: Noralf Trønnes
Export fb_deferred_io_mmap so drivers can change vma->vm_page_prot.
When the framebuffer memory is allocated using dma_alloc_writecombine()
instead of vmalloc(), I get cache syncing problems.
This solves it:
static int drm_fbdev_cma_deferred_io_mmap(struct fb_info *info,
On Wed, Apr 20, 2016 at 04:37:51PM +0200, Alexandre Belloni wrote:
> On 04/05/2011 at 17:31:26 +0200, Wolfram Sang wrote :
> > The RTC core handles it since 6610e08 (RTC: Rework RTC code to use
> > timerqueue for events). So far, only the callbacks to the RTC core have
> > been removed, but not
On Wed, 20 Apr 2016, Liang, Kan wrote:
> > The stop of the box1 events disables the whole machinery on that node and
> > therefor the box0 event is wreckaged as well. Hmm?
> >
> Right. How about check the SKL_UNC_PERF_GLOBAL_CTL in enable_event? If it's
> cleared, we can reset it there. The
From: Andrew Goodbody
Date: Wed, 20 Apr 2016 08:49:34 +
> Sorry, I had no notification that this had happened. However I
> thought that the plan was to revert v1 and go with David Rivshin's
> patch instead. I'll see if I can create a revert in a little while.
On Tue, Apr 19, 2016 at 2:18 PM, wrote:
> From: Patrice Chotard
>
> Configures all GPIOs as output, in order to minimize power
> consumption when GPIOs are unused.
>
> Signed-off-by: Amelie DELAUNAY
> Signed-off-by:
* Andrew Goodbody [160420 07:51]:
> This reverts commit cfe255600154f0072d4a8695590dbd194dfd1aeb
>
> This can result in a "Unable to handle kernel paging request"
> during boot. This was due to using an uninitialised struct member,
> data->slaves.
Missing
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select/deselect ops to be in terms of the i2c mux core
instead of the child adapter.
Reviewed-by: Antti Palosaari
Signed-off-by: Peter Rosin
---
Allocate an explicit i2c mux core to handle parent and child adapters
etc. Update the select op to be in terms of the i2c mux core instead
of the child adapter.
Acked-by: Rob Herring
Signed-off-by: Peter Rosin
---
drivers/of/unittest.c | 37
> -Original Message-
> From: Horia Ioan Geanta Neag
> Sent: Wednesday, April 20, 2016 6:42 AM
> To: Stuart Yoder ; Jose Rivera
> Cc: gre...@linuxfoundation.org; de...@driverdev.osuosl.org;
> linux-kernel@vger.kernel.org;
> ag...@suse.de;
Now that drm_fb_helper gets deferred io support, the
drm_fb_helper_sys_{fillrect,copyarea,imageblit} functions will schedule
the worker that calls the deferred_io callback. This will break this
driver so use the sys_{fillrect,copyarea,imageblit} functions directly.
Signed-off-by: Noralf Trønnes
On Sun, Apr 17, 2016 at 08:43:29AM -0700, Srinivas Pandruvada wrote:
> Added one missing Haswell model.
Indeed, but when I compare with the table in events/intel/core.c I find
we also miss one Broadwell (86) model.
Would the below be correct for that?
---
arch/x86/events/intel/rapl.c | 13
This adds deferred io support if CONFIG_FB_DEFERRED_IO is enabled.
Accumulated fbdev framebuffer changes are signaled using the callback
(struct drm_framebuffer_funcs *)->dirty()
The drm_fb_helper_sys_*() functions will accumulate changes and
schedule fb_info.deferred_work _if_ fb_info.fbdefio is
We programe RTC time using SET_TIME_WRITE register and read the RTC
current time using CURRENT_TIME register. When we set the time by
writing into SET_TIME_WRITE Register and immediately try to read the
rtc time from CURRENT_TIME register, the previous old value is
returned instead of the new
On Thu, Apr 14, 2016 at 12:13:38AM -0700, Jason Low wrote:
> Use WFE to avoid most spinning with MCS spinlocks. This is implemented
> with the new cmpwait() mechanism for comparing and waiting for the MCS
> locked value to change using LDXR + WFE.
>
> Signed-off-by: Jason Low
On Wed, 20 Apr 2016 10:08:55 +0200,
Takashi Iwai wrote:
>
> On Wed, 20 Apr 2016 09:56:04 +0200,
> Dmitry Vyukov wrote:
> >
> > On Sun, Apr 3, 2016 at 8:33 AM, Takashi Iwai wrote:
> > >> >> It is not easily reproducible. I've hit several times while running
> > >> >> fuzzer for a
On 20/04/16 11:44, Robin Murphy wrote:
Hi Alex,
On 20/04/16 05:35, Alexandre Courbot wrote:
[...]
Bisection came down to 1733a2ad3674("drm/nouveau/device/pci: set as
non-CPU-coherent on ARM64"), and sure enough reverting that removes the
crash.
Thanks for taking the time to bisect this. And
On 2016/4/20 15:07, Naoya Horiguchi wrote:
> On Tue, Apr 19, 2016 at 07:13:34PM +0800, Xishi Qiu wrote:
>> /proc/sys/vm/memory_failure_early_kill
>>
>> 1: means kill all processes that have the corrupted and not reloadable page
>> mapped.
>> 0: means only unmap the corrupted page from all
On 2016/4/20 18:51, Xishi Qiu wrote:
> On 2016/4/20 15:07, Naoya Horiguchi wrote:
>
>> On Tue, Apr 19, 2016 at 07:13:34PM +0800, Xishi Qiu wrote:
>>> /proc/sys/vm/memory_failure_early_kill
>>>
>>> 1: means kill all processes that have the corrupted and not reloadable page
>>> mapped.
>>> 0:
Instead of passing the GIC index to the save/restore functions pass a
pointer to the GIC chip data. This will allow these save/restore
functions to be re-used by a platform driver where the GIC chip data
structure is allocated dynamically and so there is no applicable index
for identifying the
Add a driver for the Tegra-AGIC interrupt controller which is compatible
with the ARM GIC-400 interrupt controller.
The Tegra AGIC (Audio GIC) is part of the Audio Processing Engine (APE) on
Tegra210 and can route interrupts to either the GIC for the CPU subsystem
or the Audio DSP (ADSP) within
The Tegra AGIC interrupt controller is compatible with the ARM GIC-400
interrupt controller. The Tegra AGIC requires two clocks, namely the
"ape" (functional) and "apb2ape" (interface) clocks, to operate. Add
the compatible string and clock information for the AGIC to the GIC
device-tree binding
If the GIC initialisation fails, then currently we do not return an error
or clean-up afterwards. Although for root controllers, this failure may be
fatal anyway, for secondary controllers, it may not be fatal and so return
an error on failure and clean-up.
For non-banked GIC controllers, make
If we fail to map the address space for the GIC distributor or CPU
interface, then don't attempt to initialise the chip, just WARN and
return.
Signed-off-by: Jon Hunter
Acked-by: Marc Zyngier
---
drivers/irqchip/irq-gic.c | 8 ++--
1 file
To support GIC chips located in power-domains outside of the CPU subsystem
it is necessary to add a platform driver for these chips, so that the
probing of the chip can be deferred if resources, such as a power-domain,
is not yet available.
To re-use the code that initialises the GIC (found in
On Tue, Apr 19, 2016 at 11:02:50AM -0300, Gustavo Padovan wrote:
> Hi Rob,
>
> 2016-04-14 Rob Clark :
>
> > On Thu, Apr 14, 2016 at 1:48 PM, Gustavo Padovan
> > wrote:
> > > From: Gustavo Padovan
> > >
> > > Replace
On Thu, Apr 14, 2016 at 12:29:12PM -0700, Andy Lutomirski wrote:
> On Thu, Apr 14, 2016 at 11:10 AM, Dmitry Safonov
> wrote:
> > @@ -724,7 +727,7 @@ static int branch_type(unsigned long from, unsigned
> > long to, int abort)
> > * on 64-bit systems running
On Mon, Apr 18, 2016 at 01:04:53PM -0700, Tai Tri Nguyen wrote:
> >> +Required properties for MCB subnode:
> >> +- compatible : Shall be "apm,xgene-pmu-mcb".
> >> +- reg: First resource shall be the MCB PMU
> >> resource.
> >> +- index :
On Tue, Apr 19, 2016 at 03:24:50PM +0300, Alexey Brodkin wrote:
> As a pair to already existing drm_connector_unplug_all()
> (which we'll rename in this series to drm_connector_unregister_all())
> we're adding generic implementation of what is already done in some drivers
> for registering all
Hi Lars,
> -Original Message-
> From: Lars-Peter Clausen [mailto:l...@metafoo.de]
> Sent: Wednesday, April 20, 2016 4:45 PM
> To: Appana Durga Kedareswara Rao ; Shubhrajyoti Datta
>
> Cc: Rob Herring ; Pawel Moll
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