On 03/05/16 06:54, gre...@linuxfoundation.org wrote:
> On Wed, Mar 30, 2016 at 05:04:28AM +1100, Steven Haigh wrote:
>> Greg, please see below - this is probably more for you...
>>
>> On 03/29/2016 04:56 AM, Steven Haigh wrote:
>>>
>>> Interestingly enough, this just happened again - but on a diffe
Hi,
On Sun 01-05-16 07:55:31, NeilBrown wrote:
[...]
> One particular problem with your process-context idea is that it isn't
> inherited across threads.
> Steve Whitehouse's example in gfs shows how allocation dependencies can
> even cross into user space.
Hmm, I am still not sure I understand t
On Tue, May 03, 2016 at 08:07:39AM -0700, Greg KH wrote:
> On Tue, May 03, 2016 at 03:11:26PM +0200, Thierry Reding wrote:
> > On Tue, Mar 08, 2016 at 11:15:22PM +0800, Yi Zhang wrote:
> > > the driver_data may be used for sanity check, it fails the
> > > probe() if driver_data is NULL after it is
On 05/03/2016 03:05 AM, Baoquan He wrote:
> I have a tiny concern about phys_pmd_init(), both phys_pud_init and
> phys_pte_init name 2nd parameter as 'addr', phys_pmd_init use 'address'.
> If this can be changed to make them look consistent completist would
> have a good sleep from now on.
Yes, co
Hi Sebastian,
One patch you added yesterday unfortunately caused (at least) three
separate build problems with 32-bit ARM randconfig builds.
These three patches should make it all work again.
Arnd
Once the linear memory space has been mapped with 8Mb pages, as
seen in the related commit, we get 11 millions DTLB missed during
the reference 600s period. 77% of the misses are on user addresses
and 23% are on kernel addresses (1 fourth for linear address space
and 3 fourth for virtual address sp
Instead of using the first level page table to define mappings for
the linear memory space, we can use direct mapping from the TLB
handling routines. This has several advantages:
* No need to read the tables at each TLB miss
* No issue in 16k pages mode where the 1st level table maps 64 Mbytes
The
On Tue, May 03, 2016 at 02:44:49PM +, Shardar Mohammed wrote:
> Thanks for review. Please find my comments inline.
>
> > On 03/05/16 13:14, Shardar Shariff Md wrote:
> > > During DMA client(UART) stress testing, observed below crash:
> > >
> > > [ 167.041591] Unable to handle kernel paging re
On recent kernels, with some debug options like for instance
CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough
the kernel code fits in the first 8M.
Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M
at startup, allthough pinning TLB is not necessary for that.
We c
Enabling the omap ssi driver without COMMON_CLK results in a build failure:
drivers/hsi/controllers/omap_ssi_core.c: In function 'ssi_clk_event':
drivers/hsi/controllers/omap_ssi_core.c:304:7: error: 'PRE_RATE_CHANGE'
undeclared (first use in this function)
This adds a Kconfig dependency to avoi
The driver now uses some pinctrl functions, but fails
to build if PINCTRL is disabled because the respective
header files are only included indirectly:
drivers/hsi/controllers/omap_ssi_core.c: In function 'ssi_clk_event':
drivers/hsi/controllers/omap_ssi_core.c:317:4: error: implicit declaration o
After the clk change support, the ssi omap ssi core driver
now calls into the port driver to change fclk. This function
was previously inside of an #ifdef, because it was only used
when CONFIG_PM is enabled. Now it also gets used without
power management support:
drivers/hsi/built-in.o: In functio
We currently have two instances for trans_start, once in
net_device and once in netdev_queue.
This series removes trans_start from net_device.
Updates to dev->trans_start are replaced with updates to netdev queue 0.
This series is compile-tested only.
Replacement is done in 3 steps:
1. Replace r
trans_start exists twice:
- as member of net_device (legacy)
- as member of netdev_queue
In order to get rid of the legacy case, add a helper for the
dev->trans_update (this patch), then convert spots that do
dev->trans_start = jiffies
to use this helper (next patch).
This would then allow us t
a trans_start struct member exists twice:
- in struct net_device (legacy)
- in struct netdev_queue
Instead of open-coding dev->trans_start usage to obtain the current
trans_start value, use dev_trans_start() instead.
This is not exactly the same, as dev_trans_start also considers
the trans_start
use net_device directly. Compile tested, objdiff shows no changes.
Cc: linux-par...@vger.kernel.org
Signed-off-by: Florian Westphal
---
drivers/net/ethernet/dec/tulip/dmfe.c | 39 ---
1 file changed, 18 insertions(+), 21 deletions(-)
diff --git a/drivers/net/ethe
On Mon, 02 May, at 03:11:20PM, Peter Jones wrote:
> On Sun, May 01, 2016 at 12:21:05AM +0800, Wang YanQing wrote:
> > We can't just break out when meet start is equal to zero,
> > this will cause we miss valid address range in later BARs.
> >
> > On the other hand, it isn't enough to test start on
The ipv6 gre implementation was cleaned up to share more code
with the ipv4 version, but it can be enabled even when NET_IPGRE_DEMUX
is disabled, resulting in a link error:
net/built-in.o: In function `gre_rcv':
:(.text+0x17f5d0): undefined reference to `gre_parse_header'
ERROR: "gre_parse_header"
On Tue, May 03, 2016 at 05:09:37PM +0800, Wei Ni wrote:
> This patch changes the compatible of Tegra132 fuse node
> to "nvidia,tegra132-efuse", instead of "nvidia,tegra1124-efuse".
> Because the CONFIG_ARCH_TEGRA_124_SOC will not be enabled for
> Tegra132, the fuse driver can't find the correspondi
On Tue, May 3, 2016 at 8:19 AM, Arnd Bergmann wrote:
> The ipv6 gre implementation was cleaned up to share more code
> with the ipv4 version, but it can be enabled even when NET_IPGRE_DEMUX
> is disabled, resulting in a link error:
>
> net/built-in.o: In function `gre_rcv':
> :(.text+0x17f5d0): un
On Tue, 2016-05-03 at 15:40 +0200, Oleg Nesterov wrote:
> On 05/02, Andrew Morton wrote:
> >
> >
> > On Mon, 02 May 2016 23:17:41 +0300 Oleksandr Natalenko wrote:
> >
> > >
> > > rtsx_usb_ms creates a task that mostly sleeps, but tasks in
> > > uninterruptible sleep still contribute to the loa
A recent change to lightnvm added code to pass a kernel pointer
to the hardware, which gcc complained about:
drivers/nvme/host/lightnvm.c: In function 'nvme_nvm_rqtocmd':
drivers/nvme/host/lightnvm.c:472:32: error: cast from pointer to integer of
different size [-Werror=pointer-to-int-cast]
c->
On Tue 03-05-16 08:23:27, Jens Axboe wrote:
> On 05/03/2016 03:34 AM, Jan Kara wrote:
> >On Thu 28-04-16 12:53:50, Jens Axboe wrote:
> >>>2) As far as I can see in patch 8/8, you have plugged the throttling above
> >>>the IO scheduler. When there are e.g. multiple cgroups with different
> >>>
The newly added sun4i drm driver prints a dma address using the %x
format string, which cannot work when dma_addr_t is 64 bit,
and gcc warns about this configuration:
drm/sun4i/sun4i_backend.c: In function 'sun4i_backend_update_layer_buffer':
drm/sun4i/sun4i_backend.c:193:84: error: format '%x' ex
On 02/05/16 13:17, Laxman Dewangan wrote:
> Power Management Controller(PMC) of Tegra does the multiple chip
> power related functionality for internal and IO interfacing.
> Some of the functionalities are power gating of IP blocks, IO pads
> voltage and power state configuration, system power sta
A conflict of two patches caused a build error when a function got renamed
but a new user appeared in the other patch:
drivers/pinctrl/bcm/pinctrl-ns2-mux.c:540:17: error:
'pinctrl_utils_dt_free_map' undeclared here (not in a function)
.dt_free_map = pinctrl_utils_dt_free_map,
This patch set primarily updates the Linux kernel to support the next
generation SGI Ultraviolet system, UV4. This architecture change is a
larger incremental change than previous UV updates because of a major
change to the addressing scheme. Previous UV architectures used a fixed
address width
The newly added tegra xusb phy driver fails to link when CONFIG_PINCTRL
is disabled, since that also leaves out the legacy probe function:
ERROR: "tegra_xusb_padctl_legacy_probe" [drivers/phy/tegra/phy-tegra-xusb.ko]
undefined!
This adds a Kconfig dependency for it, depending on both
PINCTRL_TEG
Add defines to control which UV architectures are supported, and modify the
'if (is_uvX_*)' functions to return constant 0 for those not supported.
This will help optimize code paths when support for specific UV arches
is removed.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
Tested-b
Add preliminary UV4 defines.
Signed-off-by: Mike Travis
Tested-by: John Estabrook
Tested-by: Gary Kroening
Tested-by: Nathan Zimmer
---
arch/x86/include/asm/uv/uv_hub.h | 64 +++---
arch/x86/include/asm/uv/uv_mmrs.h | 22 +
2 files changed, 62
Clean up any redundancies caused by new UV4 MMR definitions superseding
any previously definitions local to functions.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
Reviewed-by: Andrew Banman
Tested-by: John Estabrook
Tested-by: Gary Kroening
Tested-by: Nathan Zimmer
---
arch/x86
Since UV3 and UV4 MMIOH regions are setup the same, we can use a common
function to setup both.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
Tested-by: John Estabrook
Tested-by: Gary Kroening
Tested-by: Nathan Zimmer
---
arch/x86/kernel/apic/x2apic_uv_x.c |3 ++-
1 file chang
nmk_gpio_get_mode is only used in one place, and that is conditionally
compiled if DEBUG_FS is enabled. A recent cleanup has marked the
definition 'static', which now leads to a warning:
drivers/pinctrl/nomadik/pinctrl-nomadik.c:614:12: error: 'nmk_gpio_get_mode'
defined but not used [-Werror=unu
Add UV4 specific defines to determine if current system type is a
UV4 system.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
Tested-by: John Estabrook
Tested-by: Gary Kroening
Tested-by: Nathan Zimmer
---
arch/x86/kernel/apic/x2apic_uv_x.c | 12 +---
1 file changed, 9 ins
This new function is generated by the UV MMR generation script to
identify MMR registers and fields that are not defined for a specific
UV architecture. With this switch, the immediate panic can be replaced
with a message and a bad return value allowing either hardware or the
emulator to diagnose
Cleanup patch to rearrange code and modify some defines so the next
patch, the new UV4 MMR definitions can be merged cleanly.
* Clean up the M/N related address constants (M is # of address bits per
blade, N is the # of blade selection bits per SSI/partition).
* Fix the lookup of the alias over
From: Dimitri Sivanich
Use no-op messages in place of cross-partition interrupts when nacking a
put message in the GRU. This allows us to remove MMR's as a destination
from the GRU driver.
Signed-off-by: Dimitri Sivanich
Signed-off-by: Mike Travis
Tested-by: John Estabrook
Tested-by: Gary Kr
Replace all trans_start updates with netif_trans_update helper.
change was done via spatch:
struct net_device *d;
@@
- d->trans_start = jiffies
+ netif_trans_update(d)
Compile tested only.
Cc: user-mode-linux-de...@lists.sourceforge.net
Cc: linux-xte...@linux-xtensa.org
Cc: linux1394-de...@lists
This patch builds support for the new conversions of physical addresses
to and from sockets, pnodes and nodes in UV4. It is designed to be as
efficient as possible as lookups are done inside an interrupt context
in some cases. It will be further optimized when physical hardware is
available to me
From: Dimitri Sivanich
This patch fixes the problem of incorrect nodes and pnodes being returned
when referring to nodes that either have no cpus (AKA "headless") or no
memory.
Signed-off-by: Dimitri Sivanich
Signed-off-by: Mike Travis
Tested-by: John Estabrook
Tested-by: Gary Kroening
Teste
Allocate and setup per node hub info structs. CPU 0/Node 0 hub info
is statically allocated to be accessible early in system startup. The
remaining hub info structs are allocated on the node's local memory,
and shared among the CPU's on that node. This leaves the small amount
of info unique to e
With the UV4 system architecture addressing changes, BIOS now provides
this information via an EFI system table. This is the initial decoding
of that system table. It also collects the sizing information for
later allocation of dynamic conversion tables.
Signed-off-by: Mike Travis
Reviewed-by:
Migrate references from the blade info structs to the per node hub info
structs. This phases out the allocation of the list of per blade info
structs on node 0, in favor of a per node hub info struct allocated on
the node's local memory.
There are also some minor cosemetic changes in the comments
UV4 uses a GAM (globally addressed memory) architecture that supports
variable sized memory per node. This replaces the old "M" value (number
of address bits per node) with a range table for conversions between
addresses and physical node (pnode) id's. This table is obtained from UV
BIOS via the
UV4 requires early system wide addressing values. This involves the use
of the CPUID instruction to obtain these values. The current function
(detect_extended_topology()) in the kernel has been copied and streamlined,
with the limitation that only CPU's used by UV architectures are supported.
Si
Change the references to the SCIR fields to the new per cpu info structs.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
Tested-by: John Estabrook
Tested-by: Gary Kroening
Tested-by: Nathan Zimmer
---
arch/x86/include/asm/uv/uv_hub.h | 17 ++---
arch/x86/kernel/apic
Move references to blade local processor ID to the new per cpu info
structs. Create an access function that makes this move, and other
potential moves opaque to callers of this function. Define a flag
that indicates to callers in external GPL modules that this function
replaces any local definiti
Fixes are based on patch https://patchwork.ozlabs.org/patch/612058/ which
is in Rafael's linux-next.
- Patch [1] fixes WARN_ON in powernv_target_index()
- Patch [2] Deleting any pending timer to saves an unnecessary irq call
in powernv_target_index()
Akshay Adiga (2):
cpufreq: powernv: Move sm
The major portion of the hub info is common to all cpus on that hub.
This is step one of moving the per cpu hub info to a per node hub info
struct. This patch creates the small per cpu info struct that will
contain only information specific to each CPU.
Signed-off-by: Mike Travis
Reviewed-by: Di
On 05/03/2016 09:22 AM, Jan Kara wrote:
On Tue 03-05-16 08:23:27, Jens Axboe wrote:
On 05/03/2016 03:34 AM, Jan Kara wrote:
On Thu 28-04-16 12:53:50, Jens Axboe wrote:
2) As far as I can see in patch 8/8, you have plugged the throttling above
the IO scheduler. When there are e.g. multiple
Fix a WARN_ON caused by smp_call_function_any() when irq is disabled,
because of changes made in the patch ('cpufreq: powernv: Ramp-down
global pstate slower than local-pstate')
https://patchwork.ozlabs.org/patch/612058/
WARNING: CPU: 0 PID: 4 at kernel/smp.c:291
smp_call_function_single+0x170/0
When global and local pstate are equal in a powernv_target_index() call,
we don't queue a timer. But we may have timer already queued for future.
This could cause the timer to fire one additional time for no use.
Signed-off-by: Akshay Adiga
---
Patch is based on Rafael's linux-next
drivers/cpufr
On Thu, 21 Apr, at 03:24:29PM, Julia Lawall wrote:
> The parameters atomic and duplicates of efivar_init always have opposite
> values. Drop the parameter atomic, replace the uses of !atomic with
> duplicates, and update the call sites accordingly.
>
> The code using duplicates is slightly reorga
On Sat 30-04-16 09:40:08, Dave Chinner wrote:
> On Fri, Apr 29, 2016 at 02:12:20PM +0200, Michal Hocko wrote:
[...]
> > - was it
> > "inconsistent {RECLAIM_FS-ON-[RW]} -> {IN-RECLAIM_FS-[WR]} usage"
> > or a different class reports?
>
> Typically that was involved, but it quite often there'd be a
Hi!
> We have been following and analyzing this technology since the first
> HASP paper was published detailing its development. We have been
(1)
>
> I told my associates the first time I reviewed this technology that
> SGX has the ability to be a bit of a Pandora's box and it seems to be
> fo
An aspect of the UV4 system architecture changes involve changing the
way sockets, nodes, and pnodes are translated between one another.
Decode the information from the BIOS provided EFI system table to build
the needed conversion tables.
Signed-off-by: Mike Travis
Reviewed-by: Dimitri Sivanich
2016-05-03 03:19+, Wanpeng Li:
> From: Wanpeng Li
>
> Guest should only trust data to be valid when version haven't changed
> before and after reads of steal time. Besides not changing, it has to
> be an even number. Hypervisor may write an odd number to version field
> to indicate that an
previous patches removed all direct accesses to dev->trans_start,
so change the netif_trans_update helper to update trans_start of
netdev queue 0 instead and then remove trans_start from struct net_device.
AFAICS a lot of the netif_trans_update() invocations are now useless
because they occur in n
On Tue 03-05-16 11:34:10, Jan Kara wrote:
> Yeah, once I'll hunt down that regression with old disk, I can have a look
> into how writeback throttling plays together with blkio-controller.
So I've tried the following script (note that you need cgroup v2 for
writeback IO to be throttled):
---
mkdi
On Tue, May 3, 2016 at 7:42 AM, David B. Robins wrote:
> On 2016-05-03 00:55, John Stultz wrote:
>>
>> Looking through the commits since the v4.1 kernel where we didn't see
>> this, I narrowed the regression down, and reverting the following two
>> commits seems to avoid the problem:
>>
>> 6a57081
On Mon, May 2, 2016 at 2:58 PM, Dave Hansen wrote:
> On 05/02/2016 02:41 PM, Thomas Garnier wrote:
>> Minor change that allows early boot physical mapping of PUD level virtual
>> addresses. This change prepares usage of different virtual addresses for
>> KASLR memory randomization. It has no impac
Enable the ChromeOS Embedded Controller, its I2C tunnel driver, and
the BA27XXX battery driver. These are all used on the Tegra210 Smaug
platform.
Signed-off-by: Rhyland Klein
---
arch/arm64/configs/defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/
Hi,
On 03/05/16 10:06, Jun Li wrote:
> Hi
>
> /**
> + * usb_gadget_start - start the usb gadget controller and
> +connect to bus
> + * @gadget: the gadget device to start
> + *
> + * This is external API for use by OTG core.
> + *
>
On 04/26/2016 01:02 PM, Peter Griffin wrote:
> Hi Mark,
>
> On Thu, 21 Apr 2016, Mark Brown wrote:
>
>> On Thu, Apr 21, 2016 at 12:04:26PM +0100, Peter Griffin wrote:
>>> uniperiph-id, version and mode are ST specific bindings and
>>> need the 'st,' prefix. Update the examples, as otherwise cop
On Wed, May 04, 2016 at 01:11:46AM +1000, Steven Haigh wrote:
> On 03/05/16 06:54, gre...@linuxfoundation.org wrote:
> > On Wed, Mar 30, 2016 at 05:04:28AM +1100, Steven Haigh wrote:
> >> Greg, please see below - this is probably more for you...
> >>
> >> On 03/29/2016 04:56 AM, Steven Haigh wrote:
On Tue 03-05-16 17:40:32, Jan Kara wrote:
> On Tue 03-05-16 11:34:10, Jan Kara wrote:
> > Yeah, once I'll hunt down that regression with old disk, I can have a look
> > into how writeback throttling plays together with blkio-controller.
>
> So I've tried the following script (note that you need cg
On Tuesday, May 3, 2016 at 4:14:41 PM UTC+3, Maxime Ripard wrote:
> Hi,
>
> On Tue, May 03, 2016 at 4:12:06 PM UTC+3, Christo Radev wrote:
> > Hi to All,
> >
> > I have already solved and tested this issue on Armbian build. Find
> > patches for both legacy (3.4.111) and mainline (4.5.2) kernels
On Tue, 2016-05-03 at 08:43 -0600, Ross Zwisler wrote:
> On Tue, May 03, 2016 at 11:00:21AM +0200, Jan Kara wrote:
> >
> > On Tue 03-05-16 01:44:10, Christoph Hellwig wrote:
> > >
> > > Please come up with a version that doesn't require tons of
> > > boilerplate code in every file system.
> >
> >
On 03/05/2016:10:07:48 AM, Timur Tabi wrote:
> Pratyush Anand wrote:
> >In fact after supporting max_hw_heartbeat_ms, there should be no change for
> >action=0 functionally. However, we would still need some changes for
> >action=1.
>
> IMHO, action=1 is more of a debugging option, and not someth
Hey all,
On 03-05-16 17:02, christo.ra...@gmail.com wrote:
On Tuesday, May 3, 2016 at 4:14:41 PM UTC+3, Maxime Ripard wrote:
Hi,
On Tue, May 03, 2016 at 4:12:06 PM UTC+3, Christo Radev wrote:
Hi to All,
I have already solved and tested this issue on Armbian build. Find
patches for both lega
On Tue, May 03, 2016 at 01:23:34PM +0200, Hannes Frederic Sowa wrote:
> On Tue, May 3, 2016, at 12:35, Richard Weinberger wrote:
> > On Tue, May 3, 2016 at 12:12 PM, Guillaume Nault
> > wrote:
> > > On Sun, May 01, 2016 at 09:38:57PM +0800, Wang Shanker wrote:
> > >> static int ppp_open(struct ino
Andreas Dilger wrote:
> > STATX_INFO_ENCRYPTEDFile is encrypted
>
> This flag overlaps with FS_ENCRYPT_FL that is encoded in the FS_IOC_GETFLAGS
> attributes. Are the FS_* flags expected to be translated into STATX_INFO_*
> flags by each filesystem, or will they be partly duplic
Hello, Aleksa.
On Tue, May 03, 2016 at 11:52:22AM +1000, Aleksa Sarai wrote:
> However, I agree with James that this patchset isn't ideal (it was my first
> rough attempt). I think I'll get to work on properly virtualising
> /sys/fs/cgroup, which will allow for a new cgroup namespace to modify
> s
On 04/30/2016 01:13 AM, Elliott, Robert (Persistent Memory) wrote:
>> -Original Message-
>> From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
>> ow...@vger.kernel.org] On Behalf Of Tom Lendacky
>> Sent: Tuesday, April 26, 2016 5:56 PM
>> Subject: [RFC PATCH v1 00/18] x86: Secur
From: Alexander Usyskin
Ensure that mei_cl_read_start is called under the device lock
also in the bus layer. The function updates global ctrl_wr_list
which should be locked.
Cc: #4.4+
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus.c | 15 --
Hi,
On 17/02/2015 at 09:49:24 +0100, Robert Baldyga wrote :
> Hi Alessandro,
>
> It looks like only your Ack is missing. Could you please look at my
> patches? There are very little changes in RTC subsystem but your Ack is
> needed.
>
I understand you are still waiting for acks from an RTC subs
From: Vignesh R
Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.
Signed-off-by: Vignesh R
[fcoo...@ti.com: Add eCAP and use updated bindings for PWMSS and ePWM]
Signed-off-by: Franklin S Cooper Jr
Acked-by: Rob Herring
---
.../devicetree/bindings/pwm/pwm
Add tblck to the pwm nodes. This insures that the ehrpwm driver has access
to the time-based clk.
Do not remove similar entries for ehrpwm node. Later patches will switch
from using ehrpwm node name to pwm. But to maintain ABI compatibility we
shouldn't remove the old entries.
Signed-off-by: Fran
When using the old eCAP and ePWM bindings for AM335x and AM437x the clock
can be retrieved from the PWMSS parent. Newer bindings will insure that
this clock is provided via device tree.
Therefore, update this driver to support the newer and older bindings. In
the case of the older binding being us
Previous patches switched the ECAP and EPWM to use the new bindings.
These bindings explicitly adds the various required clocks via DT rather
than depending on hwmod.
Therefore, it is safe to remove the hwmod entries since they are no longer
needed.
Signed-off-by: Franklin S Cooper Jr
Acked-by:
Devices that utilize the OCP registers and/or PRCM registers and
register bit fields should be modeled using hwmod. Since eQEP, ePWM and
eCAP don't fall under this category, remove their hwmod entries.
Instead these clocks simply use the clock that is passed through by its
parent PWMSS. Therefore,
Switch to a new ECAP and EPWM bindings that doesn't depend on hwmod to
provide the various required clocks.
For AM437 and AM335x, add the required clocks explicitly to DT. The
hwmod entries for ECAP and EPWM will be removed and this will prevent
anything from breaking.
Signed-off-by: Franklin S C
Remove the internal part of max_comp_streams interface, since we
switched to per-cpu streams. We will keep RW max_comp_streams attr
around, because:
a) we may (silently) switch back to idle compression streams list
and don't want to disturb user space
b) max_comp_streams attr must wait for the
Hi Arnd,
On Tue, May 3, 2016 at 8:56 PM, Arnd Bergmann wrote:
> A conflict of two patches caused a build error when a function got renamed
> but a new user appeared in the other patch:
>
> drivers/pinctrl/bcm/pinctrl-ns2-mux.c:540:17: error:
> 'pinctrl_utils_dt_free_map' undeclared here (not in
On 05/01/2016 05:10 PM, Huang, Kai wrote:
>
>
> On 4/27/2016 10:58 AM, Tom Lendacky wrote:
>> Add support to set the memory encryption enable flag on the APs during
>> realmode initialization. When an AP is started it checks this flag, and
>> if set, enables memory encryption on its core.
>>
>> S
On 05/02/2016 01:06 PM, Laxman Dewangan wrote:
On Tuesday 03 May 2016 12:14 AM, Stephen Warren wrote:
On 05/02/2016 11:58 AM, Laxman Dewangan wrote:
Toggling OE bit is something emulating the open drain here.
From the perspective of the external HW that's attached to the GPIO, I
believe th
On Tue, May 03, 2016 at 03:26:39PM +0530, Vinod Koul wrote:
> On Tue, May 03, 2016 at 10:42:58AM +0300, Dan Carpenter wrote:
> > We intended || here instead of &&. The original code potentially leads
> > to a NULL dereference.
>
> This looks good to me, I will test this and get back
Acked-by: Vi
There are several SOC specific compatibles for ECAP, EHRPWM and PWMMS
that are in use but aren't properly documented. Therefore, fix this
by adding the compatibles to the appropriate binding documents.
While at it make minor corrections to the binding document.
Signed-off-by: Franklin S Cooper Jr
On 05/03/2016 04:43 AM, Christoph Hellwig wrote:
As explained in another thread I really think we need to get DAX
to stop pretending to be direct I/O, which should also take care
of the locking. The same issue also exists for ext2 and XFS so it
needs to be solved at a higher level.
I think the
Replace unit address from 0 to the proper physical address. Also insure
that the unit address matches the reg property address.
Signed-off-by: Franklin S Cooper Jr
---
Documentation/devicetree/bindings/pwm/pwm-tiecap.txt | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a
On 03.05.2016 17:51, Guillaume Nault wrote:
> On Tue, May 03, 2016 at 01:23:34PM +0200, Hannes Frederic Sowa wrote:
>> On Tue, May 3, 2016, at 12:35, Richard Weinberger wrote:
>>> On Tue, May 3, 2016 at 12:12 PM, Guillaume Nault
>>> wrote:
On Sun, May 01, 2016 at 09:38:57PM +0800, Wang Shanke
Daniel Vetter writes:
> So sphinx/rst y/n? Jon, is that ok with you from the doc maintainer
> pov?
I think the right answer for today is to use sphinx to generate docs
From inline comments, to encourage outline docs to give it a try but to
allow doc writers to use whatever works for them.
That
Now that the node name has been changed from ehrpwm to pwm the document
should show this proper usage. Change the unit address in the example
from 0 to the proper physical address value that should be used. Also
insure that the unit address matches to the reg property.
Signed-off-by: Franklin S Co
This patch series adds support for PWM for DRA7. The IP is the same as the
one present in AM33XX and AM437XX.
However, before doing so remove unnecessary hwmod entries for eCAP, ePWM
and eQEP.
The following are the biggest changes from v7 to v8:
Insure DT unit address matches reg property address
On 05/03/2016 05:06 PM, Shuah Khan wrote:
> On 05/02/2016 04:16 AM, Lars-Peter Clausen wrote:
>> On 04/30/2016 12:37 AM, Shuah Khan wrote:
>> [...]
>>> diff --git a/include/media/media-devnode.h b/include/media/media-devnode.h
>>> index 5bb3b0e..ce9b051 100644
>>> --- a/include/media/media-devnode.
From: Lars Ellenberg
Date: Tue, 3 May 2016 12:06:44 +0200
> Please just NOT use an additional "field",
> but always use 0 to pad.
You can't, it doesn't work.
We are adding a new field to every netlink protocol family that has this
alignment problem.
On 05/02/2016 12:47 PM, Laxman Dewangan wrote:
NVIDIA's Tegra210 support the park bit to make pinmux configuration
enable/disable. If parked bit is 1 then configuration does not apply
and if it is 0 then pinmux configuration applies. This is to support
to avoid any glitch in pinmux configurations
On Tue, May 03, 2016 at 05:24:51PM +0200, Arnd Bergmann wrote:
> The newly added tegra xusb phy driver fails to link when CONFIG_PINCTRL
> is disabled, since that also leaves out the legacy probe function:
>
> ERROR: "tegra_xusb_padctl_legacy_probe" [drivers/phy/tegra/phy-tegra-xusb.ko]
> undefin
On Fri, Apr 29, 2016 at 09:44:12AM +0200, Philipp Zabel wrote:
> Am Donnerstag, den 28.04.2016, 16:48 -0500 schrieb Rob Herring:
> > On Wed, Apr 27, 2016 at 04:23:34PM -0400, Akshay Bhat wrote:
> > > Document the ddc-i2c-bus property used by imx-ldb driver to read EDID
> > > information via I2C int
From: Lars Ellenberg
Date: Tue, 3 May 2016 12:06:44 +0200
> Whereas using some arbitrary value will be wrong,
> and will needlessly break userland.
It cannot break userland.
A fundamental property of netlink is that all code must silently
ignore netlink attributes it does not understand.
This
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