A recent commit caused an interactivity/starvation issue because we wrecked rq
local wakeup preemption.
These patches rectify this while also (hopefully) keeping the problem that led
to the fault patch fixed.
Mike, Pavan, could you guys please confirm?
Since I want to make ->task_woken() conditional on the task getting
migrated, we cannot use it to call record_wakee().
Move it to select_task_rq_fair(), which gets called in almost all the
same conditions. The only exception is if the woken task (@p) is
cpu-bound (as per the nr_cpus_allowed test
On Tue, May 10, 2016 at 10:26:05AM -0700, Andy Lutomirski wrote:
...
> >>
> >> It's annoying and ugly. It also makes the idea of doing 32-bit CRIU
> >> restore by starting in 64-bit mode and switching to 32-bit more
> >> complicated because it requires switching TASK_SIZE.
> >
> > Well, you know
On Tue, May 10, 2016 at 5:19 PM, Tomasz Nowicki wrote:
> This patch is going to implement generic PCI host controller for
> ACPI world, similar to what pci-host-generic.c driver does for DT world.
>
> All such drivers, which we have seen so far, were implemented within
> arch/
On Tue, May 10, 2016 at 5:19 PM, Tomasz Nowicki wrote:
> No functional changes in this patch.
>
> PCI I/O space mapping code does not depend on OF, therefore it can be
> moved to PCI core code. This way we will be able to use it
> e.g. in ACPI PCI code.
>
> Suggested-by:
On 10/05/16 18:25, Marc Zyngier wrote:
> On 10/05/16 16:14, Jon Hunter wrote:
>> When setting the IRQ type we don't check the return value to see if it
>> is set correctly. Due to this, failures to set the IRQ type have gone
>> unnoticed and because these failures were not catastrophic have not
On 10/05/16 19:00, Jon Hunter wrote:
>
> On 10/05/16 18:25, Marc Zyngier wrote:
>> On 10/05/16 16:14, Jon Hunter wrote:
>>> When setting the IRQ type we don't check the return value to see if it
>>> is set correctly. Due to this, failures to set the IRQ type have gone
>>> unnoticed and because
On Mon, 9 May 2016 12:53:38 -0500
Reza Arbab wrote:
> When memory is onlined, we are only able to rezone from ZONE_MOVABLE to
> ZONE_KERNEL, or from (ZONE_MOVABLE - 1) to ZONE_MOVABLE.
>
> To be more flexible, use the following criteria instead; to online memory
>
Historically for Rockchip devices we've relied on the power-on
default (or perhaps the firmware setting) to get the correct drive
phase for dw_mmc devices. This worked OK for the most part, but:
* Relying on the setting just "being right" is a bit fragile.
* As soon as there is an instance
From: Jiri Slaby
Date: Mon, 9 May 2016 09:11:54 +0200
> In ircomm_tty_get_serial_info, struct serial_struct is memset to 0 and
> then some members set to 0 explicitly.
>
> Remove the latter as it is obviously superfluous.
>
> And remove the retinfo check against NULL.
On Tue, May 10, 2016 at 5:19 PM, Tomasz Nowicki wrote:
> This patch is going to implement generic PCI host controller for
> ACPI world, similar to what pci-host-generic.c driver does for DT world.
>
> All such drivers, which we have seen so far, were implemented within
> arch/
Xunlei Pang writes:
> Two minor fixes for cfs_rq_clock_task().
> 1) If cfs_rq is currently being throttled, we need to subtract the cfs
>throttled clock time.
>
> 2) Make "throttled_clock_task_time" update SMP unrelated. Now UP cases
>need it as well.
>
>
On Tue, May 10, 2016 at 04:11:05PM +0100, Adam Thomson wrote:
> + /* Slave mode, if SRM not enabled no need for status checks */
> + pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
> + if (!(pll_ctrl & DA7213_PLL_SRM_EN))
> + return 0;
On 05/10, Andy Lutomirski wrote:
>
> - xol_add_vma: This one is weird: uprobes really is doing something
> behind the task's back, and the addresses need to be consistent with
> the address width. I'm not quite sure what to do here.
It can use mm->task_size instead, plus this is just a hint.
On Tue, May 10, 2016 at 5:19 PM, Tomasz Nowicki wrote:
> Platforms that have memory mapped IO port (such as ARM64) need special
> handling for PCI I/O resources. For host bridge's resource probing case
> these resources need to be fixed up with
>
On 10/05/16 00:51, Arnd Bergmann wrote:
> In some configurations, we can build the OMAP dss driver without
> implictly including the pinctrl consumer definitions, causing
> a build error:
>
> gpu/drm/omapdrm/dss/dss.c: In function 'dss_runtime_suspend':
> gpu/drm/omapdrm/dss/dss.c:1268:2: error:
+ Arnd
[...]
>> >> Solution
>> >>
>> >> This is very similar to the MMC pwrseq behavior so the idea is to:
>> >> 1. Move MMC pwrseq drivers to generic place,
>> >
>> > You can do that, but I'm going to NAK any use of pwrseq bindings outside
>> > of MMC. I think it is the wrong way to do
On Mon, May 09, 2016 at 01:45:58PM -0700, Yu-cheng Yu wrote:
> If "xsaves" is enabled, kernel always uses compacted format of xsave area.
> But user space still uses standard format of xsave area. Thus, xstate size
> in kernel's xsave area is smaller than xstate size in user's xsave area.
> The
On Tue, May 10, 2016 at 10:04:48AM +0200, Boris Brezillon wrote:
> On Wed, 4 May 2016 15:35:47 +0200
> Boris Brezillon wrote:
>
> > On Wed, 4 May 2016 08:06:10 -0500
> > Rob Herring wrote:
> >
> > > On Wed, May 4, 2016 at 4:38 AM, Boris
On 29 April 2016 at 19:39, Arnd Bergmann wrote:
> On Thursday 28 April 2016 16:06:42 Douglas Anderson wrote:
>> This series picks patches from various different places to produce what
>> I consider the best solution to getting consistent mmc and mmcblk
>> ordering.
>>
>> Why
Hi Jiancheng,
Am Dienstag, den 10.05.2016, 17:19 +0800 schrieb Jiancheng Xue:
> Change the input arguments type to struct platform_device pointer.
>
> Signed-off-by: Jiancheng Xue
[...]
> diff --git a/drivers/clk/hisilicon/reset.h b/drivers/clk/hisilicon/reset.h
>
Am Dienstag, den 10.05.2016, 17:19 +0800 schrieb Jiancheng Xue:
> 1. Add driver remove path.
> 2. Fix some issues.
>-Fix the ordering issue about clock provider being published.
>-Add error checking upon registering clocks.
>
> Signed-off-by: Jiancheng Xue
>
From: David Wu
This patch fixes the pinctrl pull bias setting, since the pull up/down
setting is the contrary for gpio0.
>From the TRM said, the gpio0 pull polarity setting:
gpio0a_p (gpio0 )
GPIO0A PE/PS programmation section, every
GPIO bit corresponding to
On 10/05/16 08:09, Lucas Stach wrote:
> Hi Jon,
>
> Am Montag, den 09.05.2016, 16:15 +0100 schrieb Jon Hunter:
>> Support for SD cards is not working on the Tegra30 Beaver board and
>> on
>> boot the following error message is seen if an SD card is present:
>>
>> mmc0: error -110 whilst
Le 05/10/2016 à 12:01 PM, Jerome Glisse a écrit :
> On Tue, May 10, 2016 at 09:04:36AM +0200, Nicolas Morey Chaisemartin wrote:
>> Le 05/03/2016 à 12:11 PM, Jerome Glisse a écrit :
>>> On Mon, May 02, 2016 at 09:04:02PM -0700, Hugh Dickins wrote:
On Fri, 29 Apr 2016, Nicolas Morey
On Tue, May 10, 2016 at 10:45:57AM +0200, Sedat Dilek wrote:
> Hi,
>
> I have tested with my usual setup/config on Ubuntu/precise AMD64.
> Looks good and ships [1].
>
> Thanks.
>
> Hope this feedback helps.
>
> Regards,
> - Sedat -
>
> [1]
>
On Tue, May 10, 2016 at 07:58:54AM +0200, Ingo Molnar wrote:
> Ok, could you guys please update the code and the changelog as well,
> and also rename that horribly named prepare_level4() function?
Oh, and while at it, call that new function at the beginning of
choose_random_location() before the
On 09/05/2016 23:08, Tom Lendacky wrote:
> On 05/09/2016 10:13 AM, Paolo Bonzini wrote:
>>
>>
>> On 02/05/2016 20:31, Andy Lutomirski wrote:
>>> And did the SEV implementation remember to encrypt the guest register
>>> state? Because, if not, everything of importance will leak out
>>> through
Hello.
On 5/10/2016 2:46 AM, David Lechner wrote:
There is now a proper phy driver for the DA8xx SoC USB PHY. This adds the
platform device declarations needed to use it.
Signed-off-by: David Lechner
[...]
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h
On Tue, 10 May 2016, Masahiro Yamada wrote:
> This MFD driver populates child devices such clock, reset, and other
> system controlling blocks.
>
> On UniPhier SoCs, one system control block contains various registers
> for clock, reset, and others in it. So, it is not reasonable to have
>
From: Ben Hutchings
> Sent: 09 May 2016 01:17
> On Sun, 2016-05-08 at 13:55 -0700, Shrikrishna Khare wrote:
> >
> > On Sat, 7 May 2016, Ben Hutchings wrote:
> >
> > > On Fri, 2016-05-06 at 16:12 -0700, Shrikrishna Khare wrote:
> > > [...]
> > > > +static int
> > > > +vmxnet3_set_coalesce(struct
On 5/10/2016 2:46 AM, David Lechner wrote:
The CFGCHIP registers are used by a number of devices, so using a syscon
device to share them. The first consumer of this will by the phy-da8xx-usb
driver.
Signed-off-by: David Lechner
[...]
diff --git
Vlastimil Babka wrote:
> In __alloc_pages_slowpath(), alloc_flags doesn't change after it's
> initialized,
> so move the initialization above the retry: label. Also make the comment above
> the initialization more descriptive.
Not true. gfp_to_alloc_flags() will include ALLOC_NO_WATERMARKS if
Hi, Arnaldo :)
On 05/10/2016 02:17 AM, Arnaldo Carvalho de Melo wrote:
Em Mon, May 09, 2016 at 08:41:47PM +0900, Taeung Song escreveu:
ui_browser__color_config() set foreground and background
colors values in ui_browser__colorsets.
"ground colors" sounds strange, I guess referreing to them
Hi,
Roger Quadros writes:
Roger Quadros writes:
> Don't make any decisions regarding VBUS session based on ID
> status. That is best left to the OTG core.
>
> Pass ID and VBUS events independent of each other so that OTG
> core knows
Remove the unnecessary smp_wmb(), which was added to make sure
that the update_cpu_boot_status() completes before we mark the
CPU online. But update_cpu_boot_status() already has dsb() (required
for the failing CPUs) to ensure the correct behavior.
Cc: Will Deacon
Cc: Mark
Hi,
Roger Quadros writes:
>>> @@ -497,8 +503,8 @@ static int dwc3_omap_probe(struct platform_device *pdev)
>>> /* check the DMA Status */
>>> reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG);
>>>
>>> - ret = devm_request_irq(dev, omap->irq, dwc3_omap_interrupt,
Hi,
Roger Quadros writes:
>>> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
>>> index 186a886..2e20892 100644
>>> --- a/drivers/usb/dwc3/core.h
>>> +++ b/drivers/usb/dwc3/core.h
>>> @@ -716,6 +716,8 @@ struct dwc3_scratchpad_array {
>>> * @maximum_speed:
在 2016/5/10 0:31, Doug Anderson 写道:
Hi,
On Mon, May 9, 2016 at 4:12 AM, Shawn Lin wrote:
1. Specifying a single number for this property in terms of "degrees"
is probably not right. The whole point of setting the "drive phase"
is to meet hold times, which are
The GICv3 driver wrongly assumes that it runs on the non-secure
side of a secure-enabled system, while it could be on a system
with a single security state, or a GICv3 with GICD_CTLR.DS set.
Either way, it is important to configure this properly, or
interrupts will simply not be delivered on this
On 10/05/16 13:12, Felipe Balbi wrote:
>
> Hi,
>
> Roger Quadros writes:
@@ -497,8 +503,8 @@ static int dwc3_omap_probe(struct platform_device
*pdev)
/* check the DMA Status */
reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG);
- ret =
On 10/05/16 13:04, Felipe Balbi wrote:
>
> Hi,
>
> Roger Quadros writes:
>> On 10/05/16 12:54, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Roger Quadros writes:
TRM [1] recommends that POWERPRESENT bit must not be
set and left at it's default value of 0.
On 10/05/16 13:04, Felipe Balbi wrote:
>
> Hi,
>
> Roger Quadros writes:
>> On 10/05/16 12:54, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Roger Quadros writes:
TRM [1] recommends that POWERPRESENT bit must not be
set and left at it's default value of 0.
On Tue, May 10, 2016 at 12:18:59AM +0200, Rafael J. Wysocki wrote:
[...]
> > >> diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
> > >> index ae3fe4e..4581e0e 100644
> > >> --- a/drivers/acpi/pci_root.c
> > >> +++ b/drivers/acpi/pci_root.c
> > >> @@ -564,6 +564,11 @@ static int
Hi Daniel,
So does kgdb do something useful after this patch?
On Mon, May 09, 2016 at 06:39:26PM +0100, Daniel Thompson wrote:
> Current versions of gdb do not interoperate cleanly with kgdb on arm64
> systems because gdb and kgdb do not use the same register description.
> This patch modifies
On 10 May 2016 at 11:23, Amit Pundir wrote:
> From: Ken Sumrall
>
> Add some logging to make it clear just how the emmc timeout
> was handled.
>
> Signed-off-by: Ken Sumrall
> [AmitP: cherry-picked this Android patch from aosp
On 09/05/16 09:00, honghui.zh...@mediatek.com wrote:
[...]
+static void *mtk_iommu_alloc_pgt(struct device *dev, size_t size, gfp_t gfp)
+{
+ dma_addr_t dma;
+ void *pages = alloc_pages_exact(size, gfp | __GFP_ZERO);
+
+ if (!pages)
+ return NULL;
+
+ dma =
On 09/05/16 13:41, Peng Fan wrote:
Hi Srinivas,
On Mon, May 09, 2016 at 01:28:14PM +0100, Srinivas Kandagatla wrote:
Thanks for the Ping, I totally missed this thread.
On 20/04/16 18:26, Peng Fan wrote:
Before access ocotp nvmem area, the clock should be enabled.
Or, `hexdump nvmem` will
On 10.05.2016 03:01, Eric Anholt wrote:
With the new patch 2 inserted between my previous pair, I think this
should cover Martin's bugs with clock disabling.
I tested patch 2 to be important on the downstream kernel: with the
DPI panel support added there, I was losing ethernet (my only I/O)
On Mon, May 09, 2016 at 04:26:30PM +, Serge Hallyn wrote:
> Quoting Djalal Harouni (tix...@gmail.com):
> > Hi,
[...]
> >
> > After clone(CLONE_NEWUSER|CLONE_NEWNS|CLONE_MNTNS_SHIFT_UIDGID), setup
> > the user namespace mapping, I guess you drop capabilities, do setuid()
> > or whatever and
On 14/03/16 04:29, Wang Hongcheng wrote:
> The header file asm/sizes.h is unnecessary.
> And it can also be compiled under X86 arch after the removal.
>
> Signed-off-by: Wang Hongcheng
> ---
> drivers/video/fbdev/amba-clcd.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff
On Mon, May 09, 2016 at 10:38:24AM -0700, Hoan Tran wrote:
> Hi Alexey,
>
> On Mon, May 9, 2016 at 2:43 AM, Alexey Klimov wrote:
> > Hi Hoan,
> >
> > On Fri, May 06, 2016 at 11:38:34AM -0700, Hoan Tran wrote:
> >> From: hotran
> >>
> >> ACPI 6.1 has a PCC
On Tue, May 10, 2016 at 11:14:41AM +0100, Suzuki K Poulose wrote:
> Remove the unnecessary smp_wmb(), which was added to make sure
> that the update_cpu_boot_status() completes before we mark the
> CPU online. But update_cpu_boot_status() already has dsb() (required
> for the failing CPUs) to
Hi,
Roger Quadros writes:
> On 10/05/16 13:04, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Roger Quadros writes:
>>> On 10/05/16 12:54, Felipe Balbi wrote:
Hi,
Roger Quadros writes:
> TRM [1] recommends that POWERPRESENT bit must
On 10/05/16 12:49, Hekuang wrote:
> hi
>
> 在 2016/5/10 16:08, Adrian Hunter 写道:
>> On 10/05/16 10:40, He Kuang wrote:
>>> 32-bit programs can be run on 64-bit machines, so we should choose
>>> unwind methods according to 'thread->map' instead of the host
>>> architecture.
>>>
>>> This patch adds
Hi Greg,
Here are two additional fixes for MCB from me, which would be good to have in
v4.7.
One fixes a panic when doing a insmod/rmmod loop and one grabs a reference to
the carrier driver's module as long as client drivers are loaded.
Both bugs have been reported by Andy and he tested the
Acquire a reference to the carrier's kernel module in bus code, so
it can't be removed from the kernel while it still has a bus and thus
possibly devices attached to it.
Signed-off-by: Johannes Thumshirn
Reported-by: Andreas Werner
Tested-by: Andreas
mcb_probe() does not aqcuire a reference to the probed device but drops one
when removing the device. As it is actually using the device, it should grab
a reference via get_device().
This could lead to a panic found with a rmmod/modprobe stress test
Signed-off-by: Johannes Thumshirn
When the ccerr handler is called but the error registers indicate no error
events we need to command eDMA to re-evaluate the errors. Otherwise we can
receive flood of error interrupts.
Reported-by: Roger Quadros
Signed-off-by: Peter Ujfalusi
---
atch).
Complete log is at http://I-love.SAKURA.ne.jp/tmp/serial-20160510-sem.txt.xz .
--
[ 48.303867] Out of memory: Kill process 1314 (tgid=1314) score 1000 or
sacrifice child
[ 48.308582] Killed process 1314 (tgid=1314) total-vm:70844kB,
anon-rss:1980kB, file-rss:0kB, shmem-rss:0kB
[ 4
On 10 May 2016 at 11:21, Marc Zyngier wrote:
> The GICv3 driver wrongly assumes that it runs on the non-secure
> side of a secure-enabled system, while it could be on a system
> with a single security state, or a GICv3 with GICD_CTLR.DS set.
>
> Either way, it is important
On Mon, May 09, 2016 at 06:39:26PM +0100, Daniel Thompson wrote:
> Current versions of gdb do not interoperate cleanly with kgdb on arm64
> systems because gdb and kgdb do not use the same register description.
> This patch modifies kgdb to work with recent releases of gdb (>= 7.8.1).
>
>
Hi Wenyou,
Can you add NAND maintainers/reviewers in Cc next time. And since you
revert a commit, you should also add the commit author in the loop.
On Mon, 9 May 2016 14:51:18 +0800
Wenyou Yang wrote:
> This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support
Move kasan check under the condition, otherwise we may fail and not
do a user copy.
Reported-by: Ingo Molnar
Signed-off-by: Andrey Ryabinin
---
lib/strncpy_from_user.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 25/04/16 03:24, Eric Engestrom wrote:
> Signed-off-by: Eric Engestrom
> ---
> Documentation/fb/udlfb.txt | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/fb/udlfb.txt b/Documentation/fb/udlfb.txt
> index 57d2f29..c985cb6 100644
>
Controllers use data strobe line to latch data from devices
under hs400 mode, but not for cmd line. So since emmc 5.1, JEDEC
introduces enhanced strobe mode for latching cmd response from
emmc devices to host controllers. This new feature is optional,
so it depends both on device's cap and host's
We introduce HS400 with enhanced strobe function, so we need
to add it for debug show.
Signed-off-by: Shawn Lin
---
Changes in v3: None
Changes in v2: None
drivers/mmc/core/debugfs.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Currently sdhci-arasan 5.1 can support enhanced strobe function,
and we now limit it just for "arasan,sdhci-5.1". Add
mmc-hs400-enhanced-strobe in DT to enable the function if we'r sure
our controller can support it.
Signed-off-by: Shawn Lin
---
Changes in v3: None
On Wed, Jan 20, 2016 at 10:17:10AM -0700, Jens Axboe wrote:
> On 01/20/2016 10:12 AM, Greg KH wrote:
> > On Wed, Jan 20, 2016 at 05:48:35AM -0500, Wenbo Wang wrote:
> > > From: Wenbo Wang
> > >
> > > During reset process, the nvme_dev->bar (ioremapped) may change,
> > >
Le 09/05/2016 15:15, Lars Ellenberg a écrit :
> On Mon, May 09, 2016 at 11:40:20AM +0200, Nicolas Dichtel wrote:
[snip]
>> Maybe prefixing genl_magic_func.h and genl_magic_struct.h by 'drbd_'
>> could be interesting so that new module won't use it. What is your
>> opinion?
>
> This was supposed
On Wed, May 04, 2016 at 02:09:46PM -0500, Suravee Suthikulpanit wrote:
> This patch introduces AVIC-related data structure, and AVIC
> initialization code.
>
> There are three main data structures for AVIC:
> * Virtual APIC (vAPIC) backing page (per-VCPU)
> * Physical APIC ID table
From: Chen Yu
Commit bb6ab52f2bef ("intel_pstate: Do not set utilization update
hook too early") moved the assignment of utilization update hook
from intel_pstate_init_cpu to intel_pstate_set_policy(), however
after moving, we need to leverage synchronize_sched() to deal
On Wed, May 04, 2016 at 02:09:47PM -0500, Suravee Suthikulpanit wrote:
> This patch introduces a new mechanism to inject interrupt using AVIC.
> Since VINTR is not supported when enable AVIC, we need to inject
"... is not supported when AVIC is enabled ..."
VINTR?
Please write those
Fix a declared-but-not-defined warning when building with
XEN_BALLOON_MEMORY_HOTPLUG=n. This fixes a regression introduced by
commit dfd74a1edfab
("xen/balloon: Fix crash when ballooning on x86 32 bit PAE").
Signed-off-by: Ross Lagerwall
---
v2: Moved function instead
1. Add driver remove path.
2. Fix some issues.
-Fix the ordering issue about clock provider being published.
-Add error checking upon registering clocks.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk-hi3519.c | 116
Before, there was an ordering issue that the clock provider
had been published in hisi_clk_init before it could provide
valid clocks to consumers. hisi_clk_alloc is just used to
allocate memory space for struct hisi_clock_data. It makes
it possible to publish the provider after the clocks are
Change the input arguments type to struct platform_device pointer.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/reset.c | 19 +--
drivers/clk/hisilicon/reset.h | 5 +++--
2 files changed, 12 insertions(+), 12 deletions(-)
diff --git
Add error processing for hisi_clk_register_* functions.
Signed-off-by: Jiancheng Xue
---
drivers/clk/hisilicon/clk.c | 60 +
drivers/clk/hisilicon/clk.h | 10
2 files changed, 55 insertions(+), 15 deletions(-)
This patch is base on branch clk-hi3519 in clk tree. It mainly fixes the
following issues:
1. Add driver remove path.
2. Fix the ordering issue about clock provider being published.
3. Add error checking upon registering clocks.
Jiancheng Xue (5):
reset: hisilicon: change the definition of
On Tue 10-05-16 15:41:04, Joonsoo Kim wrote:
> 2016-05-05 3:16 GMT+09:00 Michal Hocko :
> > On Wed 04-05-16 23:32:31, Joonsoo Kim wrote:
> >> 2016-05-04 17:47 GMT+09:00 Michal Hocko :
[...]
> >> > progress. What is the usual reason to disable compaction in the
On Tue 10-05-16 17:00:08, Joonsoo Kim wrote:
> 2016-05-10 16:09 GMT+09:00 Vlastimil Babka :
> > On 05/10/2016 08:41 AM, Joonsoo Kim wrote:
> >>
> >> You applied band-aid for CONFIG_COMPACTION and fixed some reported
> >> problem but it is also fragile. Assume almost pageblock's
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/reset/uniphier/Kconfig | 4 +++
drivers/reset/uniphier/Makefile | 1 +
drivers/reset/uniphier/reset-uniphier-pxs2.c | 46
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/Kconfig | 4 ++
drivers/clk/uniphier/Makefile| 1 +
drivers/clk/uniphier/clk-uniphier-pro5.c | 102
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/reset/uniphier/Kconfig | 4 +++
drivers/reset/uniphier/Makefile | 1 +
drivers/reset/uniphier/reset-uniphier-pro4.c | 46
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/Kconfig | 4 ++
drivers/clk/uniphier/Makefile| 1 +
drivers/clk/uniphier/clk-uniphier-sld8.c | 102
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/reset/uniphier/Kconfig | 4 +++
drivers/reset/uniphier/Makefile | 1 +
drivers/reset/uniphier/reset-uniphier-ld20.c | 46
Hi,
Roger Quadros writes:
> Don't make any decisions regarding VBUS session based on ID
> status. That is best left to the OTG core.
>
> Pass ID and VBUS events independent of each other so that OTG
> core knows exactly what to do.
>
> This makes dual-role with extcon work with
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/reset/uniphier/Kconfig | 4 +++
drivers/reset/uniphier/Makefile | 1 +
drivers/reset/uniphier/reset-uniphier-pro5.c | 46
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/Kconfig| 4 +
drivers/clk/uniphier/Makefile | 2 +
drivers/clk/uniphier/clk-uniphier-mio.c | 215
On Mon, May 09, 2016 at 02:48:29PM -0700, Stephen Boyd wrote:
> On 05/09, Charles Keepax wrote:
> > On Fri, May 06, 2016 at 05:55:01PM -0700, Stephen Boyd wrote:
> > > I've applied this to clk-next but still have a question, see
> > > below.
> > >
> > > On 01/08, Charles Keepax wrote:
> >
Hi,
Roger Quadros writes:
> TRM [1] recommends that POWERPRESENT bit must not be
> set and left at it's default value of 0.
>
> [1] OMAP542x TRM - http://www.ti.com/lit/pdf/swpu249
> Section 23.11.4.5.1 Mailbox VBUS/ID Management
>
> "Because PIPE powerpresent has a different
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/Kconfig | 4 ++
drivers/clk/uniphier/Makefile| 1 +
drivers/clk/uniphier/clk-uniphier-ld20.c | 83
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/reset/uniphier/Kconfig | 4 ++
drivers/reset/uniphier/Makefile | 2 +
drivers/reset/uniphier/reset-uniphier-mio.c | 106
hi
在 2016/5/10 16:08, Adrian Hunter 写道:
On 10/05/16 10:40, He Kuang wrote:
32-bit programs can be run on 64-bit machines, so we should choose
unwind methods according to 'thread->map' instead of the host
architecture.
This patch adds methods to test whether a dso is 64-bit or 32-bit by
the
Hi Boris,
2016-05-10 10:55 GMT+02:00 Boris Brezillon :
>
> Romain, I thought you had a real use case on sama5d4 where this patch
> was needed to make the whole thing work. Not sure why you submitted
> this patch if you couldn't test it on a real board.
My
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/clk/uniphier/Kconfig | 4 ++
drivers/clk/uniphier/Makefile| 1 +
drivers/clk/uniphier/clk-uniphier-ld11.c | 83
This series is just for review.
Please do not apply this patch.
Signed-off-by: Masahiro Yamada
---
drivers/reset/uniphier/Kconfig | 4 +++
drivers/reset/uniphier/Makefile | 1 +
drivers/reset/uniphier/reset-uniphier-sld8.c | 46
On 10/05/16 12:58, Felipe Balbi wrote:
>
> Hi,
>
> Roger Quadros writes:
>> We intend to share this interrupt with the OTG driver an to ensure
>> that irqflags match for the shared interrupt handlers we use
>> request_threaded_irq()
>>
>> If we don't use request_treaded_irq()
Hi,
Roger Quadros writes:
> Implementations might use different IRQs for
> host, gadget and OTG so use named interrupt resources
> to allow Device tree to specify the 3 interrupts.
>
> Following are the interrupt names
>
> Peripheral Interrupt - peripheral
> HOST Interrupt - host
Le 10/05/2016 11:40, Lars Ellenberg a écrit :
> On Tue, May 10, 2016 at 11:09:53AM +0200, Nicolas Dichtel wrote:
>> Le 09/05/2016 15:15, Lars Ellenberg a écrit :
>>> On Mon, May 09, 2016 at 11:40:20AM +0200, Nicolas Dichtel wrote:
>> [snip]
Maybe prefixing genl_magic_func.h and
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