On Tue, 18 Jul 2017, Elena Reshetova wrote:
> The below script can be used to detect potential misusage
> of atomic_t type and API for reference counting purposes.
> Now when we have a dedicated refcount_t type and API with
> security protection implemented, people should be using it
> instead.
On Tue, Jul 18, 2017 at 10:40:07AM +0200, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 10:30:14 CEST schrieb Greg Kroah-Hartman:
>
> Hi Greg,
>
> > > +typedef unsigned long long __u64;
> > > +typedef long long __s64;
> >
> > types.h already has these defines, don't re
Am Dienstag, 18. Juli 2017, 10:47:00 CEST schrieb Arnd Bergmann:
Hi Arnd,
> On Tue, Jul 18, 2017 at 10:37 AM, Stephan Müller
wrote:
> > Am Dienstag, 18. Juli 2017, 10:13:55 CEST schrieb Arnd Bergmann:
> >> On Tue, Jul 18, 2017 at 9:58 AM, Stephan Müller
wrote:
> >> > When selecting the LRNG f
add cec in devicetree for stm32f7 familly
version 1.1:
- with correct slew rate
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32f746.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index
Hi Thomas,
Dmesg reports insecure W+X mapping found at address
8805f000/0x8805f000
on 4.4.70 kernel patched with -rt83 patch:
# uname -a
Linux piotrpc 4.4.70-rt83 #1 SMP PREEMPT RT Thu Jul 13 08:42:02 BST 2017 x86_64
GNU/Linux
[4.888146] Serial: 8250/16550 driver, 4 ports,
On Tue, Jul 18, 2017 at 10:45:12AM +0200, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 10:32:10 CEST schrieb Greg Kroah-Hartman:
>
> Hi Greg,
>
> > external references do not last as long as the kernel change log does :(
>
> What would be the best way to cite a 50+ page document? I got a
On Tue, Jul 18, 2017 at 9:59 AM, Stephan Müller wrote:
> Add LRNG compilation support.
>
> diff --git a/drivers/char/Makefile b/drivers/char/Makefile
> index 53e3372..87e06ec 100644
> --- a/drivers/char/Makefile
> +++ b/drivers/char/Makefile
> @@ -2,7 +2,15 @@
> # Makefile for the kernel characte
On Tue, Jul 18, 2017 at 10:45:12AM +0200, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 10:32:10 CEST schrieb Greg Kroah-Hartman:
>
> Hi Greg,
>
> > external references do not last as long as the kernel change log does :(
>
> What would be the best way to cite a 50+ page document? I got a
Am Dienstag, 18. Juli 2017, 10:49:59 CEST schrieb Greg Kroah-Hartman:
Hi Greg,
>
> > This issue was discussed during the inclusion of the Jitter RNG C code
> > into
> > the kernel.
>
> Ok, that was then, this is now, why not change it now? How does
> including types.h change anything?
At the t
> Am 17.07.2017 um 12:57 schrieb Mauro Carvalho Chehab
> :
>
> So, we need a way for kfigure to fallback when distros don't
> have such feature.
Hm .. I'am not very happy to implement where distros packaging fail.
But .. if there is really a need for, I will do so.
Lets see how this series goe
* Peter Zijlstra wrote:
> On Wed, Jul 05, 2017 at 09:04:39AM -0700, Andy Lutomirski wrote:
> > On Wed, Jul 5, 2017 at 5:18 AM, Peter Zijlstra wrote:
> > > On Thu, Jun 29, 2017 at 08:53:22AM -0700, Andy Lutomirski wrote:
> > >> @@ -104,18 +140,20 @@ void switch_mm_irqs_off(struct mm_struct *prev
Bjorn,
On Mon, Jul 17, 2017 at 03:30:47PM -0700, Bjorn Andersson wrote:
> On Mon 17 Jul 05:03 PDT 2017, Varadarajan Narayanan wrote:
>
> > Presently, the phy pipe clock's name is assumed to be either
> > usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the
> > phy lane's number). However
Am Dienstag, 18. Juli 2017, 10:51:41 CEST schrieb Arnd Bergmann:
Hi Arnd,
> On Tue, Jul 18, 2017 at 9:59 AM, Stephan Müller wrote:
> > Add LRNG compilation support.
> >
> > diff --git a/drivers/char/Makefile b/drivers/char/Makefile
> > index 53e3372..87e06ec 100644
> > --- a/drivers/char/Makefi
On Tue, Jul 18, 2017 at 10:49 AM, Greg Kroah-Hartman
wrote:
> On Tue, Jul 18, 2017 at 10:40:07AM +0200, Stephan Müller wrote:
>> Am Dienstag, 18. Juli 2017, 10:30:14 CEST schrieb Greg Kroah-Hartman:
>>
>> Hi Greg,
>>
>> > > +typedef unsigned long long __u64;
>> > > +typedef long long
Hi Andy,
On Mon, Jul 17, 2017 at 12:24 PM, Andy Shevchenko
wrote:
> Sparse complains about wrong address space used in __acpi_map_table()
> and in __acpi_unmap_table().
>
> arch/x86/kernel/acpi/boot.c:127:29: warning: incorrect type in return
> expression (different address spaces)
> arch/x86/ke
2017-07-10 17:24 GMT+02:00 Emil Velikov :
> On 10 July 2017 at 16:07, Benjamin Gaignard
> wrote:
>> To do not force stm driver to be build by default
>>
>> Signed-off-by: Benjamin Gaignard
> Yes, please. You might want to double-check the default board config has it
> set.
>
> Reviewed-by: Emil
On 17/07/17 18:06, Mathieu Poirier wrote:
On Fri, Jul 14, 2017 at 02:04:19PM +0100, Suzuki K Poulose wrote:
This patch cleans up how we setup the AXICTL register on
TMC ETR. At the moment we don't set the CacheCtrl bits, which
drives the arcache and awcache bits on AXI bus specifying the
cacheab
On Tue 18-07-17 06:42:31, Tetsuo Handa wrote:
> Michal Hocko wrote:
> > On Sun 16-07-17 19:59:51, Tetsuo Handa wrote:
> > > Since the whole memory reclaim path has never been designed to handle the
> > > scheduling priority inversions, those locations which are assuming that
> > > execution of some
On Mon, 17 Jul 2017, Michal Simek wrote:
> MTF_CORE should be enabled when driver is enabled.
>
> Without this patch you can configure:
> CONFIG_MFD_CORE is not set
> CONFIG_MFD_TPS65086=y
>
> which ends up with compilation error:
> drivers/mfd/tps65086.o: In function `tps65086_probe':
> drivers
On Tue, Jul 18, 2017 at 3:42 PM, Icenowy Zheng wrote:
> R40 is said to be an upgrade of A20, and its pin configuration is also
> similar to A20 (and thus similar to A10).
>
> Add support for R40 to the A10 pinctrl driver.
>
> Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
Hi Mikko,
On 11/07/17 07:43, Mikko Perttunen wrote:
> Thanks for the patch, didn't consider this case. I really need to get
> together some system to automatically test on multiple platforms.. :)
We already have the infrastructure in place to do this, however, at the
moment we are just making sure
Am Dienstag, 18. Juli 2017, 11:02:02 CEST schrieb Arnd Bergmann:
Hi Arnd,
>
> I can see why the jitterentropy implementation avoids using kernel headers,
> the problem now is that part of it gets moved into a new header, and that
> already violates the original principle.
>
> From my reading of
On 17/07/17 18:45, Mathieu Poirier wrote:
On Fri, Jul 14, 2017 at 02:04:06PM +0100, Suzuki K Poulose wrote:
The Linux coresight drivers define the programmable ATB replicator as
Qualcomm replicator, while this is designed by ARM. This can cause confusion
to a user selecting the driver. Cleanup a
On Tue, 18 Jul 2017, Lee Jones wrote:
> On Tue, 11 Jul 2017, Ludovic Desroches wrote:
>
> > For HSMC controller, the register layout depends on the device i.e. the
> > offset of setup, pulse, cycle, mode and timings registers is not the
> > same. An helper is added to provide the correct register
On Mon, Jul 17, 2017 at 05:01:56PM +0200, Jiri Olsa wrote:
> The x86 pmu currently uses the sched_task callback for 2 functions:
> - PEBS drain
> - save/restore LBR data
>
> They are both triggered once the x86 pmu is registered with
> perf_sched_cb_inc call (within pmu::add callback), r
On Mon, Jul 17, 2017 at 08:47:25PM -0400, Jacob von Chorus wrote:
> -static void readinfo_bitstream(char *bitdata, char *buf, int *offset)
> +static int readinfo_bitstream(char *bitdata, char *buf, int size, int
> *offset)
> {
> char tbuf[64];
> s32 len;
> @@ -59,9 +59,15 @@ static vo
On Tue, Jul 18, 2017 at 11:10 AM, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 11:02:02 CEST schrieb Arnd Bergmann:
>
> Hi Arnd,
>>
>> I can see why the jitterentropy implementation avoids using kernel headers,
>> the problem now is that part of it gets moved into a new header, and that
>>
As per internal decision, Joao Pinto will be maintainer for DWC UFS driver.
Signed-off-by: Prabu Thangamuthu
---
MAINTAINERS |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a99f6b..2122e93 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13
Am Dienstag, 18. Juli 2017, 11:16:10 CEST schrieb Arnd Bergmann:
Hi Arnd,
> I guess ideally you just move the inner half of lrng_get_jent(),
> i.e. everything inside of the spinlock, plus the buffer, into that file.
> That should keep the low-level side separate from the caller.
Yes, I concur.
On Mon, 17 Jul 2017, Enric Balletbo Serra wrote:
> Hi Gwendal,
>
> 2017-07-13 22:33 GMT+02:00 Gwendal Grignou :
> > On Wed, Jul 12, 2017 at 3:13 AM, Enric Balletbo i Serra
> > wrote:
> >> The cros_ec_dev driver should be used only to expose the Chrome OS Embedded
> >> Controller to user-space an
Arnaldo Carvalho de Melo writes:
> Em Mon, Jul 17, 2017 at 04:02:22PM +0530, Ravi Bangoria escreveu:
>> Commit 801bc8193463 ("perf probe: Allow placing uprobes in
>> alternate namespaces.") is causing a build failure on powerpc:
>>
>> error: incompatible type for argument 2 of 'get_target_map'
the patch is for fix the below kernel panic:
BUG: unable to handle kernel NULL pointer dereference at 002a
IP: [] composite_setup+0x3d/0x1830
PGD 27525b067 PUD 27525a067 PMD 0
Oops: 0002 [#1] PREEMPT SMP
Call Trace:
[] ? dwc3_trace+0x52/0x60
[] ? get_parent_ip+0xd/0x50
[] android_set
If the touchscreen pins are used as general purpose analogue
input, the touchscreen driver should not be used. The pins
will be handled by the existing hwmon driver instead.
Signed-off-by: Sebastian Reichel
---
drivers/mfd/da9052-core.c | 26 +++---
1 file changed, 23 inserti
TSI channel has a 4 channel mux connected to it and is normally
used for touchscreen support. The hardware may alternatively
use it as general purpose adc.
Signed-off-by: Sebastian Reichel
---
drivers/hwmon/da9052-hwmon.c | 249 ++-
1 file changed, 245 ins
Fix checkpatch warnings about S_IRUGO being less readable than
providing the permissions octal as '0444'.
Signed-off-by: Sebastian Reichel
---
drivers/hwmon/da9052-hwmon.c | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/hwmon/da9
Add register details an channels definition for using the TSI
registers in the hwmon driver.
Signed-off-by: Sebastian Reichel
---
include/linux/mfd/da9052/da9052.h | 6 ++
include/linux/mfd/da9052/reg.h| 11 ++-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/incl
On Mon, 17 Jul 2017 13:28:47 -0400
Nate Watterson wrote:
> Hi Jonathan,
>
> On 7/17/2017 10:23 AM, Jonathan Cameron wrote:
> > On Mon, 17 Jul 2017 14:06:42 +0100
> > John Garry wrote:
> >
> >> +
> >>
> >> On 29/06/2017 03:08, Leizhen (ThunderTown) wrote:
> >>>
> >>>
> >>> On 2017/6/28 17:3
I'm Seunghun Han, and I work for National Security Research Institute of
South Korea.
I found a kernel panic while I tested latest kernel version.
The kernel panic log is as follows:
>[0.058851] BUG: unable to handle kernel NULL pointer dereference at
>0010
>[0.06] IP: io
Hi,
GE Healthcare's PPD [0] uses DA9053's touchscreen pins
for hardware monitoring purposes. This adds support for
the feature.
The proposed merge solution is, that mfd queues the
mfd patches and provides an immutable branch for hwmon,
since the last patch depends on the other ones.
[0] https://
On Mon, 17 Jul 2017, Moritz Fischer wrote:
> Hi Lee,
>
> On Mon, Jul 17, 2017 at 08:51:17AM +0100, Lee Jones wrote:
> > On Thu, 13 Jul 2017, Moritz Fischer wrote:
> >
> > > From: Moritz Fischer
> > >
> > > Add support for the Maxim/Dallas DS1374 RTC/WDT with trickle charger.
> > > The device c
On Tue, 2017-07-18 at 11:03 +0200, Geert Uytterhoeven wrote:
> Hi Andy,
>
> On Mon, Jul 17, 2017 at 12:24 PM, Andy Shevchenko
> wrote:
> > Sparse complains about wrong address space used in
> > __acpi_map_table()
> > and in __acpi_unmap_table().
> >
> > arch/x86/kernel/acpi/boot.c:127:29: warnin
On 18/07/2017 at 11:12, Lee Jones wrote:
> On Tue, 18 Jul 2017, Lee Jones wrote:
>
>> On Tue, 11 Jul 2017, Ludovic Desroches wrote:
>>
>>> For HSMC controller, the register layout depends on the device i.e. the
>>> offset of setup, pulse, cycle, mode and timings registers is not the
>>> same. An h
On Mon, Jul 17, 2017 at 04:28:38PM +0800, Jin, Yao wrote:
> I'm also waiting for Peter's review comments for this patch update.
Aside from Jiri's comment (which I agree with)
Acked-by: Peter Zijlstra (Intel)
for the first two patches.
On Tue, Jul 18, 2017 at 6:59 AM, Krzysztof Kozlowski wrote:
> Hi,
>
> Changes since v1:
> 1. Rebase on Simon Horman's repo to avoid duplication.
> 2. Add Liviu Dudau's ack for vexpress.
Looks all good to me. Please send a pull request for these when you are
ready.
Arnd
On Mon, 17 Jul 2017, Marek Vasut wrote:
> Add the MFD part of the ROHM BD9571MWV-M PMIC driver and MAINTAINERS
> entry. The MFD part only specifies the regmap bits for the PMIC and
> binds the subdevs together.
>
> Signed-off-by: Marek Vasut
> Cc: linux-kernel@vger.kernel.org
> Cc: Geert Uytterh
On 11/07/2017 at 09:40:14 +0200, Ludovic Desroches wrote:
> For HSMC controller, the register layout depends on the device i.e. the
> offset of setup, pulse, cycle, mode and timings registers is not the
> same. An helper is added to provide the correct register layout.
>
> Fixes: fe9d7cb22ef3 ("mf
On 07/18/2017 04:31 PM, Zhaoyang Huang (黄朝阳) wrote:
>
> It is no need to find the very beginning of the area within
> alloc_vmap_area, which can be done by judging each node during the process
>
it seems the original code is wrote to achieve the following two purposes :
A, the result vamp_area ha
Hi!
> On Tue, Feb 14, 2017 at 02:40:19PM +0100, Pavel Machek wrote:
> > Probably something fun happening in userspace.
>
> What's the status of this one?
>
> I don't think it has a chance to be merged in the foreseeable future. Why
> is it needed?
Good question. And agreed that this one is not
On Thu, 13 Jul 2017, Moritz Fischer wrote:
> This adds a binding for the Maxim/Dallas DS1374 MFD.
>
> Signed-off-by: Moritz Fischer
> ---
> Changes from RFC:
> - dallas,ds1374-mode -> dallas,mode
> - Clarified examples
> - dallas,remap-reset property
>
> On second thoughts the solution for the
Hi,
On Mon, Jul 17, 2017 at 10:48:33PM -0700, Tony Lindgren wrote:
> * Sebastian Reichel [170717 07:14]:
> > Hi,
> >
> > On Mon, Jul 17, 2017 at 03:17:10AM -0700, Tony Lindgren wrote:
> > > * Sebastian Reichel [170717 03:13]:
> > > > On Mon, Jul 17, 2017 at 02:29:04AM -0700, Tony Lindgren wrote
On Tue, Jul 18, 2017 at 11:14:44AM +0200, Peter Zijlstra wrote:
> On Mon, Jul 17, 2017 at 05:01:56PM +0200, Jiri Olsa wrote:
> > The x86 pmu currently uses the sched_task callback for 2 functions:
> > - PEBS drain
> > - save/restore LBR data
> >
> > They are both triggered once the x86 pmu is
> On Tue, 18 Jul 2017, Elena Reshetova wrote:
>
> > The below script can be used to detect potential misusage
> > of atomic_t type and API for reference counting purposes.
> > Now when we have a dedicated refcount_t type and API with
> > security protection implemented, people should be using it
>
On Tue, Jul 18, 2017 at 09:15:58AM +, Prabu Thangamuthu wrote:
> As per internal decision, Joao Pinto will be maintainer for DWC UFS driver.
That's "odd", does Joao want this? Do you want this?
thanks,
greg k-h
Jin Yao writes:
> It is often useful to know the branch types while analyzing branch
> data. For example, a call is very different from a conditional branch.
>
> Currently we have to look it up in binary while the binary may later
> not be available and even the binary is available but user has t
On 17/07/17 22:28, Enric Balletbo i Serra wrote:
Before this patch the enable signal was set before the PWM signal and
vice-versa on power off. I guess that this sequence is wrong, at least,
it is on the different panels datasheets that I checked, so I inverted
the sequence to follow the specs.
Hi Oliver,
On 07/18/2017 04:41 PM, Oliver Neukum wrote:
Am Dienstag, den 18.07.2017, 16:08 +0800 schrieb jeffy:
I am afraid not. We cannot silently drop one part of a transmission.
I am afraid that the correct algorithm, if we encounter an error at
that stage, is to abort the operation and repo
* Tom Lendacky wrote:
> Create a new function attribute, __nostackp, that can used to turn off
> stack protection on a per function basis.
>
> Signed-off-by: Tom Lendacky
> ---
> include/linux/compiler-gcc.h | 2 ++
> include/linux/compiler.h | 4
> 2 files changed, 6 insertions(+)
>
On Tue, 18 Jul 2017, Nicolas Ferre wrote:
> On 18/07/2017 at 11:12, Lee Jones wrote:
> > On Tue, 18 Jul 2017, Lee Jones wrote:
> >
> >> On Tue, 11 Jul 2017, Ludovic Desroches wrote:
> >>
> >>> For HSMC controller, the register layout depends on the device i.e. the
> >>> offset of setup, pulse, cy
On Tue, 18 Jul 2017 11:29:31 +0200,
Sebastian Reichel wrote:
>
> Hi,
>
> On Mon, Jul 17, 2017 at 10:48:33PM -0700, Tony Lindgren wrote:
> > * Sebastian Reichel [170717 07:14]:
> > > Hi,
> > >
> > > On Mon, Jul 17, 2017 at 03:17:10AM -0700, Tony Lindgren wrote:
> > > > * Sebastian Reichel [1707
On 17/07/17 22:28, Enric Balletbo i Serra wrote:
Some panels (i.e. N116BGE-L41), in their power sequence specifications,
request a delay between set the PWM signal and enable the backlight and
between clear the PWM signal and disable the backlight. Add support for
the new post-pwm-on-delay-us and
> On Mon, 17 Jul 2017, Reshetova, Elena wrote:
> > > On Mon, 17 Jul 2017, Elena Reshetova wrote:
> > > > refcount_t type and corresponding API should be
> > > > used instead of atomic_t when the variable is used as
> > > > a reference counter. This allows to avoid accidental
> > > > refcounter over
Am Dienstag, den 18.07.2017, 17:36 +0800 schrieb jeffy:
> Hi Oliver,
>
> On 07/18/2017 04:41 PM, Oliver Neukum wrote:
> >
> > Am Dienstag, den 18.07.2017, 16:08 +0800 schrieb jeffy:
> > >
> > > >
> > > > I am afraid not. We cannot silently drop one part of a transmission.
> > > > I am afraid th
Hi Baoquan,
At 07/18/2017 04:45 PM, b...@redhat.com wrote:
On 07/18/17 at 02:08pm, Dou Liyang wrote:
Hi, Zheng
At 07/18/2017 01:18 PM, Zheng, Lv wrote:
Hi,
Can the problem be fixed by invoking acpi_put_table() for mapped DMAR table?
Invoking acpi_put_table() is my first choice. But it made
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work with const
attribute_group. So mark the non-const structs as const.
Arvind Yadav (10):
[PATCH v3 01/10] net: cdc_ncm: constify attribute_group structures.
[PATCH v3 02/10] net: c
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
11800 368 0 121682f88 drivers
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
6164 304 064681944 drivers
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
Added cover later.
Changes in v3:
net-
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
Added cover later.
Changes in v3:
net-
Hello Greg and Prabu,
Às 10:31 AM de 7/18/2017, Greg Kroah-Hartman (gre...@linuxfoundation.org)
escreveu:
> On Tue, Jul 18, 2017 at 09:15:58AM +, Prabu Thangamuthu wrote:
>> As per internal decision, Joao Pinto will be maintainer for DWC UFS driver.
>
> That's "odd", does Joao want this?
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
Added cover later.
Changes in v3:
net-
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
45121472 059841760 drivers
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
3409 948 2843851121 drivers
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
28720 985 12 297177415 net/...
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
Changes in v2:
Added cover later.
Changes in v3:
net-
attribute_group are not supposed to change at runtime. All functions
working with attribute_group provided by work
with const attribute_group. So mark the non-const structs as const.
File size before:
textdata bss dec hex filename
13275 928 1 14204377c drivers
The SG unit in the TMC has been removed in Coresight SoC-600.
This is however advertised by DEVID:Bit 24 = 0b1. On the
previous generation, the bit is RES0, hence we can rely on the
DEVID to detect the support.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtr
On Tue, 18 Jul 2017, Quentin Schulz wrote:
> Hi Lee,
>
> On 18/07/2017 09:19, Lee Jones wrote:
> > On Mon, 17 Jul 2017, Quentin Schulz wrote:
> >
> >> According to their datasheets, the AXP221, AXP223, AXP288, AXP803,
> >> AXP809 and AXP813 PEK have different values for startup time bits from
>
Add the peripheral ids for the Coresight SoC 600 TPIU, replicator
and funnel.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-dynamic-replicator.c | 5 +
drivers/hwtracing/coresight/coresight-funnel.c | 5 +
drivers/hwtracing/cor
From: Sean Wang
Changes since v1:
- enhnace MT6380 regulator dt-binding document following suggestions in the v1.
- revise pwrap_init with slave programing options
- remove mt6380_get_status() and relevant accessed members
- remove debug code in mt6380_regulator_set_mode()
- make regulator driver
From: Sean Wang
Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
and also add extra new regmap_config of 32-bit mode for MT6380
since old regmap_config of 16-bit mode can't be fit into the need.
Signed-off-by: Chenglin Xu
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
---
On 2017/7/17 21:29, Andy Shevchenko wrote:
> Sparse complains about wrong address space used in __acpi_map_table()
> and in __acpi_unmap_table().
>
> arch/x86/kernel/acpi/boot.c:127:29: warning: incorrect type in return
> expression (different address spaces)
> arch/x86/kernel/acpi/boot.c:127:29:
On 2017/7/17 21:29, Andy Shevchenko wrote:
> WIP
Does it mean not ready for upstream yet?
Thanks
Hanjun
From: Sean Wang
add dt-binding document for MediaTek MT6380 PMIC
Signed-off-by: Chenglin Xu
Signed-off-by: Sean Wang
---
.../bindings/regulator/mt6380-regulator.txt| 90 ++
1 file changed, 90 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regu
From: Sean Wang
fixup those warnings such as lines over 80 words and parenthesis
alignment which would be complained by checkpatch.pl.
Signed-off-by: Sean Wang
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/dri
From: Sean Wang
pwrap initialization is highly associated with the base SoC, so
update here for allowing pwrap_init without slave program which would be
used to those PMICs without extra encryption on bus such as MT6380.
Signed-off-by: Chenglin Xu
Signed-off-by: Chen Zhong
Signed-off-by: Sean
From: Chenglin Xu
Add the registers, callbacks and data structures required to make the
PMIC wrapper work on MT7622.
Signed-off-by: Chenglin Xu
Signed-off-by: Chen Zhong
Signed-off-by: Sean Wang
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 180 +++
1 file change
From: Chenglin Xu
The MT6380 is a regulator found those boards with MediaTek MT7622 SoC
It is connected as a slave to the SoC using MediaTek PMIC wrapper which
is the common interface connecting with Mediatek made various PMICs.
Signed-off-by: Chenglin Xu
Signed-off-by: Sean Wang
---
drivers/
From: Sean Wang
Some regulators such as MediaTek MT6380 also has to be written in
32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write
into pwrap_write16 and one additional function pointer is introduced
for increasing flexibility allowing the determination which mode is
used by t
From: Sean Wang
Some regulators such as MediaTek MT6380 has to be read in 32-bit mode.
So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16
and one function pointer is introduced for increasing flexibility allowing
the determination which mode is used by the pwrap slave detecti
From: Sean Wang
Signed-off-by: Chenglin Xu
Signed-off-by: Sean Wang
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
b/Documentation/devicetree/b
CHECK: Macro argument reuse 'addr' - possible side-effects?
convert AD7280A_DEVADDR to inline function to fix checkpath check
Signed-off-by: Jaya Durga
---
drivers/staging/iio/adc/ad7280a.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/iio/adc/ad72
The coresight SoC 600 supports ETR save-restore which allows us
to restore a trace session by retaining the RRP/RWP/STS.Full values
when the TMC leaves the Disabled state. However, the TMC doesn't
have a scatter-gather unit in built.
Also, TMCs have different PIDs in different configurations (ETF,
This patch cleans up how we setup the AXICTL register on
TMC ETR. At the moment we don't set the CacheCtrl bits, which
drives the arcache and awcache bits on AXI bus specifying the
cacheablitiy. Set this to Write-back Read and Write-allocate.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
-
On Tue, 18 Jul 2017, Chen-Yu Tsai wrote:
> On Tue, Jul 18, 2017 at 3:25 PM, Quentin Schulz
> wrote:
> > Hi Lee,
> >
> > On 18/07/2017 09:18, Lee Jones wrote:
> >> On Mon, 17 Jul 2017, Quentin Schulz wrote:
> >>
> >>> Hi all,
> >>>
> >>> On 17/07/2017 11:53, Quentin Schulz wrote:
> According
Currently we are calling usb_submit_urb directly to submit deferred tx
urbs after unanchor them.
So the usb_giveback_urb_bh would failed to unref it in usb_unanchor_urb
and cause memory leak:
unreferenced object 0xffc0ce0fa400 (size 256):
...
backtrace:
[] __save_stack_trace+0x48/0x6c
The Coresight SoC 600 TMC ETR supports save-restore feature,
where the values of the RRP/RWP and STS.Full are retained
when it leaves the Disabled state. Hence, we must program the
RRP/RWP and STS.Full to a proper value. For now, set the RRP/RWP
to the base address of the buffer and clear the STS.F
If the ETR supports split cache encoding (i.e, separate bits for
read and write transfers) unlike the older version (where read
and write transfers use the same encoding in AXICTL[2-5]).
This feature is not advertised and has to be described by the
static mask associated with the device id.
Cc: Ma
TMC in Coresight SoC-600 advertises the AXI address width
in the device configuration register.
Bit 16 - AXIAW_VALID
0 - AXI Address Width not valid
1 - Valid AXI Address width in Bits[23-17]
Bits [23-17] - AXIAW. If AXIAW_VALID = b01 then
0x20 - 32bit AXI address bus
0x28 - 40bit AXI address
With new version of TMC ETR, there are differing set of
features supported by the TMC. Add the capability of a
given TMC ETR for making safer decisions at runtime.
The device configuration register of the TMC (DEVID) lists
some of the capabilities. So, we can detect some of them at
probe. However,
Coresight SoC 600 defines a new configuration for TMC, Embedded Trace
Streamer (ETS), indicated by 0x3 in MODE:CONFIG_TYPE. This would break
the existing driver which will treat anything other than ETR/ETB as an
ETF. Fix the driver to check the configuration type properly and also
add a warning if
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