Expose the idfilter* registers of the programmable replicator.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
.../coresight/coresight-dynamic-replicator.c| 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-dynamic-rep
Add support for reading a lower and upper 32bits of a register
as a single 64bit register.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-priv.h | 27 ++-
drivers/hwtracing/coresight/coresight-tmc.c | 4 ++--
2 files chang
Expose DBALO,DBAHI and AXICTL registers
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-tmc.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c
b/drivers/hwtracing/coresight/coresight-tmc.c
index cc
On 2017/7/18 17:23, Andy Shevchenko wrote:
> On Tue, 2017-07-18 at 11:03 +0200, Geert Uytterhoeven wrote:
>> Hi Andy,
>>
>> On Mon, Jul 17, 2017 at 12:24 PM, Andy Shevchenko
>> wrote:
>>> Sparse complains about wrong address space used in
>>> __acpi_map_table()
>>> and in __acpi_unmap_table().
>>>
As per coresight standards, PIDR2 register has the following format :
[2-0] - JEP106_bits6to4
[3]- JEDEC, designer ID is specified by JEDEC.
However some of the drivers only use mask of 0x3 for the PIDR2 leaving
bits [3-2] unchecked, which could potentially match the component for
a differ
Replace the obsolete compatible string for Coresight programmable
replicator with the new one.
Cc: Andy Gross
Cc: David Brown
Cc: linux-arm-...@vger.kernel.org
Cc: Mathieu Poirier
Reviewed-by: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +-
1 f
Coresight TMC splits 64bit registers into a pair of 32bit registers
(e.g DBA, RRP, RWP). Provide helpers to read/write to these registers.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-priv.h| 8
drivers/hwtracing/coresight/coresight
Replace the obsolete compatible string for Coresight programmable
replicator with the new one.
Cc: Andy Gross
Cc: David Brown
Cc: linux-arm-...@vger.kernel.org
Cc: Mathieu Poirier
Reviewed-by: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +-
1
Hi Oliver,
On 07/18/2017 05:41 PM, Oliver Neukum wrote:
Am Dienstag, den 18.07.2017, 17:36 +0800 schrieb jeffy:
Hi Oliver,
On 07/18/2017 04:41 PM, Oliver Neukum wrote:
Am Dienstag, den 18.07.2017, 16:08 +0800 schrieb jeffy:
I am afraid not. We cannot silently drop one part of a transmiss
Hi,
I just upgraded to 4.11.11 (debian unstable) to day and now I see some
new ACPI errors in dmesg:
[...]
[0.326369] PM: Registering ACPI NVS region [mem 0xccbff000-0xccd7efff]
(1572864 bytes)
[0.326806] Error parsing PCC subspaces from PCCT
[0.326839] ACPI FADT declares the syst
Hi Oliver,
> Currently we are calling usb_submit_urb directly to submit deferred tx
> urbs after unanchor them.
>
> So the usb_giveback_urb_bh would failed to unref it in usb_unanchor_urb
> and cause memory leak:
> unreferenced object 0xffc0ce0fa400 (size 256):
> ...
> backtrace:
>[] __s
This series adds support for ARM Coresight SoC-600 IP, which implements
Coresight V3 architecture. It also does some clean up of the replicator
driver namings used in the driver to prevent confusions to the user.
The SoC-600 comes with an improved TMC which supports new features,
including Save-Re
On Tue, Jul 18, 2017 at 10:37:13AM +0100, Lee Jones wrote:
> On Tue, 18 Jul 2017, Nicolas Ferre wrote:
>
> > On 18/07/2017 at 11:12, Lee Jones wrote:
> > > On Tue, 18 Jul 2017, Lee Jones wrote:
> > >
> > >> On Tue, 11 Jul 2017, Ludovic Desroches wrote:
> > >>
> > >>> For HSMC controller, the regi
On Mon, Jul 17, 2017 at 03:07:18PM -0700, Bjorn Andersson wrote:
> On Mon 17 Jul 05:04 PDT 2017, Varadarajan Narayanan wrote:
>
> > Add support for the IPQ8074 PCIe controller. IPQ8074 supports
> > Gen 1/2, one lane, two PCIe root complex with support for MSI and
> > legacy interrupts, and it conf
Use the new compatible for ATB programmable replicator in Juno.
Cc: Sudeep Holla
Cc: Mike Leach
Cc: Mathieu Poirier
Cc: Liviu Dudau
Reviewed-by: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
The Linux coresight drivers define the programmable ATB replicator as
Qualcomm replicator, while this is designed by ARM. This can cause
confusion to a user selecting the driver. Cleanup all references to
make it explicitly clear. This patch :
1) Replace the compatible string for the replicator :
On Tue, Jul 18, 2017 at 03:17:52PM +0530, Jaya Durga wrote:
> diff --git a/drivers/staging/iio/adc/ad7280a.c
> b/drivers/staging/iio/adc/ad7280a.c
> index d5ab83f..cb94b7f 100644
> --- a/drivers/staging/iio/adc/ad7280a.c
> +++ b/drivers/staging/iio/adc/ad7280a.c
> @@ -99,9 +99,12 @@
> #define AD7
On Tue 2017-07-18 11:27:53, Pavel Machek wrote:
> Hi!
>
> > On Tue, Feb 14, 2017 at 02:40:19PM +0100, Pavel Machek wrote:
> > > Probably something fun happening in userspace.
> >
> > What's the status of this one?
> >
> > I don't think it has a chance to be merged in the foreseeable future. Why
From: Simon
Add VPU/VDEC/IEP/VOPL/VOPB/ISP0/ISP1 iommu nodes
Signed-off-by: Simon
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 63
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399.d
If governor suspends soon after started, it may not have the chance to
update devfreq stats, which leaves devfreq stats' current frequence be
zero.
So when the thermal core tries to throttle the power, it would failed
to get the correct static power of current frequence and print these
warnings:
[
From: Lanqing Liu
On Spreadtrum's serial device, nearly all of interrupts would be cleared
by hardware except timeout interrupt. This patch removed the operation
of clearing all interrupt in irq handler, instead added an if statement
to check if the timeout interrupt is supposed to be cleared.
From: Simon
Add H265e/VEPU/VPU/VDEC/VOP iommu nodes
Signed-off-by: Simon
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 45
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index
From: Simon
Add IEP/ISP/VOP/HEVC/VPU iommu nodes
Signed-off-by: Simon
---
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 48
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 6d
From: Simon
Add VPU/VDEC/VOP/IEP iommu nodes
Signed-off-by: Simon
---
arch/arm/boot/dts/rk322x.dtsi | 36
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index f3e4ffd..36f7c4b 100644
--- a/arch/a
Hi Lee,
On 18/07/2017 11:49, Lee Jones wrote:
> On Tue, 18 Jul 2017, Quentin Schulz wrote:
>
>> Hi Lee,
>>
>> On 18/07/2017 09:19, Lee Jones wrote:
>>> On Mon, 17 Jul 2017, Quentin Schulz wrote:
>>>
According to their datasheets, the AXP221, AXP223, AXP288, AXP803,
AXP809 and AXP813 PEK
On Tue, Jul 18, 2017 at 10:21:18AM +0200, Johan Hovold wrote:
> On Mon, Jul 17, 2017 at 03:51:27PM +0100, Mark Brown wrote:
> > Please submit patches using subject lines reflecting the style for the
> > subsystem. This makes it easier for people to identify relevant
> > patches. Look at what exi
Currently the driver sets the pmic arbiter core interrupt as wakeup capable
irrespective of the child irqs which causes the system to wakeup
unnecessarily. To fix this, set the core interrupt as wakeup capable
only if any of the child irqs request for it. Do this by marking it as
wakeup capable in
This patch cleans up the following.
- Rename the "pa" to "pmic_arb".
- Rename the spmi_pmic_arb *dev to spmi_pmic_arb *pmic_arb.
- Rename the pa_{read,write}_data() functions to
pmic_arb_{read,write}_data().
- Rename channel to APID.
- Rename the HWIRQ_*() macros to hwirq_to_*().
- Clean up qpnp
v3:
* spmi: pmic-arb: rename pa_xx to pmic_arb_xx and other code cleanup
replaced "i" with "apid" in pmic_arb_find_apid finction.
* spmi: pmic-arb: use irq_chip callback to set spmi irq wakeup capability
Added Stephen's reviewed-by tag.
v2:
* spmi: pmic-arb: remove the rea
Returning the output value from a function, when it is possible, is the
better and cleaner way than passing it by the pointer. Hence, modify
the ppid_to_apid mapping function to return apid instead of passing
it by a pointer. While at it, pass the ppid as function parameter to
ppid_to_apid mapping
Replace the writel_relaxed with __raw_writel to avoid byte swapping
in pmic_arb_write_data() function. That way the code is independent
of the CPU endianness.
Signed-off-by: Kiran Gunda
Reviewed-by: Stephen Boyd
---
drivers/spmi/spmi-pmic-arb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
The access mode checks for peripheral ownership for read/write
permissions should not be required. Every peripheral enabled for
this master is expected to have a read/write permissions. If there
is any such invalid access due to wrong configuration in boot loader
or device tree files, then it shoul
Hi Maxime,
On Tuesday 18 Jul 2017 09:05:22 Maxime Ripard wrote:
> On Fri, Jul 14, 2017 at 02:43:12AM +0300, Laurent Pinchart wrote:
> > On Thursday 13 Jul 2017 16:41:13 Maxime Ripard wrote:
> >> The current drm_atomic_helper_commit_tail helper works only if the CRTC
> >> is accessible, and documen
On Tue, 2017-07-18 at 17:49 +0800, Hanjun Guo wrote:
> On 2017/7/17 21:29, Andy Shevchenko wrote:
> > WIP
>
> Does it mean not ready for upstream yet?
Yep, this patch is subject to discussion. I will update it in v3, though
it would be nice to discuss anyway (and test on some hardware reduced
pla
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: facdf0ed4f59 ("m68knommu: introduce basic clk infrastructure")
Cc: Greg Ungerer
Cc: Geert Uytterhoeven
Cc
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: 64909882862e ("unicore32 additional architecture files: pm related
files")
Cc: Guan Xuetao
Cc: linux-kern
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter, as some device
drivers rely on this.
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on t
On Monday 17 Jul 2017 13:41:49 Rob Herring wrote:
> On Thu, Jul 13, 2017 at 04:13:06PM +0200, Maxime Ripard wrote:
> > The Allwinner SoCs usually come with a DSI encoder. Add a binding for it.
> >
> > Signed-off-by: Maxime Ripard
> > ---
> >
> > Documentation/devicetree/bindings/display/sunxi/s
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: 3f0a06b0368d ("MIPS: ralink: adds clkdev code")
Cc: John Crispin
Cc: Ralf Baechle
Cc: linux-m...@linux-mi
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: 969003152aa9 ("blackfin: bf60x: add clock support")
Cc: Steven Miao
Cc: Masahiro Yamada
Cc: Andrew Morton
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: 780019ddf02f ("MIPS: AR7: Implement clock API")
Cc: Ralf Baechle
Cc: Paul Gortmaker
Cc: James Hogan
Cc:
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: 1d81eedb8f6c ("[ARM] 3634/1: ep93xx: initial implementation of the clk_*
API")
Cc: Hartley Sweeten
Cc: Al
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: e7300d04bd08 ("MIPS: BCM63xx: Add support for the Broadcom BCM63xx
family of SOCs.")
Cc: Ralf Baechle
Cc:
The common clock and several other clock API implementations allow
calling clk_get_rate with a NULL pointer. While not specified as
expected behavior of the API, device drivers have come to rely on that,
causing them to OOPS when run on a platform with a different clock API
implementation.
Fix thi
Make the behaviour of clk_get_rate consistent with common clk's
clk_get_rate by accepting NULL clocks as parameter. Some device
drivers rely on this, and will cause an OOPS otherwise.
Fixes: 49cbe78637eb ("[ARM] pxa: add base support for Marvell's PXA168
processor line")
Cc: Eric Miao
Cc: Haojia
Version 1:
- Initial commit
The purpose of this set of patches is to clean up the drm stm driver.
Philippe CORNU (7):
drm/stm: drv: Rename platform driver name
drm/stm: ltdc: Cleanup signal polarity defines
drm/stm: ltdc: Lindent and minor cleanups
drm/stm: ltdc: Constify funcs structures
Rename the platform driver name from "stm" to "stm32-display"
for a better readability in /sys/bus/platform/drivers entries.
Note: We keep "stm" as drm_driver.name because it is better
when using "modetest -M stm ..." (even if recent modetest patch
avoids using -M).
Signed-off-by: Philippe CORNU
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/ltdc.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index f4ed21a..8cd1b9b 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -7
v4:
* spmi: pmic-arb: add support for HW version 5
Clean-up as per Stephen's comments
v3:
* spmi: pmic-arb: add support for HW version 5
Modified #define INVALID (-1) to
#define INVALID_EE0xFF.
v2:
* spmi: pmic-arb: return __iomem pointer instead of offset
Use devm_reset_control_get to avoid resource leakage.
Also use platform_get_resource, which is more usual and
consistent with platform_get_irq called later.
Signed-off-by: Fabien Dessenne
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/ltdc.c | 9 +
1 file changed, 5 insertions(+)
If "core" memory resource is not specified, then the driver could
end up dereferencing a null pointer. Fix this issue.
Signed-off-by: Kiran Gunda
Reviewed-by: Stephen Boyd
---
drivers/spmi/spmi-pmic-arb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spmi/spmi-
Modify the pmic_arb version ops to return an __iomem pointer
to the address instead of an offset. That way we do not need to
care about the base address changes in the new HW version.
Signed-off-by: Kiran Gunda
Reviewed-by: Stephen Boyd
---
drivers/spmi/spmi-pmic-arb.c | 87
From: David Collins
Add support for version 5 of the SPMI PMIC arbiter. It utilizes
different offsets for registers than those found on version 3.
Also, the procedure to determine if writing and IRQ access is
allowed for a given PPID changes for version 5.
Signed-off-by: David Collins
Signed-o
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
index 16ae00e..568c5d0 100644
--- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
+++
Hi Ulfe,
I just wanted to make sure that no regressions happen on pandora board.
I have tested this on dra71x-evm.
Regards,
Faiz
On Monday 17 July 2017 06:38 PM, Ulf Hansson wrote:
> On 14 July 2017 at 14:46, Faiz Abbas wrote:
>> Most platforms using OMAP hsmmc driver have switched to device tr
Constify drm funcs structures.
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/ltdc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 628825b..92e58ba 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drive
From: Fenglin Wu
The opc parameter in pmic_arb_write_cmd() function is defined with type
u8 and it's always greater than or equal to 0. Checking that it's not
less than 0 is redundant and it can cause a forbidden warning during
compilation. Remove the check.
Signed-off-by: Fenglin Wu
Signed-off
The GCR_PCPOL/DEPOL/VSPOL/HSPOL defines are sufficient to
describe the HS, VS, DE & PC signal polarities.
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/ltdc.c | 28 ++--
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/d
Lindent then checkpatch --strict cleanups
Signed-off-by: Philippe CORNU
---
drivers/gpu/drm/stm/ltdc.c | 172 ++---
1 file changed, 85 insertions(+), 87 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 50e8a89..62882
On Mon, 17 Jul 2017 21:44:19 +
"Brüns, Stefan" wrote:
> On Montag, 17. Juli 2017 22:53:57 CEST Jonathan Cameron wrote:
> > On Mon, 17 Jul 2017 01:34:10 +0200
> >
> > Stefan Brüns wrote:
> > > The ina2xx driver appeared in the Linux kernel version 4.5, but provided
> > > no documentation.
One helper checks if DMA is suitable and optionally creates a bounce
buffer, if not. The other function returns the bounce buffer and makes
sure the data is properly copied back to the message.
Signed-off-by: Wolfram Sang
---
Changes since v2:
* rebased to v4.13-rc1
* helper functions are not in
So, after revisiting old mail threads and taking part in a similar discussion
on the USB list, here is what I cooked up to document and ease DMA handling for
I2C within Linux. Please have a look at the documentation introduced in patch 2
for further details.
All patches have been tested with a Ren
Signed-off-by: Wolfram Sang
---
Changes since v2:
* documentation updates. Hopefully better wording now
Documentation/i2c/DMA-considerations | 38
1 file changed, 38 insertions(+)
create mode 100644 Documentation/i2c/DMA-considerations
diff --git a/Documen
Handling this is special for this driver. Because the hardware needs to
initialize the next message in interrupt context, we cannot use the
i2c_check_msg_for_dma() directly. This helper only works reliably in
process context. So, we need to check during initial preparation of the
whole transfer and
This ensures that we fall back to PIO if the buffer is too small for DMA
being useful. Otherwise, we use DMA. A bounce buffer might be applied if
the original message buffer is not DMA safe
Signed-off-by: Wolfram Sang
---
drivers/i2c/busses/i2c-sh_mobile.c | 8 ++--
1 file changed, 6 inserti
On Tue, 18 Jul 2017, Quentin Schulz wrote:
> Hi Lee,
>
> On 18/07/2017 11:49, Lee Jones wrote:
> > On Tue, 18 Jul 2017, Quentin Schulz wrote:
> >
> >> Hi Lee,
> >>
> >> On 18/07/2017 09:19, Lee Jones wrote:
> >>> On Mon, 17 Jul 2017, Quentin Schulz wrote:
> >>>
> According to their datashee
Hi Sakari, thks for review.
On 07/09/2017 01:06 AM, Sakari Ailus wrote:
> Hi Hugues,
>
> On Mon, Jul 03, 2017 at 11:16:04AM +0200, Hugues Fruchet wrote:
>> Allows use of device tree configuration data.
>> If no device tree data is there, configuration is taken from platform data.
>> In order to k
On Mon, 17 Jul 2017, Quentin Schulz wrote:
> According to their datasheets, the AXP221, AXP223, AXP288, AXP803,
> AXP809 and AXP813 PEK have different values for startup time bits from
> the AXP20X, let's use the platform device id with the correct values.
>
> Signed-off-by: Quentin Schulz
> ---
Srikanth Jampala wrote:
> Moved the firmware to "cavium" subdirectory as suggested by
> Kyle McMartin.
>
> Signed-off-by: Srikanth Jampala
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Raveendra Padasalagi wrote:
> In Broadcom SPU driver, due to missing break statement
> in spu2_hash_xlate() while mapping SPU2 equivalent
> SHA3-512 value, -EINVAL is chosen and hence leading to
> failure of SHA3-512 algorithm. This patch fixes the same.
>
> Fixes: 9d12ba86f818 ("crypto: brcm - A
> If governor suspends soon after started, it may not have the chance to
> update devfreq stats, which leaves devfreq stats' current frequence be
> zero.
>
> So when the thermal core tries to throttle the power, it would failed
> to get the correct static power of current frequence and print these
On Tue, Jun 27, 2017 at 05:11:23PM +0530, Arvind Yadav wrote:
> of_device_ids are not supposed to change at runtime. All functions
> working with of_device_ids provided by work with const
> of_device_ids. So mark the non-const structs as const.
>
> File size before:
>text data bs
On Mon, Jun 26, 2017 at 08:41:03PM +0100, Colin King wrote:
> From: Colin Ian King
>
> trivial fix to spelling mistake in dev_info message
>
> Signed-off-by: Colin Ian King
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apa
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
On Fri, Jun 30, 2017 at 12:59:52AM -0500, Gustavo A. R. Silva wrote:
> Print error message on platform_get_irq failure before return.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
Changes in v4:
* commit messages adjusted
* subsystem prefixes corrected
Changes in v3:
* SoB chain corrected
* minor corrections based on v2 feedback
* rebase on linux-next/master as of today
Changes in v2:
* dropped already merged patches
* rebase on top of linux-next/master
* Now by de
On Tue, Jul 18, 2017 at 11:06:55AM +0100, Mark Brown wrote:
> On Tue, Jul 18, 2017 at 10:21:18AM +0200, Johan Hovold wrote:
> > On Mon, Jul 17, 2017 at 03:51:27PM +0100, Mark Brown wrote:
>
> > > Please submit patches using subject lines reflecting the style for the
> > > subsystem. This makes it
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
On Fri, Jun 30, 2017 at 01:54:16AM -0500, Gustavo A. R. Silva wrote:
> Print error message on platform_get_irq failure before return.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
On Fri, Jun 30, 2017 at 02:00:54AM -0500, Gustavo A. R. Silva wrote:
> Propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org
On Mon, Jul 03, 2017 at 08:48:48PM +0200, Corentin Labbe wrote:
> The Security System has a PRNG, this patch adds support for it via
> crypto_rng.
>
> Signed-off-by: Corentin Labbe
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gond
On Fri, Jun 30, 2017 at 02:07:04AM -0500, Gustavo A. R. Silva wrote:
> Print and propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor
On Thu, Jul 06, 2017 at 02:44:56PM -0400, Chris Gorman wrote:
> fixed WARNING: Block comments should align the * on each line
> fixed WARNINGs: Missing a blank line after declarations
> fixed ERROR: space prohibited before that ',' (ctx:WxE)
>
> Signed-off-by: Chris Gorman
Patch applied. Thanks
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
On Fri, Jul 07, 2017 at 01:33:33AM -0500, Gustavo A. R. Silva wrote:
> Check return value from call to of_match_device()
> in order to prevent a NULL pointer dereference.
>
> In case of NULL print error message and return -ENODEV
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
On Tue, Jul 11, 2017 at 03:50:06PM +0530, Raveendra Padasalagi wrote:
> SPU driver is dependent on generic MAILBOX API's to
> communicate with underlying DMA engine driver.
>
> So this patch removes BCM_PDC_MBOX "depends on" for SPU driver
> in Kconfig and adds MAILBOX as dependent module.
>
> Fi
On Fri, Jun 30, 2017 at 01:24:54AM -0500, Gustavo A. R. Silva wrote:
> Propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
On Fri, Jun 30, 2017 at 01:42:12AM -0500, Gustavo A. R. Silva wrote:
> Print and propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
atomic_t variables are currently used to implement reference
counters with the following properties:
- counter is initialized to 1 using atomic_set()
- a resource is freed upon counter reaching zero
- once counter reaches zero, its further
increments aren't allowed
- counter schema uses basi
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