On Thu, 19 Oct 2017, Josh Poimboeuf wrote:
> On Thu, Oct 19, 2017 at 04:27:31PM +0200, Miroslav Benes wrote:
> > On Thu, 19 Oct 2017, Josh Poimboeuf wrote:
> > > > I think that klp-convert can work with both. Even with non-source-based
> > > > solution you need something to generate those relocat
Chen-Yu Tsai:
>> Chen-Yu Tsai:
>>> mmc1 only has 1 possible pinmux setting.
>>
>> What if someone is using the MMC with bus width 1 and then using the
>> remaining 3 pins for something else?
>
> I would very much like to see such a design. Currently the devices
> we see all follow Allwinner's refe
On Thu, Oct 19, 2017 at 5:42 PM, Joel Fernandes wrote:
> Hi Arnd,
>
> On Thu, Oct 19, 2017 at 1:32 AM, Arnd Bergmann wrote:
>> We get a build error in the irqsoff tracer in some configurations:
>>
>> kernel/trace/trace_irqsoff.c: In function 'trace_preempt_on':
>> kernel/trace/trace_irqsoff.c:855
>>> The "Fixes" tag is an indication that the patch should be backported.
>>
>> No it's not that strong. It's an indication that the patch fixes another
>> commit, which may or may not mean it should be backported depending on
>> the preferences of the backporter. If it *does* need backporting then
On 10/19/2017 10:56 AM, Lorenzo Pieralisi wrote:
On Thu, Oct 12, 2017 at 02:48:55PM -0500, Jeremy Linton wrote:
Propagate the topology information from the PPTT tree to the
cpu_topology array. We can get the thread id, core_id and
cluster_id by assuming certain levels of the PPTT tree correspond
ian,
> >>
> >> [auto build test ERROR on linus/master]
> >> [also build test ERROR on v4.14-rc5 next-20171017]
> >> [if your patch is applied to the wrong git tree, please drop us a note to
> >> help improve the system]
> >>
> >> u
On Mon, Oct 2, 2017 at 11:12 AM, Mahesh Bandewar (महेश बंडेवार)
wrote:
> On Mon, Oct 2, 2017 at 10:14 AM, Serge E. Hallyn wrote:
>> Quoting Mahesh Bandewar (mah...@bandewar.net):
>>> From: Mahesh Bandewar
>>>
>>> [Same as the previous RFC series sent on 9/21]
>>>
>>> TL;DR version
>>> --
On 10/19, Andrei Vagin wrote:
>
> Hi Gargi,
>
> This patch breaks CRIU, because it changes a meaning of ns_last_pid.
...
> > @@ -311,7 +297,7 @@ static int pid_ns_ctl_handler(struct ctl_table *table,
> > int write,
> > * it should synchronize its usage with external means.
> > */
> >
On Thu, Oct 19, 2017 at 06:00:54PM +0200, Miroslav Benes wrote:
> On Thu, 19 Oct 2017, Josh Poimboeuf wrote:
> > My main objection to merging klp-convert in its current state is that
> > it's not useful by itself. In fact, it's actively dangerous if people
> > assume that because it's in-tree, it'
* H. Nikolaus Schaller [171018 08:49]:
>
> > Am 18.10.2017 um 15:22 schrieb Tony Lindgren :
> >
> > * H. Nikolaus Schaller [171018 05:49]:
> >>> Am 18.10.2017 um 14:28 schrieb Pavel Machek :
> >>>
> >>> So I started something, it is at.
> >>>
> >>> https://github.com/pavelmachek/libbattery
>
Paul Moore writes:
> On Wed, Oct 18, 2017 at 8:43 PM, Eric W. Biederman
> wrote:
>> Aleksa Sarai writes:
> The security implications are that anything that can change the label
> could also hide itself and its doings from the audit system and thus
> would be used as a means to evade
From: Kamalesh Babulal
When an error occurs before adding an allocated insn to the list, free
it before returning.
Signed-off-by: Kamalesh Babulal
Signed-off-by: Josh Poimboeuf
---
tools/objtool/check.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/tools/objtool
On 10/02/2017 03:54 AM, Ryder Lee wrote:
> This patch updates pio, usb and crypto nodes to make them be consistent
> with the binding documents.
>
> Signed-off-by: Ryder Lee
> ---
> arch/arm/boot/dts/mt7623.dtsi | 26 ++
> 1 file changed, 14 insertions(+), 12 deletions(
On 10/02/2017 03:54 AM, Ryder Lee wrote:
> This patch adds missing susbsystem clock controllers nodes for MT7623.
> (e.g., mmsys, imgsys, vdecsys and bdpsys)
>
> Signed-off-by: Ryder Lee
> ---
> arch/arm/boot/dts/mt7623.dtsi | 32
> 1 file changed, 32 insertion
On asus T100, Capella cm3218 chip is implemented as ambiant light
sensor. This chip expose an smbus ARA protocol device on standard
address 0x0c. The chip is not functional before all alerts are
acknowledged.
On asus T100, this device is enumerated on ACPI bus and the description
give tow I2C conne
On 10/19/2017 07:33 AM, Colin King wrote:
From: Colin Ian King
The pointer dma_dev_name is assigned but never read, it is redundant
and can therefore be removed.
Cleans up clang warning:
sound/soc/intel/common/sst-firmware.c:288:3: warning: Value stored to
'dma_dev_name' is never read
Signe
On Fri, Oct 20, 2017 at 12:02 AM, Joonas Kylmälä wrote:
> Chen-Yu Tsai:
>>> Chen-Yu Tsai:
mmc1 only has 1 possible pinmux setting.
>>>
>>> What if someone is using the MMC with bus width 1 and then using the
>>> remaining 3 pins for something else?
>>
>> I would very much like to see such a d
Good day,
I am Mr James Amin, I am Requesting for your partnership in re-profiling funds,
Contact me for more details.
Thanks,
Mr James Amin
Christian Brauner writes:
> On Wed, Oct 18, 2017 at 07:48:14PM -0500, Eric W. Biederman wrote:
>> Christian Brauner writes:
>>
>> > I'm not sure why the build is complaining about how the union is
>> > initialized
>> > here. This looks legitimate to me and I can't reproduce this locally with
While the core of the backup mode for SAMA5D2 has been integrated in
v4.13, it is far from complete. Individual controllers in the chip have
drivers that do not support the reset of the registers during suspend,
and they need to be adapted to handle it.
The first patch uses the clock wakeup code f
Wait for the syncronization of all clocks when resuming, not only the
UPLL clock. Do not use regmap_read_poll_timeout, as it will call BUG()
when interrupts are masked, which is the case in here.
Signed-off-by: Romain Izard
Acked-by: Ludovic Desroches
Acked-by: Nicolas Ferre
---
drivers/clk/at
From: Romain Izard
When an AT91 programmable clock is declared in the device tree, register
it into the Power Management Controller driver. On entering suspend mode,
the driver saves and restores the Programmable Clock registers to support
the backup mode for these clocks.
Signed-off-by: Romain
The contents of the System Clock Status Register (SCSR) needs to be
restored into the System Clock Enable Register (SCER).
As the bootloader will restore some clocks by itself, the issue can be
missed as only the USB controller, the LCD controller, the Image Sensor
controller and the programmable
Save and restore registers for the PWM on suspend and resume, which
makes hibernation and backup modes possible.
Signed-off-by: Romain Izard
Acked-by: Nicolas Ferre
---
Changes in v5:
* extract from the patch series, and send as a standalone patch
drivers/pwm/pwm-atmel-tcb.c | 63 +
The controller used by a flexcom module is configured at boot, and left
alone after this. As the configuration will be lost after backup mode,
restore the state of the flexcom driver on resume.
Signed-off-by: Romain Izard
Acked-by: Nicolas Ferre
Tested-by: Nicolas Ferre
---
Changes in v5:
* ext
On 10/02/2017 03:54 AM, Ryder Lee wrote:
> From: Weiqing Kong
>
> This patch adds the device node for MT2701 pwm backlight.
>
> Signed-off-by: Weiqing Kong
> Signed-off-by: Erin Lo
> Signed-off-by: Ryder Lee
> ---
> arch/arm/boot/dts/mt2701.dtsi | 9 +
> 1 file changed, 9 insertion
On 10/02/2017 03:54 AM, Ryder Lee wrote:
> From: Weiqing Kong
>
> This patch adds board related config for MT2701 pwm backlight.
>
> Signed-off-by: Weiqing Kong
> Signed-off-by: Erin Lo
> Signed-off-by: Ryder Lee
> ---
> arch/arm/boot/dts/mt2701-evb.dts | 23 +++
> 1 fi
On 10/02/2017 03:54 AM, Ryder Lee wrote:
> This patch adds interrupt-names property in audio node so that
> binding can be agnostic of the IRQ order.
>
> Signed-off-by: Ryder Lee
> ---
> arch/arm/boot/dts/mt2701.dtsi | 4 +++-
> arch/arm/boot/dts/mt7623.dtsi | 4 +++-
> 2 files changed, 6 inse
On 10/02/2017 03:55 AM, Ryder Lee wrote:
> This patch adds devices nodes and updates pinmux setting for the PICe
> function block. Just note that PCIe port2 PHY is shared with U3 port.
>
> Signed-off-by: Ryder Lee
> ---
> arch/arm/boot/dts/mt7623.dtsi | 108
> +
Hi,
We run CRIU tests for tip/auto-latest regularly, and a few days ago our
test job started to detect this warning in a kernel log:
[ 44.235786] WARNING: can't dereference iret registers at 8801c5f17fe0
for ip 95f0d94b
What does it mean? How critical is it?
Our test job fails if
Den 19. okt. 2017 17:42, skrev Egil Hjelmeland:
On 19. okt. 2017 17:15, David Laight wrote:
From: Andrew Lunn
Sent: 19 October 2017 15:15
+/* Clear learned (non-static) entry on given port */
+static void alr_loop_cb_del_port_learned(struct lan9303 *chip, u32
dat0,
+ u3
Hi all,
On Thu, Oct 12, 2017 at 01:20:46PM +0100, Will Deacon wrote:
> This is version three of the patches previously posted here:
>
> v1:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-October/534666.html
> v2:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2017-October
Hi,
I missed the rest of the comment below..
On 10/19/2017 10:56 AM, Lorenzo Pieralisi wrote:
On Thu, Oct 12, 2017 at 02:48:55PM -0500, Jeremy Linton wrote:
Propagate the topology information from the PPTT tree to the
cpu_topology array. We can get the thread id, core_id and
cluster_id by ass
Hi Tony,
> Am 19.10.2017 um 18:24 schrieb Tony Lindgren :
>
> * H. Nikolaus Schaller [171018 08:49]:
>>
>>> Am 18.10.2017 um 15:22 schrieb Tony Lindgren :
>>>
>>> * H. Nikolaus Schaller [171018 05:49]:
> Am 18.10.2017 um 14:28 schrieb Pavel Machek :
>
> So I started something, it
This gives another chance to read or write quota data.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/super.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/fs/f2fs/super.c b/fs/f2fs/super.c
index fc3b74e53670..2c6e9adce464 100644
--- a/fs/f2fs/super.c
+++ b/fs/f2fs/s
This case is not happening easily.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/f2fs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index e0ef31cb2cc6..6301ccca 100644
--- a/fs/f2fs/f2fs.h
+++ b/fs/f2fs/f2fs.h
@@ -1544,7 +1544,7 @@ static inli
> On Tue, Oct 17, 2017 at 11:50:05AM +, alexander.stef...@infineon.com
> wrote:
> > > > Replace the specification of data structures by pointer dereferences
> > > > as the parameter for the operator "sizeof" to make the corresponding
> > > > size
> > > > determination a bit safer according to t
On Thu, Oct 19, 2017 at 09:53:11PM +1100, Balbir Singh wrote:
> On Thu, Oct 19, 2017 at 2:28 PM, Jerome Glisse wrote:
> > On Thu, Oct 19, 2017 at 02:04:26PM +1100, Balbir Singh wrote:
> >> On Mon, 16 Oct 2017 23:10:02 -0400
> >> jgli...@redhat.com wrote:
> >>
> >> > From: Jérôme Glisse
> >> >
> >
From: Kan Liang
Remove the special codes in generic uncore_perf_event_update.
Introduce inline function to check the fixed counter event.
Signed-off-by: Kan Liang
---
Changes since V1:
- New file to address check event->hw.idx >= UNCORE_PMC_IDX_FIXED
arch/x86/events/intel/uncore.c | 4 ++--
From: Kan Liang
As of Skylake Server, there are a number of free-running counters in
each IIO Box that collect counts for per box IO clocks and per Port
Input/Output x BW/Utilization.
Freerunning counters cannot be written by SW. Counting will be suspended
only when the IIO Box is powered down.
From: Kan Liang
The clinet IMC uncore is the only one who claims two 'fixed counters'.
To specially handle it, event->hw.idx >= UNCORE_PMC_IDX_FIXED is used to
check fixed counters in the generic uncore_perf_event_update.
It does not have problem in current code. Because there are no counters
who
From: Kan Liang
There are a number of freerunning counters introduced for uncore.
For example, Skylake Server has IIO freerunning counters to collect
Input/Output x BW/Utilization.
The freerunning counter is similar as fixed counter, except it cannot
be written by SW. It needs to be specially ha
> On Tue, Oct 17, 2017 at 04:32:29PM -0400, Nayna Jain wrote:
> > The function wait_for_tpm_stat() is currently defined in
> > tpm-interface file. It is a hardware specific function used
> > only by tpm_tis and xen-tpmfront, so it is removed from
> > tpm-interface.c and defined in respective driver
Hi Eduardo,
** I'm not if I took the right branch **
The changes are based on top of the thermal-soc branch.
Note from the previous pull I removed the hikey960 support series in
order to sort out the multiple threshold before submitting again.
The pull request contains the following changes:
On 10/19/2017 04:48 AM, Weiyi Lu wrote:
> This series is based on v4.14-rc1 and composed of
> clock control (PATCH 1-4) and scpsys control (PATCH 5-9)
>
> changes since v4:
> - Refine scpsys and infracfg for bus protection by passing
> a boolean flag to determine the register update method.
>
* H. Nikolaus Schaller [171019 09:57]:
> Hi Tony,
>
> > Am 19.10.2017 um 18:24 schrieb Tony Lindgren :
> >
> > * H. Nikolaus Schaller [171018 08:49]:
> >>
> >>> Am 18.10.2017 um 15:22 schrieb Tony Lindgren :
> >>>
> >>> * H. Nikolaus Schaller [171018 05:49]:
> > Am 18.10.2017 um 14:28 sc
By essence, the tsensor does not really support multiple sensor at the same
time. It allows to set a sensor and use it to get the temperature, another
sensor could be switched but with a delay of 3-5ms. It is difficult to read
simultaneously several sensors without a big delay.
Today, just one sen
The interrupt for the temperature threshold is not enabled at the end of the
probe function, enable it after the setup is complete.
On the other side, the irq_enabled is not correctly set as we are checking if
the interrupt is masked where 'yes' means irq_enabled=false.
irq_get_irqchip_st
The sensor is all setup, bind, resetted, acked, etc... every single second.
That was the way to workaround a problem with the interrupt bouncing again and
again.
With the following changes, we fix all in one:
- Do the setup, one time, at probe time
- Add the IRQF_ONESHOT, ack the interrupt in
The mutex is used to protect against writes in the configuration register.
That happens at probe time, with no possible race yet.
Then when the module is unloaded and at suspend/resume.
When the module is unloaded, it is an userspace operation, thus via a process.
Suspending the system goes thro
Everything mentionned here:
https://lkml.org/lkml/2016/4/20/850
This driver was added before the devm_iio_channel_get() function version was
merged. The sensor should be released before the iio channel, thus we had to
use the non-devm version of thermal_zone_of_sensor_register().
Now the devm_ii
The iio_channel_get() function has now its devm_ version.
Use it and remove all the rollback code for iio_channel_release() as well
as the .remove ops.
[Compiled tested only]
Signed-off-by: Daniel Lezcano
---
drivers/thermal/qcom-spmi-temp-alarm.c | 43 +++---
1 fil
From: Kevin Wangtao
Use round up division to ensure the programmed value of threshold and the lag
are not less than what we set, and in order to keep the accuracy while using
round up division, the step value should be a rounded up value. There is
no need to use hisi_thermal_round_temp.
Signed-
There is a particular situation when the cooling device is cpufreq and the heat
dissipation is not efficient enough where the temperature increases little by
little until reaching the critical threshold and leading to a SoC reset.
The behavior is reproducible on a hikey6220 with bad heat dissipati
On Thu, Oct 19, 2017 at 04:27:23PM +0100, David Howells wrote:
> Eric Biggers wrote:
>
> > Hi Ben, thanks for pointing this out. I had assumed the "obvious"
> > semantics,
> > but it turns out that's not what's documented.
>
> The manpage is correct. keyctl_read_alloc() in libkeyutils relies
From: Kevin Wangtao
The sensor's clock is enabled and disabled outside of the probe and
disable function. Moving the corresponding action in the
hisi_thermal_setup() and hisi_thermal_disable_sensor(), factors out
some lines of code and makes the code more symmetric.
Signed-off-by: Kevin Wangtao
The presence of the thermal data pointer in the sensor structure has the unique
purpose of accessing the thermal data in the interrupt handler.
The sensor pointer is passed when registering the interrupt handler, replace the
cookie by the thermal data pointer, so the back pointer is no longer need
There is no point to specify the temperature as long variable, the int is
enough.
Replace all long variables to int, so making the code consistent.
Signed-off-by: Daniel Lezcano
Reviewed-by: Leo Yan
---
drivers/thermal/hisi_thermal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
d
Hopefully, the function name can help to clarify the semantic of the operations
when writing in the register.
Signed-off-by: Daniel Lezcano
---
drivers/thermal/hisi_thermal.c | 92 --
1 file changed, 70 insertions(+), 22 deletions(-)
diff --git a/drivers/
The TEMP0_CFG configuration register contains different field to set up the
temperature controller. However in the code, nothing prevents a setup to
overwrite the previous one: eg. writing the hdak value overwrites the sensor
selection, the sensor selection overwrites the hdak value.
In order to p
The threaded interrupt inspect the sensors structure to look in the temp
threshold field, but this field is read-only in all the code, except in the
probe function before the threaded interrupt is set. In other words there
is not race window in the threaded interrupt when reading the field value.
+ Arnd
On Thu, Oct 19, 2017 at 02:32:45PM +, Kalle Valo wrote:
> Kalle Valo writes:
>
> > Brian Norris wrote:
> >
> >> For devices where the FW supports WoWLAN but user-space has not
> >> configured it, we don't do any PCI-specific suspend/resume operations,
> >> because mac80211 doesn't ca
Rename the 'sensors' field to 'sensor' as we describe only one sensor.
Remove the 'sensor_temp' as it is no longer used.
Signed-off-by: Daniel Lezcano
Reviewed-by: Leo Yan
Tested-by: Leo Yan
---
drivers/thermal/hisi_thermal.c | 18 --
1 file changed, 8 insertions(+), 10 deletio
* Mathieu Desnoyers:
> Speaking of optimization, I think the rseq.c helper library
> (and eventually glibc) should define the __rseq_abi TLS
> variable with __attribute__((tls_model("initial-exec"))).
> It provides faster, and signal-safe, accesses to the TLS
> variable from libraries.
>
> The ide
ELAN0611 touchpad uses elan_i2c as its driver. It can be found
on Lenovo ideapad 320-15IKB.
So add it to ACPI table to enable the touchpad.
BugLink: https://bugs.launchpad.net/bugs/1723736
Signed-off-by: Kai-Heng Feng
---
drivers/input/mouse/elan_i2c_core.c | 1 +
1 file changed, 1 insertion(+)
The step and the base temperature are fixed values, we can simplify the
computation by converting the base temperature to milli celsius and use a
pre-computed step value. That saves us a lot of mult + div for nothing at
runtime.
Take also the opportunity to change the function names to be consiste
The threaded interrupt for the alarm interrupt is requested before the
temperature controller is setup. This one can fire an interrupt immediately
leading to a kernel panic as the sensor data is not initialized.
In order to prevent that, move the threaded irq after the Tsensor is setup.
Signed-of
The DT specifies a threshold of 65000, we setup the register with a value in
the temperature resolution for the controller, 64656.
When we reach 64656, the interrupt fires, the interrupt is disabled. Then the
irq thread runs and calls thermal_zone_device_update() which will call in turn
hisi_therm
The TMC-ETR supports routing the Coresight trace data to the
System memory. It supports two different modes in which the memory
could be used.
1) Contiguous memory - The memory is assumed to be physically
contiguous.
2) Scatter Gather list - The memory can be chunks of 4K pages,
which are specifi
Right now we issue an update_buffer() and reset_buffer() call backs
in succession when we stop tracing an event. The update_buffer is
supposed to check the status of the buffer and make sure the ring buffer
is updated with the trace data. And we store information about the
size of the data collecte
This patch adds a helper to insert barrier packets for a given
size (aligned to packet size) at given offset in an etr_buf. This
will be used later for perf mode when we try to start in the
middle of an SG buffer.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresig
We zero out the entire trace buffer used for ETR before it
is enabled, for helping with debugging. Since we could be
restoring a session in perf mode, this could destroy the data.
Get rid of this step, if someone wants to debug, they can always
add it as and when needed.
Cc: Mathieu Poirier
Signe
Since the ETR now uses mode specific buffers, we can reliably
provide the trace data captured in sysfs mode, even when the ETR
is operating in PERF mode.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 14 ++
1 file changed,
Add necessary support for using ETR as a sink in ETM perf tracing.
We try make the best use of the available modes of buffers to
try and avoid software double buffering.
We can use the perf ring buffer for ETR directly if all of the
conditions below are met :
1) ETR is DMA coherent
2) perf is us
At the moment we always use contiguous memory for TMC ETR tracing
when used from sysfs. The size of the buffer is fixed at boot time
and can only be changed by modifiying the DT. With the introduction
of SG support we could support really large buffers in that mode.
This patch abstracts the buffer
On Wed, Oct 18, 2017 at 10:49 PM, Jason A. Donenfeld wrote:
> static void fill_random_ptr_key(struct random_ready_callback *rdy)
> {
> get_random_bytes(&ptr_secret, sizeof(ptr_secret));
> static_branch_disable(&no_ptr_secret);
> }
>
> static struct random_ready_callback random_ready = {
>
Convert component enable/disable messages from dev_info to dev_dbg.
This is required to prevent LOCKDEP splats when operating in perf
mode where we could be called with locks held to enable a coresight
path. If someone wants to really see the messages, they can always
enable it at runtime via dynam
Add support for creating buffers which can be used in save-restore
mode (e.g, for use by perf). If the TMC-ETR supports save-restore
feature, we could support the mode in all buffer backends. However,
if it doesn't, we should fall back to using in built SG mechanism,
where we can rotate the SG tabl
Since the ETR could be driven either by SYSFS or by perf, it
becomes complicated how we deal with the buffers used for each
of these modes. The ETR driver cannot simply free the current
attached buffer without knowing the provider (i.e, sysfs vs perf).
To solve this issue, we provide:
1) the drive
Track if the ETR is dma-coherent or not. This will be useful
in deciding if we should use software buffering for perf.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-tmc.c | 5 -
drivers/hwtracing/coresight/coresight-tmc.h | 1 +
2 files change
Now that we can dynamically switch between contiguous memory and
SG table depending on the trace buffer size, provide the support
for selecting an appropriate buffer size.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
.../ABI/testing/sysfs-bus-coresight-devices-tmc| 8 ++
dri
Make the ETR SG table Circular buffer so that we could start
at any of the SG pages and use the entire buffer for tracing.
This can be achieved by :
1) Keeping an additional LINK pointer at the very end of the
SG table, i.e, after the LAST buffer entry, to point back to
the beginning of the first
This patch introduces a generic sg table data structure and
associated operations. An SG table can be used to map a set
of Data pages where the trace data could be stored by the TMC
ETR. The information about the data pages could be stored in
different formats, depending on the type of the underlyi
On Thu, Oct 19, 2017 at 4:20 AM, Michal Hocko wrote:
> On Tue 17-10-17 13:01:04, Kees Cook wrote:
>> On Tue, Oct 17, 2017 at 2:04 AM, Michal Hocko wrote:
> [...]
>> > I am not insisting on this patch but it seems to me is just makes a
>> > recoverable state a failure.
>>
>> Right, I understand yo
We don't support ETR in perf mode yet. Temporarily fail the
operation until we add proper support.
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 28 ++---
1 file changed, 2 insertions(+), 26 deletions(-)
diff --git
This patch adds support for setting up an SG table used by the
TMC ETR inbuilt SG unit. The TMC ETR uses 4K page sized tables
to hold pointers to the 4K data pages with the last entry in a
table pointing to the next table with the entries, by kind of
chaining. The 2 LSBs determine the type of the t
On 10/19/2017 04:48 AM, Weiyi Lu wrote:
> MT2712 add "set/clear" bus control register to each control register set
> instead of providing only one "enable" control register, we could avoid
> the read-modify-write racing by using extend API with such new design.
> By improving the mtk-infracfg bus
On 10/19/17 07:50, David Howells wrote:
> From: Kyle McMartin
>
> Make an option to provide a sysrq key that will lift the kernel lockdown,
> thereby allowing the running kernel image to be accessed and modified.
>
> On x86_64 this is triggered with SysRq+x, but this key may not be available
> o
At the moment we adjust the buffer pointers for reading the trace
data via misc device in the common code for ETF/ETB and ETR. Since
we are going to change how we manage the buffer for ETR, let us
move the buffer manipulation to the respective driver files, hiding
it from the common code. We do so
Right now we open code filling the trace buffer with synchronization
packets when the circular buffer wraps around in different drivers.
Move this to a common place.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-etb10.c | 10 +++-
On 10/19/2017 03:33 AM, Ulf Hansson wrote:
> On 18 October 2017 at 23:48, Rafael J. Wysocki wrote:
>> On Wednesday, October 18, 2017 9:45:11 PM CEST Grygorii Strashko wrote:
>>>
>>> On 10/18/2017 09:11 AM, Ulf Hansson wrote:
>>
>> [...]
>>
>> That's the point. We know pm_runtime_force_* work
> Am 19.10.2017 um 19:06 schrieb Tony Lindgren :
>
> * H. Nikolaus Schaller [171019 09:57]:
>> Hi Tony,
>>
>>> Am 19.10.2017 um 18:24 schrieb Tony Lindgren :
>>>
>>> * H. Nikolaus Schaller [171018 08:49]:
> Am 18.10.2017 um 15:22 schrieb Tony Lindgren :
>
> * H. Nikolaus Sc
Code refactoring in order to make the code easier to read and maintain.
Signed-off-by: Gustavo A. R. Silva
---
This code was tested by compilation only (GCC 7.2.0 was used).
net/netrom/nr_route.c | 63 ---
1 file changed, 20 insertions(+), 43 dele
- On Oct 18, 2017, at 3:59 PM, Paul E. McKenney paul...@linux.vnet.ibm.com
wrote:
> Hello, Linus,
Hi Linus,
Time did fly since I submitted this series near the beginning of
the 4.14 rc cycle. Now that we are closer to the end of the cycle,
a more surgical approach would be more appropriate.
Hi,
On 10/19/2017 01:05 AM, Al Viro wrote:
On Wed, Oct 18, 2017 at 10:32:30PM +0200, Krzysztof Opasiak wrote:
@@ -417,7 +417,7 @@ static int task_get_unused_fd_flags(struct binder_proc
*proc, int flags)
rlim_cur = task_rlimit(proc->tsk, RLIMIT_NOFILE);
unlock_task_sighand(proc
[ This patch is sent directly to Linus, because it needs to be merged
before the end of 4.14 rc cycle. It introduces a "register private
expedited" membarrier command which allows eventual removal of
important memory barrier constraints on the scheduler fast-paths. It
changes how the "priva
On 10/19/2017 09:34 AM, Greg KH wrote:
On Wed, Oct 18, 2017 at 10:32:27PM +0200, Krzysztof Opasiak wrote:
Allow to get() and put() signal struct from different
parts of kernel core, not only from signal.c.
That says what this does, but not _why_. Who would ever want to have
access to these
On Thu, Oct 19, 2017 at 09:24:16AM -0700, Tony Lindgren wrote:
> * H. Nikolaus Schaller [171018 08:49]:
> >
> > > Am 18.10.2017 um 15:22 schrieb Tony Lindgren :
> > >
> > > * H. Nikolaus Schaller [171018 05:49]:
> > >>> Am 18.10.2017 um 14:28 schrieb Pavel Machek :
> > >>>
> > >>> So I started
> Tangent: why is the random_ready API designed with -EALREADY? Couldn't
> add_random_ready_callback() just perform the call itself and avoid
> needing all the callers to check for -EALREADY?
Absolutely. I can submit a patch for this soon, though to avoid merge
dependencies, and given the usual de
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Signed-off-by: Gustavo A. R. Silva
---
This code was tested by compilation only (GCC 7.2.0 was used).
Please, verify if the actual intention of the code is to fall through.
net/netrom/nr
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