All zero read and write masks in the regmap config are used to signal no
special mask is needed and the bus defaults are used. In some devices
all zero read/write masks are the special mask and bus defaults should
not be used. To signal this a new variable is added.
For example SPI often sets bit
From: Colin Ian King
Use the ARRAY_SIZE macro on array buf to determine size of the array.
Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 2 +-
1 file changed, 1
On Saturday, January 6, 2018 4:05:41 AM CET Anson Huang wrote:
> Hi, Rafael
>
> Best Regards!
> Anson Huang
>
>
> > -Original Message-
> > From: rjwyso...@gmail.com [mailto:rjwyso...@gmail.com] On Behalf Of Rafael
> > J. Wysocki
> > Sent: 2018-01-05 8:21 PM
> > To: Anson Huang
On 2018/1/6 4:55, SF Markus Elfring wrote:
From: Markus Elfring
Date: Fri, 5 Jan 2018 21:45:04 +0100
Omit an extra message for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus
When more than one GP timers are used as kernel system timers and the
corresponding nodes in device-tree are marked with the same "disabled"
property, then the "attr" field of the property will be initialized
more than once as the property being added to sys file system via
This adds the new board-specfic clock init in mach-davinci/da830.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
This moves the call of davinci_clk_init() from map_io to init_time for all
boards.
This is the proper place to init clocks. This is also done in preparation
for moving to the common clock framework.
dm646x is a special case because we need to handle different ref_clk rates
depending on which
This adds the new board-specfic clock init in mach-davinci/dm646x.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
Hi Cyrille,
Gentle ping...
BR,
Guochun
On Mon, 2017-12-18 at 09:47 +0800, Guochun Mao wrote:
> Since more and more Mediatek's SoC can use this driver to
> control spi-nor flash, functions' name with "mt8173_" is
> no longer properly. Replacing "mt8173_" with "mtk_" will
> be more accurate to
This adds a new binding for multiplexer clocks that are part of the
CFGCHIPn registers on TI DA8XX-like SoCs. Currently, there are only
bindings given for the ASYNC3 clock domain, but there are additional
clock multiplexers in this syscon that could be added in the future
if needed.
This adds the new board-specfic clock init in mach-davinci/dm365.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
This adds the new board-specfic clock init in mach-davinci/dm355.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
This adds the new board-specfic clock init in mach-davinci/da850.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Some CFGCHIP* #defines are removed since they are included in the
On 01/07/2018 04:56 PM, Michael Ellerman wrote:
> Michal Hocko writes:
>
>> On Sun 07-01-18 12:19:32, Anshuman Khandual wrote:
>>> On 01/05/2018 02:16 PM, Michal Hocko wrote:
>> [...]
Could you give us more information about the failure please. Debugging
patch from
On Fri, 2018-01-05 at 13:02 -0600, Rob Herring wrote:
> On Thu, Jan 04, 2018 at 03:44:20PM +0800, Ryder Lee wrote:
> > Add "simple-mfd" to support MFD device and add a compatible string for
> > MT2701.
> >
> > Signed-off-by: Ryder Lee
> > ---
> >
On 12/29/17 12:20 AM, Masami Hiramatsu wrote:
Please run Josef's test in the !ftrace setup.
Yes, I'll add the result of the test case.
if Josef's test is passing in !ftrace config,
please resend your patches.
I think 2 and 3 were nice simplifications.
and patch 1 is good too if it's passes
We should not call 'edac_mc_del_mc()' if a corresponding call to
'edac_mc_add_mc()' has not been performed yet.
So here, we should go to err instead of err2 to branch at the right place
of the error handling path.
Signed-off-by: Christophe JAILLET
---
On Sun, Jan 07, 2018 at 09:57:50PM +0100, Thomas Gleixner wrote:
> As the meltdown/spectre problem affects several CPU architectures, it makes
> sense to have common way to express whether a system is affected by a
> particular vulnerability or not. If affected the way to express the
> mitigation
On Sun, 7 Jan 2018, Greg Kroah-Hartman wrote:
> > drivers/base/Kconfig |3 +++
> > drivers/base/cpu.c | 48
> >
> > include/linux/cpu.h |7 +++
> > 3 files changed, 58 insertions(+)
>
> A Documentation/ABI/ update is needed for
On Sun, Jan 7, 2018 at 2:11 PM, David Woodhouse wrote:
> This is a mitigation for the 'variant 2' attack described in
> https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
Ok, I don't love the patches, but I see nothing horribly wrong here
Thomas Gleixner wrote:
> Create /sys/devices/system/cpu/vulnerabilities folder and files for
> meltdown, spectre_v1 and spectre_v2.
It is called "grep -e '^bugs' /proc/cpuinfo".
kpti is deduceable from .config and /proc/cmdline .
If people don't know what .config they are running, god bless
On Sun, Jan 07, 2018 at 12:17:11PM -0800, Linus Torvalds wrote:
> We need to fix the security problem, but we need to do it *without*
> these braindead arguments that performance is somehow secondary.
OK OK. At least we should have security by default and let people trade
it against performance
On Sun, Jan 7, 2018 at 5:04 PM, Minchan Kim wrote:
>> - link->next = -1 << OBJ_TAG_BITS;
>> + link->next = -1U << OBJ_TAG_BITS;
>
> -1UL?
Oh, boy, shouldn't be rather GENMASK() / GENMASK_ULL() in a way how
it's done, for example,
On Sat, Jan 6, 2018 at 2:42 PM, Jonathan Cameron wrote:
> On Thu, 4 Jan 2018 22:06:31 +0530
>> /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
>> -#define AD7152_SETUP_CAPDIFF (1 << 5)
>> +#define AD7152_SETUP_CAPDIFF BIT(5)
>
> This is indeed a 1
On Saturday, January 6, 2018 5:40:34 PM CET Doug Smythies wrote:
> On 2018.01.05 14:52 Rafael J. Wysocki wrote:
> > On Fri, Jan 5, 2018 at 11:14 PM, Doug Smythies
> > wrote:
>
> >> Allow use of the trace_pstate_sample trace function
> >> when the intel_pstate driver is
On Tue, 2 Jan 2018, Arnd Bergmann wrote:
> The CLKRUN fix caused a few harmless compile-time warnings:
>
> drivers/char/tpm/tpm_tis.c: In function 'tpm_tis_pnp_remove':
> drivers/char/tpm/tpm_tis.c:274:23: error: unused variable 'priv'
> [-Werror=unused-variable]
> drivers/char/tpm/tpm_tis.c:
From: Colin Ian King
Use the ARRAY_SIZE macro on array seg6_action_table to determine size of
the array. Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
net/ipv6/seg6_local.c | 2 +-
1 file changed, 1 insertion(+), 1
This adds a new driver for mach-davinci PSC clocks. This is porting the
code from arch/arm/mach-davinci/psc.c to the common clock framework and
is converting it to use regmap to simplify the code. Additionally, it adds
device tree support for these clocks.
Note: although there are similar clocks
This adds platform-specific declarations for the PSC clocks on TI DA830/
OMAP-L137/AM17XX SoCs.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/psc-da830.c | 96 +
This adds a new binding for the Power Sleep Controller (PSC) for the
mach-davinci family of processors.
Note: Although TI Keystone has a very similar PSC, we are not using the
existing bindings. Keystone is using a legacy one-node-per-clock binding
(actually two nodes if you count the separate
This adds platform-specific declarations for the PLL clocks on TI
DaVinci 355 based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/pll-dm355.c | 40
include/linux/clk/davinci.h
Improve error handling when arming ftrace-based kprobes. Specifically, if
we fail to arm a ftrace-based kprobe, register_kprobe()/enable_kprobe()
should report an error instead of success. Previously, this has lead to
confusing situations where register_kprobe() would return 0 indicating
success,
Hi,
This patchset attempts to improve error handling when arming or disarming
ftrace-based kprobes. The current behavior is to simply WARN when ftrace
(un-)registration fails, without propagating the error code. This can lead
to confusing situations where, for example,
Improve error handling when disarming ftrace-based kprobes. Like with
arm_kprobe_ftrace(), propagate any errors from disarm_kprobe_ftrace() so
that we do not disable/unregister kprobes that are still armed. In other
words, unregister_kprobe() and disable_kprobe() should not report success
if the
Hi Olsa,
What about this fix now? Thanks!
On Tue, Dec 26, 2017 at 05:26:56PM +0800, changbin...@intel.com wrote:
> From: Changbin Du
>
> The terminal character '\0' should take into account as size of the string
> buffer. Without this fix, the '--graph-funcs',
Best Regards
hongxing zhu
Linux BSP team
Office: 86-21-28937189
Email: hongxing@nxp.com
> -Original Message-
> From: Ilya Ledvich [mailto:i...@compulab.co.il]
> Sent: Thursday, January 04, 2018 9:53 PM
> To: Richard Zhu ; Lucas Stach
>
Hi Cyrille,
On Sun, 24 Dec 2017 05:36:04 +0100
Cyrille Pitchen wrote:
> This patch has two purposes:
>
> 1 - To fix the compatible issue between the MTD and SPI sub-systems
>
> The MTD sub-system has no particular requirement about the memory areas it
> uses.
From: Markus Elfring
Date: Sun, 7 Jan 2018 21:58:42 +0100
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete an error message for a failed memory allocation
Improve a size determination
From: Markus Elfring
Date: Sun, 7 Jan 2018 21:42:07 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
On 01/07/2018 11:04 AM, Paul Gortmaker wrote:
[Re: [PATCH] tools: fix cross-compile var export] On 07/01/2018 (Sun 10:31)
Martin Kelly wrote:
[...]
With the change, we add do CC = $(CROSS_COMPILE)gcc if and only if CC is not
already set. I'm happy to add all these details to the commit
Convert all indirect jumps in crypto assembler code to use non-speculative
sequences when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/crypto/aesni-intel_asm.S| 5 +++--
Convert all indirect jumps in 32bit checksum assembler code to use
non-speculative sequences when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/lib/checksum_32.S | 7 ---
1 file changed, 4
From: Andi Kleen
objtool's assembler nanny currently cannot deal with the code generated
by the retpoline compiler and throws hundreds of warnings, mostly
because it sees calls that don't have a symbolic target.
Exclude all the options that rely on objtool when RETPOLINE
Convert indirect call in Xen hypercall to use non-speculative sequence,
when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/include/asm/xen/hypercall.h | 5 +++--
1 file changed, 3 insertions(+), 2
From: Andi Kleen
Add a noretpoline option boot to disable retpoline and patch out the
extra sequences. It cannot patch out the jumps to the thunk functions
from code generated by the compiler, but those thunks turn into a single
indirect branch now.
Signed-off-by: Andi
Convert indirect jumps in core 32/64bit entry assembler code to use
non-speculative sequences when CONFIG_RETPOLINE is enabled.
Don't use NOSPEC_CALL in entry_SYSCALL_64_fastpath because the return
address after the 'call' instruction must be *precisely* at the
.Lentry_SYSCALL_64_after_fastpath
From: Andi Kleen
Convert all indirect jumps in 32bit irq inline asm code to use
non speculative sequences.
Signed-off-by: Andi Kleen
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
Other regmap cache types (LZO, RBtree) report back un-successful register
lookups when a value has not been previously written into the cache. This
allows regmap core to perform a real un-cached lookup to fetch the value.
The Flat type cache does not and so all read succeed reporting zero for the
This makes the code slightly more readable and allows for cleaner
addition of functionality in later patches.
Signed-off-by: Andrew F. Davis
---
drivers/base/regmap/regcache-flat.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git
A single cache element may not always be unsigned int, use a
cache element in sizeof over hard-coding its type.
Signed-off-by: Andrew F. Davis
---
drivers/base/regmap/regcache-flat.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Sat, Jan 06 2018, Jonathan Corbet wrote:
> There is value in using the c:func syntax, as it will generate
> cross-references to the kerneldoc comments for those functions. In this
> case, it would appear that these comments exist, but nobody has pulled
> them into the docs yet. I took the
On 1/6/2018 11:33 AM, Avi Kivity wrote:
> Meltdown and Spectre mitigations focus on protecting the kernel from a
> hostile userspace. However, it's not a given that the kernel is the most
> important target in the system. It is common in server workloads that a
> single userspace application
From: Rob Herring Sent: Saturday, January 06, 2018 12:45 AM
>To: Stefan Agner
>Cc: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
>; mark.rutl...@arm.com; linux-arm-
>ker...@lists.infradead.org; devicet...@vger.kernel.org;
Hi, Wei
On 2018年01月06日 17:51, Li Wei wrote:
This patchset adds driver support for UFS for Hi3660 SoC. It is verified on
HiKey960 board.
Usually here should list the change compared with the last change set,
to make it easier
to reviewer, who may pay more attention to the differences.
For
Hi. Zhangfei
Thank you, I will add it in the next patch.
-邮件原件-
发件人: zhangfei [mailto:zhangfei@linaro.org]
发送时间: 2018年1月8日 9:40
收件人: liwei (CM); robh...@kernel.org; mark.rutl...@arm.com; xuwei (O);
catalin.mari...@arm.com; will.dea...@arm.com; vinholika...@gmail.com;
This series converts mach-davinci to use the common clock framework.
The series works like this, the first 21 patches create new clock drivers
using the common clock framework. There are basically 3 groups of clocks -
PLL, PSC and CFGCHIP (syscon). There are six different SoCs that each have
This adds platform-specific declarations for the PLL clocks on TI
DaVinci 365 based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/pll-dm365.c | 64 +
include/linux/clk/davinci.h
This adds platform-specific declarations for the PSC clocks on TI
DaVinci 644x based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile | 1 +
drivers/clk/davinci/psc-dm644x.c | 73
This adds a new binding for TI DA8XX USB PHY clocks. These clocks are part
of a syscon register called CFGCHIP3.
Signed-off-by: David Lechner
---
.../clock/ti/davinci/da8xx-cfgchip-usb-phy.txt | 55 ++
1 file changed, 55 insertions(+)
create mode
This adds the new USB PHY clock init in mach-davinci/usb-da8xx.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/usb-da8xx.c |
This adds the new board-specfic clock init in mach-davinci/dm644x.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
This adds platform-specific declarations for the PLL clocks on TI
DaVinci 644x based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile | 1 +
drivers/clk/davinci/pll-dm644x.c | 41
This adds platform-specific declarations for the PSC clocks on TI DA850/
OMAP-L138/AM18XX SoCs.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/psc-da850.c | 117
This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm646x.c.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/dm646x.c | 329 +
1 file changed, 1 insertion(+), 328 deletions(-)
diff --git
This removes the unused legacy clock init code from
arch/arm/mach-davinci/{devices,usb}-da8xx}.c.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/devices-da8xx.c | 29 -
arch/arm/mach-davinci/usb-da8xx.c | 238 --
2 files
This removes the unused legacy clock init code from
arch/arm/mach-davinci/da850.c.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/da850.c | 638 +-
1 file changed, 1 insertion(+), 637 deletions(-)
diff --git
This adds device tree support to the davinci timer so that when clocks
are moved to device tree, the timer will still work.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/Kconfig | 1 +
arch/arm/mach-davinci/time.c | 17 ++---
2 files changed, 15
This removes the unused legacy clock code from arch/arm/mach-davinci/.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/clock.c | 745
arch/arm/mach-davinci/clock.h | 72 ---
arch/arm/mach-davinci/common.c
This removes the unused legacy clock init code from
arch/arm/mach-davinci/da830.c.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/da830.c | 412 +-
1 file changed, 1 insertion(+), 411 deletions(-)
diff --git
This removes all of the clock init code from da8xx-dt.c. This includes
all of the OF_DEV_AUXDATA that was just used for looking up clocks.
Note: You need to have clocks defined in your device tree or your system
won't boot after this patch.
Signed-off-by: David Lechner
---
This removes the unused legacy clock init code from
arch/arm/mach-davinci/dm644x.c.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/dm644x.c | 300 +
1 file changed, 1 insertion(+), 299 deletions(-)
diff --git
On Sun, Jan 07, 2018 at 12:15:40PM -0800, Dan Williams wrote:
>
> I'm thinking we should provide the option to at least build the
> hot-path nospec_array_ptr() usages without an lfence.
>
> CONFIG_SPECTRE1_PARANOIA_SAFE
> CONFIG_SPECTRE1_PARANOIA_PERF
SAFE vs PERF naming is problematic
This adds platform-specific declarations for the PSC clocks on TI
DaVinci 355 based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/psc-dm355.c | 78 +
include/linux/clk/davinci.h
This adds platform-specific declarations for the PSC clocks on TI
DaVinci 646x based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile | 1 +
drivers/clk/davinci/psc-dm646x.c | 68
From: Thomas Gleixner
Date: Sun, 7 Jan 2018 21:56:39 +0100 (CET)
> I surely agree, but we have gone the way of PTI without the ability of
> exempting individual processes exactly for one reason:
>
> Lack of time
>
> It can be done on top of the PTI implementation and it
This removes CONFIG_DAVINCI_RESET_CLOCKS. The option has been removed from
the kernel.
Signed-off-by: David Lechner
---
arch/arm/configs/davinci_all_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/configs/davinci_all_defconfig
On Sun, 2018-01-07 at 18:32 +, Lu, Hongjiu wrote:
>
> > What's the plan for these vs. official GCC? Is that stuff going to part of
> > GCC
> > and if so, which versions of GCC will have that?
>
> If I get positive feedbacks from kernel folks with my GCC 7 patches today, I
> will submit my
On Sun, 7 Jan 2018, Linus Torvalds wrote:
> We need to fix the security problem, but we need to do it *without*
> these braindead arguments that performance is somehow secondary.
I surely agree, but we have gone the way of PTI without the ability of
exempting individual processes exactly for one
From: Markus Elfring
Date: Sun, 7 Jan 2018 21:48:50 +0100
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style
On Sat, Jan 6, 2018 at 11:54 AM, Mauro Carvalho Chehab
wrote:
>
> Em Sat, 6 Jan 2018 16:04:16 +0100
> "Josef Griebichler" escreveu:
>>
>> the causing commit has been identified.
>> After reverting commit
>>
From: Martin Kelly
Currently a number of Makefiles break when used with toolchains that pass
extra flags in CC and other cross-compile related variables (such as
--sysroot). Thus we get this error when we use a toolchain that puts
--sysroot in the CC var:
On Sun, Jan 07, 2018 at 10:48:01PM +0100, Thomas Gleixner wrote:
> Implement the CPU vulnerabilty show functions for meltdown, spectre_v1 and
> spectre_v2.
>
> Signed-off-by: Thomas Gleixner
Reviewed-by: Konrad Rzeszutek Wilk
Thank you!
> ---
>
On Sun, 2018-01-07 at 18:32 +, Lu, Hongjiu wrote:
>
> If I get positive feedbacks from kernel folks with my GCC 7 patches today, I
> will submit my patches for GCC 8 today. After they are checked in, I will
> backport them to GCC 7/6/5/4.9.
To confirm: These seem to work for me and I've
Hi Miquel, Ezequiel,
On 23/12/17 05:56, Ezequiel Garcia wrote:
> On 22 December 2017 at 12:53, Miquel RAYNAL
> wrote:
>> Hello Chris,
>>
>> On Fri, 22 Dec 2017 12:19:04 +1300
>> Chris Packham wrote:
>>
>>> From: Kalyan
Ok, we had an interesting week, and by now everybody knows why we were
merging all those odd x86 page table isolation patches without
following all of the normal release timing rules.
But rc7 itself is actually pretty calm. Yes, there were a few small
follow-up patches to the PTI code still, and
From: Colin Ian King
Use the ARRAY_SIZE macro on array __pciids to determine size of the array.
Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
drivers/scsi/bfa/bfa_core.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Colin Ian King
Use the ARRAY_SIZE macro on array cmd_priv_map to determine size of the
array. Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
drivers/net/ethernet/emulex/benet/be_cmds.c | 2 +-
1 file changed, 1
Join the Mailing List
On 01/05/2018 08:12 AM, Will Deacon wrote:
> Aliasing attacks against CPU branch predictors can allow an attacker to
> redirect speculative control flow on some CPUs and potentially divulge
> information from one context to another.
>
> This patch adds initial skeleton code behind a new Kconfig
Best Regards!
Anson Huang
> -Original Message-
> From: Rafael J. Wysocki [mailto:r...@rjwysocki.net]
> Sent: 2018-01-08 7:34 AM
> To: Anson Huang
> Cc: Rafael J. Wysocki ; linux-arm-
> ker...@lists.infradead.org; devicet...@vger.kernel.org;
From: Thomas Gleixner
Date: Sun, 7 Jan 2018 19:31:41 +0100 (CET)
> 2) Alexei's analyis is purely based on the public information of the google
>zero folks. If it would be complete and the only attack vector all fine.
>
>If not and I doubt it is, we're going to regret
This adds a new driver for the gate and multiplexer clocks in the
CFGCHIPn syscon registers on TI DA8XX-type SoCs.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 2 +
drivers/clk/davinci/da8xx-cfgchip.c | 203
This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon
register on TI DA8XX-type SoCs.
The USB0 (USB 2.0) PHY clock is an interesting case because it calls
clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled
temporarily while we are locking the PLL, which takes
Add 696MHz operating point for i.MX6UL, only for those
parts with speed grading fuse set to 2b'10 supports
696MHz operating point, so, speed grading check is also
added for i.MX6UL in this patch, the clock tree for each
operating point are as below:
696MHz:
pll1
This adds platform-specific declarations for the PSC clocks on TI
DaVinci 365 based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/psc-dm365.c | 83 +
include/linux/clk/davinci.h
Add 696MHz operating point according to datasheet
(Rev. 0, 12/2015).
Signed-off-by: Anson Huang
Reviewed-by: Fabio Estevam
---
changes since v2:
add reviewed-by.
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff
This adds a new binding for the gate clocks present in the CFGCHIP syscon
registers in TI DA8XX SoCs. There are actually other gate clocks in this
block that could be added in the future, but TBCLK is currently the only
one being used.
Signed-off-by: David Lechner
---
This removes the unused legacy clock init code from
arch/arm/mach-davinci/da850.c.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/da850.c | 638 +-
1 file changed, 1 insertion(+), 637 deletions(-)
diff --git
When convert char array with signed int, if the inbuf[x] is negative then
upper bits will be set to 1. Fix this by using u8 instead of char.
ret_size has to be at least 3, hid_input_report use it after minus 2 bytes.
Cc: sta...@vger.kernel.org
Signed-off-by: Aaron Ma
---
When size is negative, calling memset will make segment fault.
Declare the size as type u32 to keep memset safe.
size in struct hid_report is unsigned, fix return type of
hid_report_len to u32.
Cc: sta...@vger.kernel.org
Signed-off-by: Aaron Ma
---
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