On 05/03/18 11:30, Kishon Vijay Abraham I wrote:
> Hi Adrian,
>
> On Monday 19 February 2018 02:21 PM, Adrian Hunter wrote:
>> On 05/02/18 14:50, Kishon Vijay Abraham I wrote:
>>> Add quirk to disable HW timeout if the requested timeout is more than
>>> the maximum obtainable timeout.
>>>
>>> Sign
2018-03-05 17:15 GMT+09:00 Rasmus Villemoes :
> On 5 March 2018 at 05:52, Masahiro Yamada
> wrote:
>> 2018-03-01 4:17 GMT+09:00 Rasmus Villemoes :
>>> kconfig.h was excluded from consideration by fixdep by
>>> 6a5be57f0f00 (fixdep: fix extraneous dependencies) to avoid some false
>>> positive hit
> >> They are all present in my next branch. The fix that Wolfram sent on
> >> top, is added immediately after the commit it fixes.
> >
> > Could we also squash it, then?
> >
>
> If Wolfram is fine with squashing,
> that would be cleaner.
>
> In that case, can you add Tested-by
> to patch 12?
Y
Hi Michel,
On Mon, Feb 26, 2018 at 1:18 PM, Michel Pollet
wrote:
> This adds the Renesas RZ/N1 CPU and bare bone support.
>
> This currently only handles generic parts (gic, architected timer)
> and a UART.
> This also relies on the bootloader to set the pinctrl and clocks.
>
> Signed-off-by: Mic
On Mon, Mar 05, 2018 at 04:36:34PM +0800, Huang, Ying wrote:
> From: Huang Ying
>
> From commit 4b3ef9daa4fc ("mm/swap: split swap cache into 64MB
> trunks") on, after swapoff, the address_space associated with the swap
> device will be freed. So page_mapping() users which may touch the
> addres
Felipe,
On 05/03/18 10:49, Felipe Balbi wrote:
>
> Hi,
>
> Roger Quadros writes:
>>> Roger Quadros writes:
In the following test we get stuck by sleeping forever in _dwc3_set_mode()
after which dual-role switching doesn't work.
On dra7-evm's dual-role port,
- Load g_ze
Hi Michel,
On Mon, Feb 26, 2018 at 1:18 PM, Michel Pollet
wrote:
> Only enables the uart0 for now, and also relies on the bootloader
> for setting up the clocks and pinctrl.
>
> Signed-off-by: Michel Pollet
Thanks for your patch!
This should be split in two parts:
> Documentation/devicetree/
On Fri, Mar 2, 2018 at 10:59 PM, Eric W. Biederman
wrote:
> The code has been missing a way for a ->get_acl method to not cache
> a return value without risking invalidating a cached value
> that was set while get_acl() was returning.
>
> Add that support by implementing to_uncachable_acl, to_cach
SDM845 brings a new reset signal ALT_RESET which is a part of the MSS
subsystem hence requires some of the active clks to be enabled before
assert/deassert
Reset the modem if the BOOT FSM does timeout
Reset assert/deassert sequence vary across SoCs adding reset, adding
start/stop helper functions
This patch series add support for remoteproc Q6v5 modem-pil on Qualcomm
SDM845 SoC. The first patch adds AOSS (Always on subsystem) reset driver
to provide for mss reset line. The third patch adds the APCS offset for
SDM845. The last couple of patches add the resets sequence for Q6 on
SDM845 and ad
Add the corresponding APCS offset for SDM845 SoC
Signed-off-by: sibis
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
index 57bde0d..62d704d 100644
--- a/drivers/mai
On Fri, 2 Mar 2018, Joe Lawrence wrote:
> On 03/01/2018 05:28 AM, Petr Mladek wrote:
> > On Thu 2018-02-22 22:00:28, Miroslav Benes wrote:
> >> On Wed, 21 Feb 2018, Petr Mladek wrote:
> >>> This patch allows the late initialization.
> >>>
> >>> diff --git a/kernel/livepatch/core.c b/kernel/livepat
Include SDM845 APCS binding to the list of possible bindings
Signed-off-by: sibis
---
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
b/
>From SDM845, the Q6SS reset sequence on software side has been
simplified with the introduction of boot FSM which assists in
bringing the Q6 out of reset
Add GLINK subdevice to allow definition of GLINK edge as a
child of modem-pil
Signed-off-by: sibis
---
drivers/remoteproc/qcom_q6v5_pil.c |
Add reset controller driver for Qualcomm SDM845 SoC to
control reset signals provided by AOSS for Modem, Venus
ADSP, GPU, Camera, Wireless, Display subsystem
Signed-off-by: sibis
---
.../devicetree/bindings/reset/qcom,aoss-reset.txt | 54
drivers/reset/Kconfig
Add new compatible string for Qualcomm SDM845 SoCs
Signed-off-by: sibis
---
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
b/Documentation/devicetree/b
Andy Lutomirski writes:
> On Fri, Mar 2, 2018 at 10:55 AM, Vitaly Kuznetsov wrote:
>> vmx_save_host_state() is only called from kvm_arch_vcpu_ioctl_run() so
>> the context is pretty well defined
>>
>
> True.
>
>> and MSR_FS_BASE should always be
>> equal to current->thread.fsbase.
>
> Not true.
There are some devices using their USB CDC-ACM interfaces as a debug port
that are able to send data at a very high speed, but with the current
driver implementation it is not possible to receive it when using a
relatively slow embedded system without dropping an important part of the
data.
The ex
Andy Lutomirski writes:
> On Fri, Mar 2, 2018 at 10:55 AM, Vitaly Kuznetsov wrote:
>> vmx_save_host_state() is only called from kvm_arch_vcpu_ioctl_run() so
>> the context is pretty well defined and as we're past 'swapgs' MSR_GS_BASE
>> should contain kernel's GS base which we point to irq_stack
On Mon, 5 Mar 2018 11:28:14 +0900
Namhyung Kim wrote:
> Hi Masami,
>
> On Fri, Mar 02, 2018 at 03:32:29PM +0900, Masami Hiramatsu wrote:
> > On Fri, 2 Mar 2018 13:49:51 +0900
> > Namhyung Kim wrote:
> >
> > > Hi Masami,
> > >
> > > On Wed, Feb 28, 2018 at 12:19:53PM +0900, Masami Hiramatsu wr
Hi Sven.
Sven Joachim - 05.03.18, 09:09:
> On 2018-03-04 15:15 -0800, Linus Torvalds wrote:
> > Hmm. A reasonably calm week - the biggest change is to the 'kvm-stat'
> > tool, not any actual kernel files.
> >
> > But there's small changes all over, with architecture updates (x86,
> > s390, arm, p
On Mon, Mar 05, 2018 at 01:19:26PM +0530, Himanshu Jha wrote:
> In adis16201_read_raw() adjust an argument to match an open parentheses
> using tabs.
>
> Signed-off-by: Himanshu Jha
> ---
> drivers/staging/iio/accel/adis16201.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --
On Mon, Mar 05, 2018 at 09:09:31AM +0100, Sven Joachim wrote:
> On 2018-03-04 15:15 -0800, Linus Torvalds wrote:
>
> > Hmm. A reasonably calm week - the biggest change is to the 'kvm-stat'
> > tool, not any actual kernel files.
> >
> > But there's small changes all over, with architecture updates
On Mon, Mar 05, 2018 at 04:02:06AM +0530, Arushi Singhal wrote:
> Replace printk having a log level with the appropriate
> net_*macro_ratelimited.
> It's better to use actual device name as a prefix in error messages.
> Indentation is also changed, to fix the checkpatch issue if line is not
> exce
(In response to Luis' comment:)
> Can you add a respective Fixes: tag?
It was apparently present since LRU was added to xfs buffer cache via:
commit 430cbeb86fdcbbdabea7d4aa65307de8de425350
[xfs: add a lru to the XFS buffer cache]
But I wouldn't say this patch "fixes" that commit.
What do you thi
On Sat, Mar 03, 2018 at 10:24:24PM +, Sasha Levin wrote:
> We need to make sure that only proper channel slots (in SACCST register)
> are enabled at playback start time since some AC'97 CODECs (like VT1613 on
> UDOO board) were observed requesting via SLOTREQ spurious ones just after
> an AC'9
On Sat, Mar 03, 2018 at 10:24:34PM +, Sasha Levin wrote:
> Currently BCLK inverting is only handled when the DAI format is
> DSP, but the BCLK may be inverted in any supported mode. Without
> this using this CODEC in any other mode than DSP with the BCLK
> inverted leads to bad sampling timing
On Mon, Jan 29, 2018 at 5:24 PM, Thang Q. Nguyen wrote:
> From: Tung Nguyen
>
> Currently, hcd->shared_hcd always creates and registers to the usb-core.
> If, for some reasons, USB3 downstream port is disabled, no roothub port for
> USB3.0 is found. This causes kernel to display an error:
> hub 2
On Sat, Mar 03, 2018 at 10:27:56PM +, Sasha Levin wrote:
> From: Jonas Gorski
>
> [ Upstream commit 0135c03df914f0481c61f097c78d37cece84f330 ]
Why are there so many more patches for v4.9 than for more recent
kernels?
> The bcm63xx SPI controller does not allow manual control of the CS
> lin
Hi Jeffy,
Thanks for the patch.
2018-03-02 4:51 GMT+01:00 Jeffy Chen :
> Add wakeup event action for Pen Insert gpio key, to avoid wakeup when
> inserting the pen.
>
> Signed-off-by: Jeffy Chen
> ---
>
> Changes in v3: None
> Changes in v2:
> Specify wakeup event action instead of irq trigger ty
Document the new optional "fsl,pmic-stby-poweroff" property.
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/regulator/pfuze100.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt
b/Do
On some boards the SoC can use one pin "PMIC_STBY_REQ" to notify th PMIC
about state changes. In this case internal state of PMIC must be
preconfigured for upcomming state change.
It works fine with the current regulator framework, except with the
power-off case.
This patch is providing an optiona
From: Joerg Roedel
Generic page-table code populates all non-leaf entries with
_KERNPG_TABLE bits set. This is fine for all paging modes
except PAE.
In PAE mode only a subset of the bits is allowed to be set.
Make sure we only set allowed bits by masking out the
reserved bits.
Signed-off-by: Jo
From: Joerg Roedel
Add unconditional cr3 switches between user and kernel cr3
to all non-NMI entry and exit points.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S | 91 +--
1 file changed, 88 insertions(+), 3 deletions(-)
diff --git a/arc
Hi,
here is an updated version of my PTI patches for x86-32. I
worked in the review comments and fixed a few bugs that were
found during review of v2.
In particular, the changes to v2 are:
* Switched from movsb to movsl for stack copy
* Simplified sysexit path to not do a full pt
From: Joerg Roedel
We need separate kernel PMDs in the user page-table when PTI
is enabled to map the per-process LDT for user-space.
Signed-off-by: Joerg Roedel
---
arch/x86/mm/pgtable.c | 100 --
1 file changed, 81 insertions(+), 19 deletions(-
From: Joerg Roedel
The stack address doesn't need to be stored in tss.sp0 if
we switch manually like on sysenter. Rename the offset so
that it still makes sense when we change its location.
We will also use this stack for all kernel-entry points, not
just sysenter. Reflect that in the name as we
From: Joerg Roedel
Allow PTI to be compiled on x86_32.
Signed-off-by: Joerg Roedel
---
security/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/security/Kconfig b/security/Kconfig
index b0cb9a5..93d85fd 100644
--- a/security/Kconfig
+++ b/security/Kconfig
@@ -57,7 +
On Mon, Mar 05, 2018 at 09:18:10AM +0100, Andrzej Hajda wrote:
> On 02.03.2018 14:13, Heikki Krogerus wrote:
> > Hi,
> >
> > On Tue, Feb 27, 2018 at 08:11:29AM +0100, Andrzej Hajda wrote:
> >> +2. USB-C connector attached to CC controller (s2mm005), HS lines routed
> >> +to companion PMIC (max77865
From: Joerg Roedel
Warn the user in case the performance can be significantly
improved by switching to a 64-bit kernel.
Suggested-by: Andy Lutomirski
Signed-off-by: Joerg Roedel
---
arch/x86/mm/pti.c | 16
1 file changed, 16 insertions(+)
diff --git a/arch/x86/mm/pti.c b/arc
From: Joerg Roedel
This splits out the mapping sanity check and the actual
mapping of the LDT to user-space from the map_ldt_struct()
function in a way so that it is re-usable for PAE paging.
Signed-off-by: Joerg Roedel
---
arch/x86/kernel/ldt.c | 82 ---
From: Joerg Roedel
The addr counter will overflow if we clone the last PMD of
the address space, resulting in an endless loop.
Check for that and bail out of the loop when it happens.
Signed-off-by: Joerg Roedel
---
arch/x86/mm/pti.c | 4
1 file changed, 4 insertions(+)
diff --git a/arc
From: Joerg Roedel
This adds the needed special case for PAE to get the LDT
mapped into the user page-table when PTI is enabled. The big
difference to the other paging modes is that we don't have a
full top-level PGD entry available for the LDT, but only PMD
entry.
Signed-off-by: Joerg Roedel
-
From: Joerg Roedel
Reserve 2MB/4MB of address-space for mapping the LDT to
user-space on 32 bit PTI kernels.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable_32_types.h | 7 +--
arch/x86/mm/dump_pagetables.c | 9 +
2 files changed, 14 insertions(+), 2 deletion
From: Joerg Roedel
It marks the end of the address-space range reserved for the
LDT. The LDT-code will use it when unmapping the LDT for
user-space.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable_32_types.h | 2 ++
arch/x86/include/asm/pgtable_64_types.h | 2 ++
arch/x86/kernel/l
From: Joerg Roedel
Define INIT_PGD to point to the correct initial page-table
for 32 and 64 bit and use it where needed. This fixes the
build on 32 bit with CONFIG_PAGE_TABLE_ISOLATION enabled.
Signed-off-by: Joerg Roedel
---
arch/x86/mm/dump_pagetables.c | 12 ++--
1 file changed, 6 i
From: Joerg Roedel
When we populate a PGD entry, make sure we populate it in
the user page-table too.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable-3level.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/include/asm/pgtable-3level.h
b/arch/x86/include/asm/p
From: Joerg Roedel
Cloning on the P4D level would clone the complete kernel
address space into the user-space page-tables for PAE
kernels. Cloning on PMD level is fine for PAE and legacy
paging.
Signed-off-by: Joerg Roedel
---
arch/x86/mm/pti.c | 20
1 file changed, 20 ins
From: Joerg Roedel
There it is also usable from 32 bit code.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable.h| 23 +++
arch/x86/include/asm/pgtable_64.h | 21 -
2 files changed, 23 insertions(+), 21 deletions(-)
diff --git a/arch/x86/i
Vitaly Kuznetsov writes:
> Devices which use level-triggered interrupts under Windows 2016 with
> Hyper-V role enabled don't work: Windows disables EOI broadcast in SPIV
> unconditionally. Our in-kernel IOAPIC implementation emulates an old IOAPIC
> version which has no EOI register so EOI never
From: Joerg Roedel
Move it out of the X86_64 specific processor defines so
that its visible for 32bit too.
Reviewed-by: Andy Lutomirski
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/processor-flags.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/i
From: Joerg Roedel
These two functions are required for PTI on 32 bit:
* pgdp_maps_userspace()
* pgd_large()
Also re-implement pgdp_maps_userspace() so that it will work
on 64 and 32 bit kernels.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable-2level_types.h | 3
From: Joerg Roedel
Make them available on 32 bit and clone_pgd_range() happy.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable.h| 49 +++
arch/x86/include/asm/pgtable_64.h | 49 ---
2 files changed, 49 inse
From: Joerg Roedel
We want x86_tss.sp0 point to the entry stack later to use
it as a trampoline stack for other kernel entry points
besides SYSENTER.
So store the task stack pointer in x86_tss.sp1, which is
otherwise unused by the hardware, as Linux doesn't make use
of Ring 1.
Signed-off-by: Jo
From: Joerg Roedel
Also populate the user-spage pgd's in the user page-table.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable-2level.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/x86/include/asm/pgtable-2level.h
b/arch/x86/include/asm/pgtable-2level.h
index
From: Joerg Roedel
These macros will be used in the NMI handler code and
replace plain SAVE_ALL and RESTORE_REGS there. We will add
the NMI-specific CR3-switch to these macros later.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S | 23 +++
1 file changed, 19 inse
From: Joerg Roedel
With PTI we need to map the per-process LDT into the kernel
address-space for each process, so we need separate kernel
PMDs per PGD.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable-3level_types.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff -
From: Joerg Roedel
Allocate a kernel and a user page-table root when PTI is
enabled. Also allocate a full page per root for PAE because
otherwise the bit to flip in cr3 to switch between them
would be non-constant, which creates a lot of hassle.
Keep that for a later optimization.
Signed-off-by:
From: Joerg Roedel
The NMI handler is special, as it needs to leave with the
same cr3 as it was entered with. We need to do this because
we could enter the NMI handler from kernel code with
user-cr3 already loaded.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S | 52
From: Joerg Roedel
Restoring the segments can cause exceptions that need to be
handled. With PTI enabled, we still need to be on kernel cr3
when the exception happens. For the cr3-switch we need
at least one integer scratch register, so we can't switch
with the user integer registers already load
From: Joerg Roedel
The common exception entry code now handles the
entry-from-sysenter stack situation and makes sure to leave
with the same stack as it entered the kernel.
So there is no need anymore for the special handling in the
debug entry code.
Signed-off-by: Joerg Roedel
---
arch/x86/e
From: Joerg Roedel
With the way page-table folding is implemented on 32 bit, we
are not only setting PGDs with this functions, but also PUDs
and even PMDs. Give the function a more generic name to
reflect that.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/pgtable_64.h | 12 ++--
From: Joerg Roedel
Use the entry-stack as a trampoline to enter the kernel. The
entry-stack is already in the cpu_entry_area and will be
mapped to userspace when PTI is enabled.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S| 136 +++
arch
From: Joerg Roedel
It can happen that we enter the kernel from kernel-mode and
on the entry-stack. The most common way this happens is when
we get an exception while loading the user-space segment
registers on the kernel-to-userspace exit path.
The segment loading needs to be done after the entr
Hi Alexander,
I've added Jisheng in Cc so he can have a look at this.
Thanks!
Antoine
On Sun, Mar 04, 2018 at 09:18:07PM +0300, Alexander Monakov wrote:
> Make the value written into the USB_PHY_RX_CTRL configuration register
> match 0xAA79 value written by manufacturer-supplied kernels for Sony
From: Joerg Roedel
These offsets will be used in 32 bit assembly code as well,
so make them available for all of x86 code.
Signed-off-by: Joerg Roedel
---
arch/x86/kernel/asm-offsets.c| 4
arch/x86/kernel/asm-offsets_64.c | 2 --
2 files changed, 4 insertions(+), 2 deletions(-)
diff
From: Joerg Roedel
Use a separate return path when we know we are returning to
the kernel. This allows us to put the PTI cr3-switch and the
switch to the entry-stack into the return-to-user path
without further checking.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S | 11 --
From: Joerg Roedel
Switch back to the trampoline stack before returning to
userspace.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S | 79 +--
1 file changed, 77 insertions(+), 2 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/
From: Joerg Roedel
NMI will no longer use most of the shared return path,
because NMI needs special handling when the CR3 switches for
PTI are added. This patch prepares for that.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S | 8 ++--
1 file changed, 6 insertions(+), 2 deletio
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/imx6q-clock.txt | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index a45
Export pm_power_off_prepare. It is needed to implement power off on
Freescale/NXP iMX6 based boards with external power management
integrated circuit (PMIC).
Signed-off-by: Oleksij Rempel
---
kernel/reboot.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/reboot.c b/kernel/reboot.c
in
This board, as well as some other boards with i.MX6 and a PMIC, uses a
"PMIC_STBY_REQ" line to notify the PMIC about a state change.
The PMIC is programmed for a specific state change before triggering the
line.
In this case, PMIC_STBY_REQ can be used for stand by, sleep
and power off modes.
Signe
From: Joerg Roedel
This makes it easier to split up the shared iret code path.
Signed-off-by: Joerg Roedel
---
arch/x86/entry/entry_32.S | 97 ---
1 file changed, 49 insertions(+), 48 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/en
This patch series is providing power off support for Freescale/NXP iMX6 based
boards with external power management integrated circuit (PMIC).
As a first step the PMIC is configured to turn off the system if the
standby pin is asserted. On second step we assert the standby pin.
For this reason we n
One of the Freescale recommended sequences for power off with external
PMIC is the following:
...
3. SoC is programming PMIC for power off when standby is asserted.
4. In CCM STOP mode, Standby is asserted, PMIC gates SoC supplies.
See:
http://www.nxp.com/assets/documents/data/en/reference-manua
On 03/03/18 03:32, kbuild test robot wrote:
> Hi Jolly,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on clk/clk-next]
> [also build test ERROR on v4.16-rc3 next-20180302]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help imp
Even though it doesn't make too much sense, it is perfectly legal to:
- call .init() and then (as many times) .update()
- subseqently _not_ call any of .final(), .finup() or .export()
Update documentation since this is an important issue to consider
from resource management perspective.
Link: htt
Hi Roger,
On 5 March 2018 at 17:45, Roger Quadros wrote:
> Felipe,
>
> On 05/03/18 10:49, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Roger Quadros writes:
Roger Quadros writes:
> In the following test we get stuck by sleeping forever in _dwc3_set_mode()
> after which dual-role switching d
On Sat, Mar 03, 2018 at 10:29:00PM +, Sasha Levin wrote:
> From: Javier Martinez Canillas
>
> [ Upstream commit 9ba2da5f5d18daaa365ab5426b05e16f1d114786 ]
>
> The driver doesn't have a struct of_device_id table but supported devices
> are registered via Device Trees. This is working on the a
On Sat, Mar 03, 2018 at 10:29:00PM +, Sasha Levin wrote:
> From: Javier Martinez Canillas
>
> [ Upstream commit 71c314d7ef2442cd798584a3dece8151215e1777 ]
>
> The driver doesn't have a struct of_device_id table but supported devices
> are registered via Device Trees. This is working on the a
On Thu, Mar 01, 2018 at 11:08:13PM +0200, Tomas Winkler wrote:
> The correct sequence is to first request locality and only after
> that perform cmd_ready handshake, otherwise the hardware will drop
> the subsequent message as from the device point of view the cmd_ready
> handshake wasn't performed
On Sat, Mar 03, 2018 at 10:29:01PM +, Sasha Levin wrote:
> From: Javier Martinez Canillas
>
> [ Upstream commit 5cf015d9cb02c360582b624497b0a1716881cf28 ]
>
> The driver doesn't have a struct of_device_id table but supported devices
> are registered via Device Trees. This is working on the a
On 03/05/2018 01:29 AM, Bjorn Andersson wrote:
> On Wed 21 Feb 22:12 PST 2018, Rajendra Nayak wrote:
>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> [..]
>> +qup_uart2: serial@a84000 {
>> +compatible
From: Denis Osterland
Add support for "evdet" named interrupt source.
The check if i2c client irq matches evdet irq is needed
for the case that there is only one interrupt named "evdet".
In this case i2c client code handles this like an unnamed
interrupt souce and assigns the value.
Signed-off-
From: Michael Grzeschik
The interrupt handler got enabled very early. If the interrupt cause is
triggering immediately before the context is fully prepared. This can
lead to undefined behaviour. Therefor we move the interrupt enable code
to the end of the probe function.
Signed-off-by: Michael G
changes since v2:
Fix rebase issue in 2/4 and 3/4, where 2/4 uses a data type declared 3/4.
changes since v1:
Represent isl1219 tamper detection as RTC timestamp event,
instead of hwmon intrusion sensor.
Switch to rtc_register_device, to fix possible race conditions in probe.
Add documentation of
From: Denis Osterland
Fix possible race condition.
It is not allowed to return with an error code after RTC is registered.
Suggested-by: Alexandre Belloni
Signed-off-by: Denis Osterland
Reviewed-by: Michael Grzeschik
---
drivers/rtc/rtc-isl1208.c | 8
1 file changed, 4 insertions(+)
From: Michael Grzeschik
We add support for the ISL1219 chip that got an integrated tamper
detection function. This patch implements the feature by adding
an additional timestamp0 file to sysfs device path.
This file contains seconds since epoch, if an event occurred,
or is empty, if none occurred
On Sun, Mar 04, 2018 at 11:24:00PM +0100, Rafael J. Wysocki wrote:
> +/**
> + * tick_nohz_idle_prepare - prepare for entering idle on the current CPU.
> + *
> + * Called when we start the idle loop.
> + */
> +void tick_nohz_idle_prepare(void)
> +{
> + __tick_nohz_idle_prepare();
> +
> + loc
Hi Thomas,
On Fri, Mar 02, 2018 at 05:01:59PM +0100, Thomas Petazzoni wrote:
> On Fri, 2 Mar 2018 16:40:40 +0100, Antoine Tenart wrote:
> > +static struct {
> > + int pkt_size;
> > + int buf_num;
> > +} mvpp2_pools[MVPP2_BM_POOLS_NUM];
>
> Any reason for not doing:
>
> } mvpp2_pools[MVPP2_B
Hi Jordan,
Thanks for reporting this.
On 26/02/2018 18:16, Daniel Jordan wrote:
> Hi Laurent,
>
> This series doesn't build for me[*] when CONFIG_TRANSPARENT_HUGEPAGE is unset.
>
> The problem seems to be that the BUILD_BUG() version of pmd_same is called in
> pte_map_lock:
>
> On 02/16/2018 1
On Fri, Mar 02, 2018 at 12:26:35AM +0530, Nayna Jain wrote:
>
>
> On 03/01/2018 02:52 PM, Jarkko Sakkinen wrote:
> > On Wed, Feb 28, 2018 at 02:18:27PM -0500, Nayna Jain wrote:
> > > In tpm_transmit, after send(), the code checks for status in a loop
> > Maybe cutting hairs now but please just us
On Mon, Mar 5, 2018 at 11:42 AM, Mark Brown wrote:
> On Sat, Mar 03, 2018 at 10:29:00PM +, Sasha Levin wrote:
>> From: Javier Martinez Canillas
>>
>> [ Upstream commit 9ba2da5f5d18daaa365ab5426b05e16f1d114786 ]
>>
>> The driver doesn't have a struct of_device_id table but supported devices
>>
Hi,
Petr, Jason - thanks a lot for working on this series, first of all! And
especially for your patience.
On 21.02.2018 16:29, Petr Mladek wrote:
The atomic replace allows to create cumulative patches. They
are useful when you maintain many livepatches and want to remove
one that is lower on
On Fri, Mar 02, 2018 at 11:19:56AM -0800, Saravana Kannan wrote:
> On 03/02/2018 02:42 AM, Mark Rutland wrote:
> > It's important to note that the DSU PMU's event_init() ensures events
> > are affine to a single CPU, and the perf core code serializes operations
> > on those events via the context l
Hello Wolfram,
On Sun, Jan 7, 2018 at 2:17 PM, Javier Martinez Canillas
wrote:
>
> On Sun, Dec 3, 2017 at 10:40 PM, Javier Martinez Canillas
> wrote:
>> The buses should honor the firmware interface used to register the device,
>> but the I2C core reports a MODALIAS of the form i2c: even for I2
On Fri, Mar 02, 2018 at 10:45:25AM -0800, Doug Anderson wrote:
> Hi,
>
> On Fri, Mar 2, 2018 at 10:16 AM, Mark Rutland wrote:
> > On Fri, Mar 02, 2018 at 06:01:31PM +, Will Deacon wrote:
> >> On Thu, Mar 01, 2018 at 11:38:03AM -0800, Douglas Anderson wrote:
> >> > /* Initialize to zero *
On 05/03/18 12:41, Baolin Wang wrote:
> Hi Roger,
>
> On 5 March 2018 at 17:45, Roger Quadros wrote:
>> Felipe,
>>
>> On 05/03/18 10:49, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Roger Quadros writes:
> Roger Quadros writes:
>> In the following test we get stuck by sleeping forever in
>>
Hi,
Baolin Wang writes:
>>> Roger Quadros writes:
> Roger Quadros writes:
>> In the following test we get stuck by sleeping forever in
>> _dwc3_set_mode()
>> after which dual-role switching doesn't work.
>>
>> On dra7-evm's dual-role port,
>> - Load g_zero gadget d
On Thu, Mar 01, 2018 at 02:10:17PM -0800, J Freyensee wrote:
> .
> .
> .
> I'm new to this area of the kernel, but I'm not getting these lines:
>
> > + rc = tpm_transmit_cmd(chip, NULL, buf.data, PAGE_SIZE, 0, 0, NULL);
> > + tpm_buf_destroy(&buf);
> > if (rc < 0)
> Why is this if() check
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