FYI, we noticed the following commit (built with gcc-4.9):
commit: 46e26223e39c64763e321f229e324be15179c505 ("rcutorture: Make boost test
more robust")
url:
https://github.com/0day-ci/linux/commits/Joel-Fernandes/rcutorture-Disable-RT-throttling-for-boost-tests/20180611-074731
base: https://git
On Wed 13-06-18 08:32:19, Vlastimil Babka wrote:
> On 06/12/2018 04:11 PM, Jason Baron wrote:
> >
> >
> > On 06/12/2018 03:46 AM, Michal Hocko wrote:
> >> On Mon 11-06-18 12:23:58, Jason Baron wrote:
> >>> On 06/11/2018 11:03 AM, Michal Hocko wrote:
> So can we start discussing whether we wa
On Tue, Jun 12, 2018 at 03:48:06PM +0100, Srinivas Kandagatla wrote:
> Access to UART0 is disabled by bootloaders. By leaving it enabled by
> default would reboot the board.
> Disable this for now, this would alteast give a board which boots.
>
> Signed-off-by: Srinivas Kandagatla
Thanks for thi
Hi, Stu:
On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> This patch add the DPI1 support for mutex
>
> Signed-off-by: Stu Hsieh
Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_
Hi, Stu:
On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> This patch add the DSI2 support for mutex
>
> Signed-off-by: Stu Hsieh
Reviewed-by: CK Hu
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_
On Wed, Jun 06, 2018 at 05:38:33PM +0800, Feng Tang wrote:
> On Sat, Jun 02, 2018 at 12:12:13AM +0800, Feng Tang wrote:
>
> Hi Peter and all,
>
>
> > Hi Peter and Petr,
> >
> > Thanks for your suggestions, will try to find a cleaner and less hacky way,
> > and it may take some time as dealing
(I'm actually not working this week, but still thought of replying :))
On Wed, Jun 13, 2018 at 02:57:11PM +0800, kernel test robot wrote:
>
> FYI, we noticed the following commit (built with gcc-4.9):
>
> commit: 46e26223e39c64763e321f229e324be15179c505 ("rcutorture: Make boost
> test more robu
The AXI VDMA core supports Vertical flip in S2MM path when Enable
Vertical Flip (Advanced tab) is selected. To allow vertical flip
programming define an optional 'xlnx,enable-vert-flip' channel
child node property.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Michal Simek
---
.../devicetre
Vertical flip state is exported in xilinx_vdma_config and depending
on IP configuration(c_enable_vert_flip) vertical flip state is
programmed in hardware.
Signed-off-by: Radhey Shyam Pandey
Signed-off-by: Michal Simek
---
drivers/dma/xilinx/xilinx_dma.c | 22 ++
include/li
The AXI VDMA core supports Vertical Flip with S2MM as the path when
Enable Vertical Flip (Advanced tab) is selected. This patch series add
DT property for vertical flip and program its state in VDMA start_transfer.
Radhey Shyam Pandey (2):
dt-bindings: dmaengine: xilinx_dma: Add VDMA vertical fl
On Tue, Jun 12, 2018 at 05:07:39PM -0700, Matthew Wilcox wrote:
> On Tue, Jun 12, 2018 at 02:33:22PM -0600, Jason Gunthorpe wrote:
> > > @@ -377,13 +378,24 @@ struct ib_mad_agent *ib_register_mad_agent(struct
> > > ib_device *device,
> > > goto error4;
> > > }
> > >
> > > - spin_lock_i
On 07/05/2018 17:11, Tony Krowiak wrote:
Introduces a new AP device driver. This device driver
is built on the VFIO mediated device framework. The framework
provides sysfs interfaces that facilitate passthrough
access by guests to devices installed on the linux host.
...snip...
+static int vfi
On Wed, 13 Jun 2018 09:41:16 +0200
Pierre Morel wrote:
> On 07/05/2018 17:11, Tony Krowiak wrote:
> > Introduces a new AP device driver. This device driver
> > is built on the VFIO mediated device framework. The framework
> > provides sysfs interfaces that facilitate passthrough
> > access by gue
The current Wound-Wait mutex algorithm is actually not Wound-Wait but
Wait-Die. Implement also Wound-Wait as a per-ww-class choice. Wound-Wait
is, contrary to Wait-Die a preemptive algorithm and is known to generate
fewer backoffs. Testing reveals that this is true if the
number of simultaneous con
On 06/13/2018 09:15 AM, Michal Hocko wrote:
> On Wed 13-06-18 08:32:19, Vlastimil Babka wrote:
>> On 06/12/2018 04:11 PM, Jason Baron wrote:
>>>
>>>
>>> On 06/12/2018 03:46 AM, Michal Hocko wrote:
On Mon 11-06-18 12:23:58, Jason Baron wrote:
> On 06/11/2018 11:03 AM, Michal Hocko wrote:
>>
On Wed, Jun 13, 2018 at 4:45 AM, Kai Heng Feng
wrote:
> Hi Rafael,
>
>> On Jun 12, 2018, at 5:17 PM, Rafael J. Wysocki wrote:
>>
>> On Monday, June 11, 2018 11:52:34 PM CEST Rafael J. Wysocki wrote:
>>>
>>> --703623056e64c488
>>> Content-Type: text/plain; charset="UTF-8"
>>>
>>> On Mo
On Fri, 8 Jun 2018 10:42:18 -0700
Matthew Wilcox wrote:
> From: Matthew Wilcox
>
> Allocate agent IDs from a global IDR instead of an atomic variable.
> This eliminates the possibility of reusing an ID which is already in
> use after 4 billion registrations, and we can also limit the assigned
On Tue, Jun 12, 2018 at 9:43 PM, Ulf Hansson wrote:
> On 12 June 2018 at 14:44, Marek Szyprowski wrote:
[cut]
>>
>> Is there any way to keep old behavior?
>
> I think the old behavior is sub-optimal. I am sure there are users
> that really don't want the driver core to runtime resume the suppli
+Cc: Rafael, ACPI ML
On Wed, Jun 13, 2018 at 7:14 AM, Srinath Mannam
wrote:
> Hi Michael, Stephen,
>
> We are adding ACPI support in our Linux based platform.
> At present our clock hierarchy using common clock framework through DTS.
> Now we required ACPI support in common clock framework to upg
On Tue, Jun 12, 2018 at 10:35 PM, Bjorn Andersson
wrote:
> On Tue 12 Jun 03:54 PDT 2018, Amit Kucheria wrote:
>
>> We also split up the regmap address space into two, one for the TM
>> registers, the other for the SROT registers. This was required to deal with
>> different address offsets for the
From: Liang Yang
Add initial support for the Amlogic NAND flash controller which found
in the Meson-GXBB/GXL/AXG SoCs.
Singed-off-by: Liang Yang
Signed-off-by: Yixun Lan
---
drivers/mtd/nand/raw/Kconfig |8 +
drivers/mtd/nand/raw/Makefile |3 +
drivers/mtd/nand/raw/meson_nand
From: Liang Yang
Add Amlogic NAND controller dt-bindings for Meson SoC,
Current this driver support GXBB/GXL/AXG platform.
Signed-off-by: Liang Yang
Signed-off-by: Yixun Lan
---
.../bindings/mtd/amlogic,meson-nand.txt | 118 ++
1 file changed, 118 insertions(+)
create m
These two patches try to add initial NAND driver support for Amlogic Meson
SoCs, current it has been tested on GXL(p212) and AXG(s400) platform.
Liang Yang (2):
dt-bindings: nand: meson: add Amlogic NAND controller driver
mtd: rawnand: meson: add support for Amlogic NAND flash controller
.
On Wed, Jun 13, 2018 at 8:23 AM, Marek Szyprowski
wrote:
> Hi Rafael,
Hi Marek,
> On 2018-06-12 16:24, Rafael J. Wysocki wrote:
>> On Tuesday, June 12, 2018 2:44:23 PM CEST Marek Szyprowski wrote:
>>> On 2018-06-12 13:00, Rafael J. Wysocki wrote:
From: Rafael J. Wysocki
If a devi
On Wed, Jun 13, 2018 at 3:18 AM, Benjamin Herrenschmidt
wrote:
> But there are many other uses of things like of_iomap() which could
> benefit from switching to devm_of_iomap() and thus getting the
> automated cleanup on exit and appropriate request of the memory
> resource.
Fine, fine.
--
Wit
On 12/06/18 17:34, Marc Zyngier wrote:
I suggest you find out how the GIC has been integrated on this
platform. If you take a fault on accessing this register, this very
much looks like an integration bug, and it should be quirked as such.
Thanks for the suggestion, This is a bug in the firmwa
On 06/12/2018 06:31 PM, Mathieu Desnoyers wrote:
- On Jun 12, 2018, at 9:11 AM, Florian Weimer fwei...@redhat.com wrote:
On 06/11/2018 10:04 PM, Mathieu Desnoyers wrote:
- On Jun 11, 2018, at 3:55 PM, Florian Weimer fwei...@redhat.com wrote:
On 06/11/2018 09:49 PM, Mathieu Desnoyers
On Tue, Jun 05, 2018 at 11:47:52PM +0200, Pavel Machek wrote:
> Hi!
>
> > > udev solves device discovery pretty well; I don't think that's good
> > > thing to optimize for.
> >
> > It's about grouping related devices together, devices which share some
> > common functionality. In this case, provi
On 12-06-18, 14:59, Peter Zijlstra wrote:
> On Tue, Jun 12, 2018 at 02:00:11PM +0200, Daniel Lezcano wrote:
> > +struct idle_injection_device {
>
> remove this:
> > + cpumask_var_t cpumask;
>
> > + struct hrtimer timer;
> > + struct completion stop_complete;
> > + unsigned int idle_durati
On 13 June 2018 at 08:42, Marek Szyprowski wrote:
> Hi Ulf,
>
> On 2018-06-12 21:43, Ulf Hansson wrote:
>> On 12 June 2018 at 14:44, Marek Szyprowski wrote:
>>> On 2018-06-12 13:00, Rafael J. Wysocki wrote:
From: Rafael J. Wysocki
If a device link is added via device_link_add() by
On Wed, Jun 13, 2018 at 01:08:38PM +0800, kernel test robot wrote:
> [0.037000] BUG: KASAN: null-ptr-deref in hrtimer_active+0x70/0xa0
> [0.037000] Read of size 4 at addr 0010 by task swapper/1
> [0.037000]
> [0.037000] CPU: 0 PID: 1 Comm: swapper Tainted: G
On Wed, Jun 13, 2018 at 10:13 AM, Andy Shevchenko
wrote:
> +Cc: Rafael, ACPI ML
>
> On Wed, Jun 13, 2018 at 7:14 AM, Srinath Mannam
> wrote:
>> Hi Michael, Stephen,
>>
>> We are adding ACPI support in our Linux based platform.
>> At present our clock hierarchy using common clock framework through
Hi, Stu:
On Wed, 2018-06-13 at 15:56 +0800, Stu Hsieh wrote:
> Hi, CK:
>
> On Wed, 2018-06-13 at 14:13 +0800, CK Hu wrote:
> > Hi, Stu:
> >
> > On Mon, 2018-06-11 at 11:26 +0800, Stu Hsieh wrote:
> > > This patch add the connection from RDMA1 to DPI1
> > >
> > > Signed-off-by: Stu Hsieh
> > >
[...]
> ---
> From: Rafael J. Wysocki
> Subject: [PATCH v2] PM / core: Fix supplier device runtime PM usage counter
> imbalance
>
> If a device link is added via device_link_add() by the driver of the
> link's consumer device, the supplier's runtime PM usage counter is
> going to be dropped by t
On Wed 13-06-18 09:51:23, Vlastimil Babka wrote:
> On 06/13/2018 09:15 AM, Michal Hocko wrote:
> > On Wed 13-06-18 08:32:19, Vlastimil Babka wrote:
[...]
> >> I think more concerning than guaranteeing no later major fault is
> >> possible data loss, e.g. replacing data with zero-filled pages.
> >
On Wed, Jun 13, 2018 at 05:41:08AM +, Naoya Horiguchi wrote:
> Hi everyone,
>
> I wrote a patch for this issue.
> There was a discussion about prechecking approach, but I finally found
> out it's hard to make change on memblock after numa_init, so I take
> another apporach (see patch descript
On Wed, Jun 13, 2018 at 9:21 AM, Srinivas Kandagatla
wrote:
>
>
> On 12/06/18 17:34, Marc Zyngier wrote:
>>
>> I suggest you find out how the GIC has been integrated on this
>> platform. If you take a fault on accessing this register, this very
>> much looks like an integration bug, and it should
> From: Freeman Liu
some comments below
> The Spreadtrum SC27XX PMICs ADC controller contains 32 channels,
> which is used to sample voltages with 12 bits conversion.
>
> Signed-off-by: Freeman Liu
> Signed-off-by: Baolin Wang
> ---
> drivers/iio/adc/Kconfig | 10 +
> drivers/iio/a
On Wed, Jun 13, 2018 at 4:24 AM, Stuart Hayes wrote:
>
> If the WSMT ACPI table is present and indicates that a fixed communication
> buffer should be used, use the firmware-specified buffer instead of
> allocating a buffer in memory for communications between the dcdbas driver
> and firmare.
Tha
On 12-06-18, 19:35, Peter Zijlstra wrote:
> On Tue, Jun 12, 2018 at 07:02:57PM +0200, Daniel Lezcano wrote:
> > Mmh, it is unclear for me if the park() vs wakeup() can happen at the
> > same time.
> >
> > If the park() function is called, that means the hotplug is allowed.
>
> No, it means we're
cma_alloc() function has gfp mask parameter, so users expect that it
honors typical memory allocation related flags. The most imporant from
the security point of view is handling of __GFP_ZERO flag, because memory
allocated by this function usually can be directly remapped to userspace
by device dr
Positive return value from read_oob() is making false BAD
blocks. For some of the NAND controllers, OOB bytes will be
protected with ECC and read_oob() will return number of bitflips.
If there is any bitflip in ECC protected OOB bytes for BAD block
status page, then that block is getting treated as
On 13/06/2018 10:55, Viresh Kumar wrote:
> On 12-06-18, 19:35, Peter Zijlstra wrote:
>> On Tue, Jun 12, 2018 at 07:02:57PM +0200, Daniel Lezcano wrote:
>>> Mmh, it is unclear for me if the park() vs wakeup() can happen at the
>>> same time.
>>>
>>> If the park() function is called, that means the h
Hi Liang,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on mtd/nand/next]
[also build test ERROR on v4.17 next-20180613]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On Wed 13-06-18 05:41:08, Naoya Horiguchi wrote:
[...]
> From: Naoya Horiguchi
> Date: Wed, 13 Jun 2018 12:43:27 +0900
> Subject: [PATCH] mm: zero remaining unavailable struct pages
>
> There is a kernel panic that is triggered when reading /proc/kpageflags
> on the kernel booted with kernel para
On Mon, Jun 4, 2018 at 4:15 PM, Alexandre Belloni
wrote:
> Use correct types for offset and time and use
> rtc_time64_to_tm/rtc_tm_to_time64 to handle dates after 2106 properly.
>
> Signed-off-by: Alexandre Belloni
Acked-by: Linus Walleij
Yours,
Linus Walleij
On Mon, Jun 4, 2018 at 4:15 PM, Alexandre Belloni
wrote:
> Switch to devm_rtc_allocate_device/rtc_register_device. This allow or
> further improvement and simplifies ftrtc010_rtc_remove().
>
> Signed-off-by: Alexandre Belloni
Acked-by: Linus Walleij
Yours,
Linus Walleij
On Mon, Jun 4, 2018 at 4:15 PM, Alexandre Belloni
wrote:
> The current range handling is highly suspicious. Anyway, let the core
> handle it.
Hmmm. I have datasheets, do you need some input about the hardware?
Something I should patch?
> The RTC has a 32 bit counter on top of days + hh:mm:ss reg
On 13-06-18, 11:03, Daniel Lezcano wrote:
> nr_threads(smpboot) <> nr_threads(idleinject)
>
> If we are facing races issues, it is because we are trying to avoid
> using locks in the code path. With lock and proper refcounting that
> should be solved, AFAICT there are similar races with inodes.
I
On Tue 12-06-18 10:11:33, Jason Baron wrote:
[...]
> Ok, I share the concern that there is a chance that userspace is relying
> on MADV_DONTNEED not free'ing locked memory. In that case, what if we
> introduce a MADV_DONTNEED_FORCE, which does everything that
> MADV_DONTNEED currently does but in a
Hi Jun,
On 06/06/18 05:39, Jun Yao wrote:
> Migrate swapper_pg_dir and tramp_pg_dir. And their virtual addresses
> do not correlate with kernel's address.
This is all to make 'KSMA' harder, where an single arbitrary write is used to
add a block mapping to the page-tables, giving the attacker full
Hi Peter,
On 13 June 2018 at 16:53, Peter Meerwald-Stadler wrote:
>
>> From: Freeman Liu
>
> some comments below
>
>> The Spreadtrum SC27XX PMICs ADC controller contains 32 channels,
>> which is used to sample voltages with 12 bits conversion.
>>
>> Signed-off-by: Freeman Liu
>> Signed-off-by:
Hello Stephen,
Thanks for review.
On 6/12/2018 1:25 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-06-04 00:56:25)
diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
new file mode 100644
index 000..317ab33
--- /dev/null
+++ b/drivers/clk/qcom/dispcc-sdm845.c
On Tue, Jun 12, 2018 at 8:31 PM, Al Viro wrote:
> On Tue, Jun 12, 2018 at 07:24:23PM +0100, Al Viro wrote:
>> I hate it, but... consider path_open() objections withdrawn for now.
Is that an ACK for the pull if I follow up with fixes for mmap botch, etc?
>> Uses of ->vm_file (and rules for those
Frequency table macro is used by multiple clock drivers, move frequency
table macro to common header file.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h | 2 ++
drivers/clk/qcom/gcc-apq8084.c | 2 --
drivers/clk/qcom/gcc-ipq4019.c | 2 --
drivers/clk/qcom/gcc-ipq8074.c | 2 --
Linus,
I2C has for 4.18:
* mainly feature additions to drivers (stm32f7, qup, xlp9xx, mlxcpld, ...)
* conversion to use the i2c_8bit_addr_from_msg macro consistently
* move includes to platform_data
* core updates to allow the (still in review) I3C subsystem to connect
* and the regular share of
On Wed, Jun 13, 2018 at 12:36 PM, Jason Gunthorpe wrote:
> On Tue, May 08, 2018 at 04:50:16PM +0800, Lidong Chen wrote:
>> The userspace may invoke ibv_reg_mr and ibv_dereg_mr by different threads.
>> If when ibv_dereg_mr invoke and the thread which invoked ibv_reg_mr has
>> exited, get_pid_task w
On 13/06/2018 11:10:35+0200, Linus Walleij wrote:
> On Mon, Jun 4, 2018 at 4:15 PM, Alexandre Belloni
> wrote:
> > The current range handling is highly suspicious. Anyway, let the core
> > handle it.
>
> Hmmm. I have datasheets, do you need some input about the hardware?
> Something I should patc
If the test_printf module is loaded before the crng is initialized, the
plain 'p' tests will fail because the printed address will not be hashed
and the buffer will contain "(ptrval)" instead.
Since we cannot wait for the crng to be initialized for an undefined
time, both plain 'p' tests now accept
So close...
On Tue, Jun 12, 2018 at 11:09:44PM +0200, Chris Opperman wrote:
> Changes since v3:
> a) Reverted u64 to unsigned long long and u32 to unsigned int.
> b) Added patch versioning.
> c) Changed type of scans_left to unsigned long long to avoid cast.
> d) Clarified and updated chan
Hi Liang,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on mtd/nand/next]
[also build test ERROR on v4.17 next-20180613]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
Hi Rob,
On 12/06/18 21:48, Rob Herring wrote:
On Fri, Jun 01, 2018 at 02:16:05PM +0100, Suzuki K Poulose wrote:
The coresight drivers relied on default bindings for graph
in DT, while reusing the "reg" field of the "ports" to indicate
the actual hardware port number for the connections. However
Laura Abbott writes:
> On 06/11/2018 11:03 PM, Michael Ellerman wrote:
>> kbuild test robot writes:
...
>>> All errors (new ones prefixed by >>):
>>>
> ld: cannot open linker script file scripts/module-common.lds: No such
> file or directory
>>
>> This seems to need the following.
>>
>
On Mon, Jun 11, 2018 at 10:59:31PM +0800, Robin Gong wrote:
> No need anymore for 'lock' now since virtual dma will provide
> the common lock instead.
This can be merged into the last patch, maybe rephrasing the commit
message from "revert..." to what is being done. To me "revert" sounds
like the
In the subject: s/limation/limitation/
Sascha
On Mon, Jun 11, 2018 at 10:59:32PM +0800, Robin Gong wrote:
> No this limitation now after virtual dma used since bd is allocated
> dynamically instead of static.
>
> Signed-off-by: Robin Gong
> ---
> drivers/dma/imx-sdma.c | 14 --
>
Frequency table macro is used by multiple clock drivers, move frequency
table macro to common header file.
Change-Id: I78d76f04b6c335c05dd9325025be7db1e99cbeac
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h| 2 ++
drivers/clk/qcom/gcc-apq8084.c| 2 --
drivers/clk/qcom/gcc-i
On Wed, 13 Jun 2018 at 12:53, Linus Torvalds
wrote:
>
> On Tue, Jun 12, 2018 at 9:49 PM Greg Kroah-Hartman
> wrote:
> I'm going to be start traveling towards Japan and China tomorrow
> morning, so I wanted to just get the problems I noticed out of my
Great!, welcome to our country(China), and l
On Wed, Jun 13, 2018 at 11:42:51AM +1000, NeilBrown wrote:
> On Tue, Jun 12 2018, Paul E. McKenney wrote:
>
> > On Tue, Jun 12, 2018 at 06:11:50PM -0700, Linus Torvalds wrote:
> >> On Tue, Jun 12, 2018 at 6:02 PM Paul E. McKenney
> >> wrote:
> >> >
> >> > We did review this one, and Neil did make
On 13/06/2018 04:18, Linus Torvalds wrote:
> On Tue, Jun 12, 2018 at 7:03 AM Paolo Bonzini wrote:
>>
>> * x86: many bugfixes, implement more Hyper-V super powers,
>
> Uhhuh, I didn't notice this initially, because my basic sanity tests
> are with everything enabled, but this breaks the build:
>
On Tue, Jun 12, 2018 at 04:36:11PM -0500, Nishanth Menon wrote:
> Call secure services to enable ACTLR[0] (Enable invalidates of BTB with
> ICIALLU) when branch hardening is enabled for kernel.
As mentioned elsewhere, I don't think this is a good idea - if the secure
world is not implementing the
> -Original Message-
> From: linux-scsi-ow...@vger.kernel.org On
> Behalf Of Evan Green
> Sent: Tuesday, June 12, 2018 10:43 PM
> To: Stanislav Nijnikov
> Cc: adrian.hun...@intel.com; Vinayak Holikatti ;
> j...@linux.vnet.ibm.com; martin.peter...@oracle.com;
> linux-kernel@vger.kernel
Hi Rafael,
On 2018-06-13 10:16, Rafael J. Wysocki wrote:
> On Wed, Jun 13, 2018 at 8:23 AM, Marek Szyprowski
> wrote:
> On 2018-06-12 16:24, Rafael J. Wysocki wrote:
>>> On Tuesday, June 12, 2018 2:44:23 PM CEST Marek Szyprowski wrote:
On 2018-06-12 13:00, Rafael J. Wysocki wrote:
> From
[v2]
* Removed unused header file includes.
* Moved the frequency table macro to a common file [1].
* Move to pll config to probe.
* Update SoC name in device tree binding and
also update the Kconfig.
Add support for the display clock controller found on SDM845
based devices. This wou
Add device tree bindings for display clock controller for Qualcomm
Technology Inc's SDM845 SoCs.
Signed-off-by: Taniya Das
Reviewed-by: Rob Herring
---
.../devicetree/bindings/clock/qcom,dispcc.txt | 19 +
include/dt-bindings/clock/qcom,dispcc-sdm845.h | 45
Add support for the display clock controller found on SDM845
based devices. This would allow display drivers to probe and
control their clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 10 +
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/dispcc-sdm845.c | 674
On Tue, Jun 12, 2018 at 04:41:32PM -0400, Agustin Vega-Frias wrote:
> Hi Mark,
>
> On 2018-06-12 10:40, Mark Rutland wrote:
> >Hi,
> >
> >On Thu, Jun 07, 2018 at 09:56:48AM -0400, Agustin Vega-Frias wrote:
> >>Selection of these events can be envisioned as indexing them from
> >>a 3D matrix:
> >>-
Call regulator_balance_voltage() instead of set_voltage_rdev()
in set_voltage_unlocked() and in enabling and disabling functions,
but only if the regulator is coupled.
Signed-off-by: Maciej Purski
---
Changes in v2:
- fix compile errors
- make debug messages more informative
---
drivers/regulat
Hi Brian,
On Tue, Jun 12, 2018 at 01:23:25PM -0700, Brian Norris wrote:
> Eek, sorry this series should have subjects "[PATCH v5 X/2] ...". I
> can resend if really needed, but hopefully by now this is ready to
> go...
No need to resend. Patches look fine to me, but we are currently
in the merge
From: Zhouyang Jia
> Sent: 12 June 2018 05:49
>
> When try_module_get fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling try_module_get.
...
> +++ b/drivers/staging/lustre/lnet/klnds/socklnd/socklnd.c
> @@ -2422,7 +2422,10
On 13/06/18 09:45, Sudeep Holla wrote:
On Wed, Jun 13, 2018 at 9:21 AM, Srinivas Kandagatla
wrote:
On 12/06/18 17:34, Marc Zyngier wrote:
I suggest you find out how the GIC has been integrated on this
platform. If you take a fault on accessing this register, this very
much looks like an
On 13/06/2018 09:48, Cornelia Huck wrote:
On Wed, 13 Jun 2018 09:41:16 +0200
Pierre Morel wrote:
On 07/05/2018 17:11, Tony Krowiak wrote:
Introduces a new AP device driver. This device driver
is built on the VFIO mediated device framework. The framework
provides sysfs interfaces that facilita
Hi,
Making sure this patch and the next one [1] are not being forgotten.
[1] https://patchwork.kernel.org/patch/10437565/
On Wed, May 30, 2018 at 5:17 AM, Fabien Parent wrote:
> ChromeOS devices can have one optional dedicated port.
> The Dedicated port is unique and similar to the USB PD ports
Hi Marek,
On Wed, Jun 13, 2018 at 12:23 PM, Marek Szyprowski
wrote:
> Hi Rafael,
>
[cut]
> Let's get back to my IOMMU and codec case, mentioned here:
> https://marc.info/?l=linux-pm&m=152878741527962&w=2
>
> Now, after applying your patch, when IOMMU creates a link with
> DL
Paolo Bonzini writes:
> On 13/06/2018 04:18, Linus Torvalds wrote:
>> On Tue, Jun 12, 2018 at 7:03 AM Paolo Bonzini wrote:
>>>
>>> * x86: many bugfixes, implement more Hyper-V super powers,
>>
>> Uhhuh, I didn't notice this initially, because my basic sanity tests
>> are with everything enabled
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm-4.18-rc1-2
with top-most commit 6a900f884e3e864d13501e63357990bc472f940c
Merge branches 'pm-domains' and 'pm-tools'
on top of commit 3c89adb0d7f64d5b501730be7fb2bf53a479
Merge tag
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
acpi-4.18-rc1-2
with top-most commit 674455326ee397bc8334920533f71090b61fa594
Merge branch 'acpica'
on top of commit f4fe74cc909bf811cd9cc7fd84f5a7514e06a7e1
Merge tag 'acpi-4.18-rc1' of
On Thu, Jun 7, 2018 at 8:12 PM, Craig Tatlor wrote:
> Adds a function to interpolate against two points,
> this is carried arount as a helper function by tons of drivers.
>
> Signed-off-by: Craig Tatlor
The linear formula seems to fit the most natural form of linear
interpolation.
I bet some J
On 25/05/18 10:49, Julien Thierry wrote:
Provide a way to set a GICv3 interrupt as pseudo-NMI. The interrupt
must not be enabled when setting/clearing the NMI status of the interrupt.
Signed-off-by: Julien Thierry
Cc: Thomas Gleixner
Cc: Jason Cooper
Cc: Marc Zyngier
---
drivers/irqchip
On Wed, Jun 13, 2018 at 1:06 PM, Linus Walleij wrote:
> On Thu, Jun 7, 2018 at 8:12 PM, Craig Tatlor wrote:
>
>> Adds a function to interpolate against two points,
>> this is carried arount as a helper function by tons of drivers.
>>
>> Signed-off-by: Craig Tatlor
>
> The linear formula seems to
On 13/06/18 12:20, Jan Beulich wrote:
On 13.06.18 at 12:05, wrote:
> On 13.06.18 at 11:58, wrote:
>>> Using privcmd_call() for a singleton multicall seems to be wrong, as
>>> privcmd_call() is using stac()/clac() to enable hypervisor access to
>>> Linux user space.
>>>
>>> Add a new xen_
On 25/05/18 10:49, Julien Thierry wrote:
Provide a higher priority to be used for pseudo-NMIs. When such an
interrupt is received, enter the NMI state and prevent other NMIs to
be raised.
When returning from a pseudo-NMI, skip preemption and tracing if the
interrupted context has interrupts d
On Wed, 13 Jun 2018 12:54:40 +0200
Pierre Morel wrote:
> On 13/06/2018 09:48, Cornelia Huck wrote:
> > On Wed, 13 Jun 2018 09:41:16 +0200
> > Pierre Morel wrote:
> >
> >> On 07/05/2018 17:11, Tony Krowiak wrote:
> >>> Introduces a new AP device driver. This device driver
> >>> is built on th
From: Rafael J. Wysocki
It is reported that commit a192aa923b66a (ACPI / LPSS: Consolidate
runtime PM and system sleep handling) introduced a system suspend
regression on some machines, but the only functional change made by
it was to cause the PM quirks in the LPSS to also be used during
system
On Wed, Jun 13, 2018 at 12:29 PM, Thierry Escande
wrote:
> If the test_printf module is loaded before the crng is initialized, the
> plain 'p' tests will fail because the printed address will not be hashed
> and the buffer will contain "(ptrval)" instead.
> Since we cannot wait for the crng to be
Hi,
Please pull these apparmor changes for v4.18
Thanks!
- John
The following changes since commit 552c69b36ebd966186573b9c7a286b390935cce1:
Merge tag 'v4.17-rc3' into apparmor-next (2018-05-02 00:38:52 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/k
On 12/06/18 12:02, Taniya Das wrote:
> Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
> SoCs. This is required for managing the cpu frequency transitions which are
> controlled by firmware.
>
> Signed-off-by: Taniya Das
> ---
> .../bindings/cpufreq/cpufreq-qcom-fw.txt
On our Spreadtrum SC9860 platform, we registered the high resolution
ARM generic timer as one clocksource to update the OS time, but the
ARM generic timer will be stopped in suspend state. So we use one 64bit
always-on timer (but low resolution) of Spreadtrum to calculate the
suspend time to compen
We have introduced the persistent clock framework to support the OS time
compensating from persistent clock, and we will convert all drivers to
use common persistent clock framework instead of the persistent clock
support used only for the ARM architecture. So we can remove these code
with converti
On Spreadtrum SC9860 platform, we need one persistent timer to calculate
the suspend time to compensate the OS time.
This patch registers one Spreadtrum AON timer as persistent timer, which
runs at 32bit and periodic mode.
Signed-off-by: Baolin Wang
---
drivers/clocksource/Kconfig |1 +
Hi,
We will meet below issues when compensating the suspend time for the
timekeeping.
1. We have too many different ways of dealing with persistent timekeeping
across architectures, so it is hard for one driver to be compatible with
different architectures. For example, we should register
regis
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