On 2018/7/23 22:10, Yunlong Song wrote:
> If f2fs aborts BG_GC, then the section bit of victim_secmap will be set,
> which will cause the section skipped in the future get_victim of BG_GC.
> In a worst case that each section in the victim_secmap is set and there
> are enough free sections (so
Hello,
Thank you for your review.
On Thu, 19 Jul 2018 00:46:45 +0200
Ondřej Jirman wrote:
> Hello Mylène,
>
> On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote:
> > Add the support of regulator to use it as VCC source.
> >
> > Signed-off-by: Mylène Josserand
> > ---
> >
On Tue 24-07-18 14:17:12, David Hildenbrand wrote:
> On 24.07.2018 09:25, Michal Hocko wrote:
> > On Mon 23-07-18 19:20:43, David Hildenbrand wrote:
> >> On 23.07.2018 14:30, Michal Hocko wrote:
> >>> On Mon 23-07-18 13:45:18, Vlastimil Babka wrote:
> On 07/20/2018 02:34 PM, David Hildenbrand
I found in probe function some drivers use irq_of_parse_and_map
and do not call irq_dispose_mapping in err path, while other drivers do.
So I think a resource managed irq_of_parse_and_map function can
be better to finish this job.
At 2018-07-23 23:28:52, "Rob Herring" wrote:
>On Sat, Jul 21,
On 21-07-18, 13:06, Paul Cercueil wrote:
> +static const struct jz4780_dma_soc_data jz4780_dma_soc_data[] = {
> + [ID_JZ4780] = { .nb_channels = 32, },
why the array of structs?
> +};
> +
> +static const struct of_device_id jz4780_dma_dt_match[] = {
> + { .compatible =
Replace bootmem initialization with memblock_add and memblock_reserve calls
and explicit initialization of {min,max}_low_pfn.
Signed-off-by: Mike Rapoport
---
arch/um/Kconfig.common | 2 ++
arch/um/kernel/physmem.c | 20 +---
2 files changed, 11 insertions(+), 11 deletions(-)
The setup_physmem() function receives uml_physmem and uml_reserved as
parameters and still used these global variables. Replace such usage with
local variables.
Signed-off-by: Mike Rapoport
---
arch/um/kernel/physmem.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Hi,
These patches convert UML to use NO_BOOTMEM.
Tested on x86-64.
Mike Rapoport (2):
um: setup_physmem: stop using global variables
um: switch to NO_BOOTMEM
arch/um/Kconfig.common | 2 ++
arch/um/kernel/physmem.c | 22 ++
2 files changed, 12 insertions(+), 12
Good Morning,
This is revision three of the patch.
I have changed the device match from Tegra to Xoom as per Dmitry's
suggestion, to be more accurate.
The CPCAP regulator driver can support various devices, but currently only
supports Omap4 devices.
Adds the sw2 and sw4 voltage tables, which
SW2 and SW4 use a shared table to provide voltage to the cpu core and
devices on Tegra hardware.
Added this table to the cpcap regulator driver as the first step to
supporting this device on Tegra.
Signed-off-by: Peter Geis
---
drivers/regulator/cpcap-regulator.c | 23 +++
1
Added support for the CPCAP power management regulator functions on
Tegra based Motorola Xoom devices.
Added sw2_sw4 value tables, which provide power to the Tegra core and
aux devices.
Added the Xoom init tables and device tree compatibility match.
Signed-off-by: Peter Geis
---
On 24.07.2018 15:13, Michal Hocko wrote:
> On Tue 24-07-18 14:17:12, David Hildenbrand wrote:
>> On 24.07.2018 09:25, Michal Hocko wrote:
>>> On Mon 23-07-18 19:20:43, David Hildenbrand wrote:
On 23.07.2018 14:30, Michal Hocko wrote:
> On Mon 23-07-18 13:45:18, Vlastimil Babka wrote:
Hello, Patrick.
On Mon, Jul 23, 2018 at 06:22:15PM +0100, Patrick Bellasi wrote:
> However, the "best effort" bandwidth control we have for CFS and RT
> can be further improved if, instead of just looking at time spent on
> CPUs, we provide some more hints to the scheduler to know at which
>
On 7/23/18 5:21 PM, Peter Zijlstra wrote:
> On Tue, Jul 17, 2018 at 12:08:36PM +0800, Xunlei Pang wrote:
>> The trace data corresponds to the last sample period:
>> trace entry 1:
>> cat-20755 [022] d... 1370.106496: cputime_adjust: task
>> tick-based utime 36256000 stime
On Wed, 4 Jul 2018, Andy Shevchenko wrote:
On Tue, Jul 3, 2018 at 9:09 AM, Nikolaus Voss wrote:
When using ACPI with ACPI_DT_NAMESPACE_HID/ PRP0001 HID and referring to
of_device_id table "compatible" strings in DSD, a pointer to the
corresponding DT table entry should be returned instead of a
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REPLY TO:
On Mon, 9 Jul 2018, Rafael J. Wysocki wrote:
On Wednesday, July 4, 2018 4:40:34 PM CEST Andy Shevchenko wrote:
On Tue, Jul 3, 2018 at 9:09 AM, Nikolaus Voss wrote:
When using ACPI with ACPI_DT_NAMESPACE_HID/ PRP0001 HID and referring to
of_device_id table "compatible" strings in DSD, a
On 21-07-18, 13:06, Paul Cercueil wrote:
> +static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma,
> + unsigned int chn)
right justified and aligned with preceding please. While adding new
code to a existing driver it is a good idea to conform to existing style
> +{
> +
On Tue, 2018-07-24 at 12:31 +, Udit Agarwal wrote:
> Yes the secure keys and CAAM are correlated. Secure keys depends on
> NXP CAAM crypto HW accelerator. Secure key is a random data of
> length X (passed using keyctl command) & derived using CAAM. Blob of
> this data is also created using
On Tue 24-07-18 15:27:51, David Hildenbrand wrote:
> On 24.07.2018 15:13, Michal Hocko wrote:
> > On Tue 24-07-18 14:17:12, David Hildenbrand wrote:
> >> On 24.07.2018 09:25, Michal Hocko wrote:
> >>> On Mon 23-07-18 19:20:43, David Hildenbrand wrote:
> On 23.07.2018 14:30, Michal Hocko
On 21-07-18, 13:06, Paul Cercueil wrote:
> From: Daniel Silsby
>
> The 'dtc' word in jz DMA descriptors contains two fields: The
> lowest 24 bits are the transfer count, and upper 8 bits are the DOA
> offset to next descriptor. The upper 8 bits are now correctly masked
> off when computing
On Mon 2018-07-23 12:00:08, Linus Torvalds wrote:
> On Mon, Jul 23, 2018 at 7:09 AM Pavel Machek wrote:
> >
> > Meanwhile... it looks like gcc is not slowed down significantly, but
> > other stuff sees 30% .. 40% slowdowns... which is rather
> > significant.
>
> That is more or less expected.
On 7/24/2018 2:59 AM, Alex G. wrote:
On 07/23/2018 05:14 PM, Jakub Kicinski wrote:
On Tue, 24 Jul 2018 00:52:22 +0300, Tal Gilboa wrote:
On 7/24/2018 12:01 AM, Jakub Kicinski wrote:
On Mon, 23 Jul 2018 15:03:38 -0500, Alexandru Gagniuc wrote:
PCIe downtraining happens when both the device
* Mark Rutland wrote:
> > Ok, then these bits will have to wait until Greg's tree goes upstream
> > in about two weeks.
>
> Ok.
>
> > Which patches can I apply as a preparatory step?
>
> Patches 2-6 can be applied now.
Ok, will apply those.
> I guess I should rebase and resend the
Hello Dmitry,
Thank you for your review!
On Mon, 23 Jul 2018 15:39:26 -0700
Dmitry Torokhov wrote:
> On Thu, Jul 19, 2018 at 12:46:45AM +0200, Ondřej Jirman wrote:
> > Hello Mylène,
> >
> > On Wed, Jul 18, 2018 at 08:27:17PM +0200, Mylène Josserand wrote:
> > > Add the support of regulator
On Tue, 24 Jul 2018 15:00:04 +0200
Maxime Ripard wrote:
> On Tue, Jul 24, 2018 at 12:15:22PM +0200, Emmanuel Vadot wrote:
> > The SID controller on H5 look the same as the one present in the A64.
> > But in case we find some difference one day at a compatible string
> > of it's own and a
From: Hanna Hawa
>> drivers/dma/mv_xor_v2.c:647:36: sparse: constant 0x is so big it
>> is long
include/linux/device.h:678:13: sparse: undefined identifier
'__builtin_mul_overflow'
include/linux/device.h:678:13: sparse: call with no type!
Use lower_32_bits and upper_32_bits
Op di, 24 jul 2018 om 2:53 , schreef Maxime Ripard
:
On Mon, Jul 23, 2018 at 06:09:54PM +0200,
stevenvandenbrandenst...@gmail.com wrote:
From: Steven Vanden Branden
Add mali gpu node to sun4i a10 platforms.
Tested with offscreen rendering with lima mesa (freedesktop gitlab)
Em Tue, Jul 24, 2018 at 12:49:43PM +0200, Stefan Liebler escreveu:
> In each case, the introduction of the subdirectory /usr/lib/include leads to
> the regression that one can't build the glibc RPM for s390 anymore as gcc
> can't find headers like stdbool.h.
> Should bpf.h be moved to
On Wed, 18 Jul 2018 11:12:10 +0200
Sebastian Andrzej Siewior wrote:
> > > @@ -1115,7 +1116,7 @@ void kernel_neon_begin(void)
> > >
> > > BUG_ON(!may_use_simd());
> > >
> > > - local_bh_disable();
> > > + local_lock_bh(fpsimd_lock);
> > >
> > > __this_cpu_write(kernel_neon_busy, true);
On Tue, Jul 24, 2018 at 3:41 PM, Alexei Colin wrote:
> ARM SoCs with a PCI bus offer the RapiodIO config menu; SoCs with
> RapidIO IP blocks but without a PCI bus, need to add "select
> HAS_RAPIDIO" to the Kconfig entry for that SoC (e.g. ARCH_*).
>
> HAS_RAPIDIO was chosen over HAVE_RAPIDIO to
Perf test 40 for example has several subtests numbered 1-4 when
displaying the start of the subtest. When the subtest results
are displayed the subtests are numbered 0-3.
Use this command to generate trace output:
[root@s35lp76 perf]# ./perf test -Fv 40 2>/tmp/bpf1
Fix this by adjusting the
ARM64 SoCs with a PCI bus present the RapiodIO options; SoCs with
RapidIO IP blocks but without a PCI bus, need to select HAS_RAPIDIO in
Kconfig.platforms.
HAS_RAPIDIO was chosen over HAVE_RAPIDIO to be consistent with
other architectures which already define this flag (powerpc).
Signed-off-by:
On 7/23/2018 8:00 PM, Roy Pledge wrote:
> Convert the Datapath I/O documentation to .rst format
> and move to the Documation/networking/dpaa2 directory
typo: ^^^ Documentation
>
> Signed-off-by: Roy Pledge
> ---
> .../networking/dpaa2/dpio-driver.rst | 30
>
ARM SoCs with a PCI bus offer the RapiodIO config menu; SoCs with
RapidIO IP blocks but without a PCI bus, need to add "select
HAS_RAPIDIO" to the Kconfig entry for that SoC (e.g. ARCH_*).
HAS_RAPIDIO was chosen over HAVE_RAPIDIO to be consistent with
other architectures which already define this
On 2018-07-24 09:46:23 [-0400], Steven Rostedt wrote:
> > Unfortunately yes.
>
> Then we need to find another solution, because this is way too ugly and
> as Dave said, fragile to keep.
Yes. I have something new where Mike said it works (while this causes
Mike's gcc to segfault). Need to test
On Tue, Jul 24, 2018 at 09:41:26AM -0400, Alexei Colin wrote:
> ARM SoCs with a PCI bus offer the RapiodIO config menu; SoCs with
> RapidIO IP blocks but without a PCI bus, need to add "select
> HAS_RAPIDIO" to the Kconfig entry for that SoC (e.g. ARCH_*).
>
> HAS_RAPIDIO was chosen over
On Sunday, 22 July 2018 19:49:09 MSK Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> Avoid eMMC issues by specifying broken-hpi.
>
> Signed-off-by: Marcel Ziswiler
>
> ---
Is it a specific eMMC card model that has broken HPI or it is a host
controller bug?
Sean Wang report dma_zalloc_coherent doesn't work as expect on his
armv7,the allocated mem is not zeroed.The reason is __alloc_from_pool
doesn't honor __GFP_ZERO.
Like commit 6829e274a623 ("arm64: dma-mapping: always clear allocated buffers")
does,always clear allocated buffers to fix this.
2018-07-24 13:07 GMT+02:00 sakari.ai...@linux.intel.com
:
> On Tue, Jul 17, 2018 at 10:01:17AM +0200, Bartosz Golaszewski wrote:
>> I will soon be sending my pull request to Wolfram, so if you still
>> want that applied for 4.19 - please resend with the commit message
>> fixed.
>
> Alan?
>
> Not
On 24.07.2018 15:35, Michal Hocko wrote:
> On Tue 24-07-18 15:27:51, David Hildenbrand wrote:
>> On 24.07.2018 15:13, Michal Hocko wrote:
>>> On Tue 24-07-18 14:17:12, David Hildenbrand wrote:
On 24.07.2018 09:25, Michal Hocko wrote:
> On Mon 23-07-18 19:20:43, David Hildenbrand wrote:
On Tue, 2018-07-24 at 15:44 +0300, Dmitry Osipenko wrote:
> On Tuesday, 24 July 2018 15:24:34 MSK Marcel Ziswiler wrote:
> > Sorry, I meant to write "minor revamp" in the subject line here as
> > Apalis TK1 was already in quite good a shape but this are still
> > some
> > worthy improvements
Em Tue, Jul 24, 2018 at 03:48:58PM +0200, Thomas Richter escreveu:
> Perf test 40 for example has several subtests numbered 1-4 when
> displaying the start of the subtest. When the subtest results
> are displayed the subtests are numbered 0-3.
>
> Use this command to generate trace output:
>
On 2018/7/24 21:39, Yunlong Song wrote:
>
>
> On 2018/7/24 21:11, Chao Yu wrote:
>> On 2018/7/23 22:10, Yunlong Song wrote:
>>> If f2fs aborts BG_GC, then the section bit of victim_secmap will be set,
>>> which will cause the section skipped in the future get_victim of BG_GC.
>>> In a worst case
Inorder to debug issues with fpga's users would
like to read the fpga configuration information.
This patch adds readback support for fpga configuration data
in the framework through debugfs interface.
Usage:
cat /sys/kernel/debug/fpga/fpga0/image
Signed-off-by: Appana Durga Kedareswara
This patch does the below
--> Adds support for readback of pl configuration data
--> Adds support for readback of pl configuration registers
Usage:
Readback of PL configuration registers
cat /sys/kernel/debug/fpga/fpga0/image
Readback of PL configuration data
echo 1 >
On Fri 20-07-18 17:09:02, Andrew Morton wrote:
[...]
> - Undocumented return value.
>
> - comment "failed to reap part..." is misleading - sounds like it's
> referring to something which happened in the past, is in fact
> referring to something which might happen in the future.
>
> - fails
Remove the staging/drivers/fsl-mc directory from the staging
area now that all the components have been moved to the main
kernel areas.
Signed-off-by: Roy Pledge
---
drivers/staging/Kconfig | 2 --
drivers/staging/Makefile| 1 -
drivers/staging/fsl-mc/Kconfig | 2 --
Move the NXP DPIO (Datapath I/O driver) from the staging/fsl-mc/bus/dpio
directory to the drivers/soc/fsl directory.
The DPIO driver enables access to the Queue and Buffer Managemer (QBMAN)
hardware of NXP DPAA2 devices. This is a prerequiste for moving the DPAA2
Ethernet device driver from the
From: Horia Geantă
Previous commits:
commit 6e2387e8f19e ("staging: fsl-dpaa2/eth: Add Freescale DPAA2
Ethernet driver")
commit 39163c0ce0f4 ("staging: fsl-dpaa2/eth: Errors checking update")
have added bits that are not specific to the WRIOP accelerator.
Move these where they belong (in DPIO)
Hi Ravi,
Thank you for updating the series. At least trace_uprobe side,
it looks good to me ;)
Reviewed-by: Masami Hiramatsu
Thanks!
On Mon, 16 Jul 2018 14:17:03 +0530
Ravi Bangoria wrote:
> Userspace Statically Defined Tracepoints[1] are dtrace style markers
> inside userspace
Convert the Datapath I/O documentation to .rst format
and move to the Documation/networking/dpaa2 directory
Signed-off-by: Roy Pledge
---
.../networking/dpaa2/dpio-driver.rst | 29 +++---
Documentation/networking/dpaa2/index.rst | 1 +
2 files changed,
Move the NXP DPIO (Datapath I/O Driver) out of the
drivers/staging directory and into the drivers/soc/fsl directory.
The DPIO driver enables access to Queue and Buffer Manager (QBMAN)
hardware on NXP DPAA2 devices. This is a prerequisite to moving the
DPAA2 Ethernet driver out of staging.
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On Tue, 24 Jul 2018 11:58:18 +0200
Claudio wrote:
> Hello Steven,
>
> I am doing correlation of linux sched events, following all tasks between
> cpus,
> and one thing that would be really convenient would be to have a global
> trace_pipe_raw, in addition to the per-cpu ones, with already
On Tue, 24 Jul 2018 10:23:16 -0400
Steven Rostedt wrote:
> >
> > Would work in the direction of adding a global trace_pipe_raw be considered
> > for inclusion?
>
> The design of the lockless ring buffer requires not to be preempted,
> and that the data cannot be written to from more than one
On 7/24/2018 9:52 AM, Horia Geanta wrote:
> On 7/23/2018 8:00 PM, Roy Pledge wrote:
>> Convert the Datapath I/O documentation to .rst format
>> and move to the Documation/networking/dpaa2 directory
> typo: ^^^ Documentation
>
>> Signed-off-by: Roy Pledge
>> ---
>>
* Nadav Amit wrote:
> Use assembly macros for jump-labels and call them from inline assembly.
> This not only makes the code more readable, but also improves
> compilation decision, specifically inline decisions which GCC base on
> the number of new lines in inline assembly.
>
> As a result
On Tue, 2018-07-24 at 17:03 +0300, Dmitry Osipenko wrote:
> On Sunday, 22 July 2018 19:49:09 MSK Marcel Ziswiler wrote:
> > From: Marcel Ziswiler
> >
> > Avoid eMMC issues by specifying broken-hpi.
> >
> > Signed-off-by: Marcel Ziswiler
> >
> > ---
>
> Is it a specific eMMC card model that
Implement polling with 10 ms timeout for automatic pad drive strength
calibration.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 24 +++-
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c
Hi all,
Update the tegra_sdhci_pad_autocalib() pad drive strength calibration
procedure to match the ones specified in the TRMs of the more recent
SoCs. This was tested on Tegra186, Tegra210, and Tegra124, although it
should not break things older generations either.
This series depends on the
On Mon, 23 Jul 2018 22:25:34 -0400
Steven Rostedt wrote:
> On Sat, 14 Jul 2018 01:28:15 +0900
> Masami Hiramatsu wrote:
>
> > Inherit the tracing on/off setting on ring_buffer to next
> > trace buffer when taking a snapshot.
> >
> > Taking a snapshot is done by swapping with backup ring
On Tuesday, 24 July 2018 17:16:33 MSK Marcel Ziswiler wrote:
> On Tue, 2018-07-24 at 15:44 +0300, Dmitry Osipenko wrote:
>
> > On Tuesday, 24 July 2018 15:24:34 MSK Marcel Ziswiler wrote:
> >
> > > Sorry, I meant to write "minor revamp" in the subject line here as
> > > Apalis TK1 was already in
Configure the voltage reference used by the automatic pad drive strength
calibration procedure. The value is a magic number from the TRM.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git
Parse the pad drive strength calibration offsets from the device tree.
Program the calibration offsets in accordance with the current signaling
mode.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 147 -
1 file changed, 146
Automatic pad drive strength calibration is performed on a separate pad
identical to the ones used for driving the actual bus. Power on the
calibration pad during the calibration procedure and power it off
afterwards to save power.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c
Disable the card clock during automatic pad drive strength calibration
and re-enable it aftewards.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c
Add bindings documentation for pad pull up and pull down offset values to be
programmed before executing automatic pad drive strength calibration.
Signed-off-by: Aapo Vienamo
---
.../bindings/mmc/nvidia,tegra20-sdhci.txt | 32 ++
1 file changed, 32 insertions(+)
Add the calibration offset properties used for automatic pad drive
strength calibration.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
Add the calibration offset properties used for automatic pad drive
strength calibration.
Signed-off-by: Aapo Vienamo
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
Run the automatic pad calibration after voltage switching if
tegra_host->pad_calib_required is set.
Signed-off-by: Aapo Vienamo
---
drivers/mmc/host/sdhci-tegra.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index
On 7/24/2018 5:21 PM, Roy Pledge wrote:
> Move the NXP DPIO (Datapath I/O driver) from the staging/fsl-mc/bus/dpio
> directory to the drivers/soc/fsl directory.
>
> The DPIO driver enables access to the Queue and Buffer Managemer (QBMAN)
> hardware of NXP DPAA2 devices. This is a prerequiste for
On 24/07/2018 10:17, Tianyu Lan wrote:
> mmu_set_spte() flushes remote tlbs for drop_parent_pte/drop_spte()
> and set_spte() separately. This may introduce redundant flush. This
> patch is to combine these flushes and check flush request after
> calling set_spte().
>
> Signed-off-by: Lan Tianyu
ish_dev_init() allocates 512*176 bytes memory for tx_buf and stores it at
>wr_free_list_head.link list on ish_probe().
But there is no deallocation of this memory in ish_remove() and in
ish_probe() error path.
So current intel-ish-ipc provides 88 KB memory leak for each
probe/release.
The patch
On Tue, Jul 24, 2018 at 09:25:40AM -0400, Peter Geis wrote:
> SW2 and SW4 use a shared table to provide voltage to the cpu core and
> devices on Tegra hardware.
> Added this table to the cpcap regulator driver as the first step to
> supporting this device on Tegra.
Please submit patches using
Hi Thomas.
One nitpick below.
But other than that this is a nice cleanup:
Acked-by: Sam Ravnborg
> +/*
> + * Locations of MSI Registers.
> + */
The SPARC way to format comments follows netdev style.
So put it all in one line and everyone are happy:
/* Locations of MSI Registers. */
>
After commit 249d4a9b3246 ("timers: Reinitialize per cpu bases
on hotplug") i.e introduction of state CPUHP_TIMERS_PREPARE
instead of CPUHP_TIMERS_DEAD the cpuhp_step name "timers:dead"
for timer looks to invalid. So, better to name it as
"timers:prepare".
Signed-off-by: Mukesh Ojha
Cc: Thomas
> -Original Message-
> From: Horia Geanta
> Sent: Tuesday, July 24, 2018 5:35 PM
> To: Roy Pledge ; de...@driverdev.osuosl.org; linux-
> arm-ker...@lists.infradead.org; gre...@linuxfoundation.org; Leo Li
>
> Cc: Laurentiu Tudor ; Ioana Ciocoi Radulescu
> ; linux-kernel@vger.kernel.org;
>
> On Jul 24, 2018, at 6:39 AM, Pavel Machek wrote:
>
>> On Mon 2018-07-23 12:00:08, Linus Torvalds wrote:
>>> On Mon, Jul 23, 2018 at 7:09 AM Pavel Machek wrote:
>>>
>>> Meanwhile... it looks like gcc is not slowed down significantly, but
>>> other stuff sees 30% .. 40% slowdowns... which
On Tue, Jul 24, 2018 at 03:34:32PM +0200, Emmanuel Vadot wrote:
> On Tue, 24 Jul 2018 15:00:04 +0200
> Maxime Ripard wrote:
>
> > On Tue, Jul 24, 2018 at 12:15:22PM +0200, Emmanuel Vadot wrote:
> > > The SID controller on H5 look the same as the one present in the A64.
> > > But in case we find
Hello,
Thanks for the review.
On Tue, 24 Jul 2018 16:37:36 +0200, Sam Ravnborg wrote:
> One nitpick below.
> But other than that this is a nice cleanup:
> Acked-by: Sam Ravnborg
> > +/*
> > + * Locations of MSI Registers.
> > + */
>
> The SPARC way to format comments follows netdev style.
>
On Tue, 2018-07-24 at 17:31 +0300, Dmitry Osipenko wrote:
> On Tuesday, 24 July 2018 17:16:33 MSK Marcel Ziswiler wrote:
> > On Tue, 2018-07-24 at 15:44 +0300, Dmitry Osipenko wrote:
> >
> > > On Tuesday, 24 July 2018 15:24:34 MSK Marcel Ziswiler wrote:
> > >
> > > > Sorry, I meant to write
On Wed, Jul 18, 2018 at 11:24:48AM +0200, Sebastian Andrzej Siewior wrote:
> On 2018-07-18 11:12:10 [+0200], To Dave Martin wrote:
> > > > - if (may_use_simd()) {
> > > > + if (!IS_ENABLED(CONFIG_PREEMPT_RT_BASE) && may_use_simd()) {
> > >
> > > I suspect this is wrong -- see comments
On Tuesday, 24 July 2018 17:45:01 MSK Marcel Ziswiler wrote:
> On Tue, 2018-07-24 at 17:31 +0300, Dmitry Osipenko wrote:
>
> > On Tuesday, 24 July 2018 17:16:33 MSK Marcel Ziswiler wrote:
> >
> > > On Tue, 2018-07-24 at 15:44 +0300, Dmitry Osipenko wrote:
> > >
> > >
> > > > On Tuesday, 24
On Tue, 24 Jul 2018 10:17:37 +0200
Snild Dolkow wrote:
> On 07/23/2018 06:41 PM, Steven Rostedt wrote:
> > On Mon, 23 Jul 2018 17:49:36 +0200
> > Snild Dolkow wrote:
> >> Any issues with the commit message? Reading it back again now, it doesn't
> >> seem quite as clear as when I wrote it.
>
After commit 249d4a9b3246 ("timers: Reinitialize per cpu bases
on hotplug") i.e introduction of state CPUHP_TIMERS_PREPARE
instead of CPUHP_TIMERS_DEAD the cpuhp_step name "timers:dead"
for timer looks to be invalid. So, better to name it as
"timers:prepare".
Signed-off-by: Mukesh Ojha
Cc:
Hi All,
Please review V2 where i will be updating(minor) commit text.
Thanks.
Mukesh
On 7/24/2018 8:07 PM, Mukesh Ojha wrote:
After commit 249d4a9b3246 ("timers: Reinitialize per cpu bases
on hotplug") i.e introduction of state CPUHP_TIMERS_PREPARE
instead of CPUHP_TIMERS_DEAD the cpuhp_step
On Tue, 24 Jul 2018 16:42:18 +0200
Maxime Ripard wrote:
> On Tue, Jul 24, 2018 at 03:34:32PM +0200, Emmanuel Vadot wrote:
> > On Tue, 24 Jul 2018 15:00:04 +0200
> > Maxime Ripard wrote:
> >
> > > On Tue, Jul 24, 2018 at 12:15:22PM +0200, Emmanuel Vadot wrote:
> > > > The SID controller on H5
On Tuesday, 24 July 2018 17:26:58 MSK Marcel Ziswiler wrote:
> On Tue, 2018-07-24 at 17:03 +0300, Dmitry Osipenko wrote:
>
> > On Sunday, 22 July 2018 19:49:09 MSK Marcel Ziswiler wrote:
> >
> > > From: Marcel Ziswiler
> > >
> > > Avoid eMMC issues by specifying broken-hpi.
> > >
> > >
Hi Thomas.
> >
> > The SPARC way to format comments follows netdev style.
> > So put it all in one line and everyone are happy:
>
> Well, the code is being moved from arch/sparc to arch/sparc, so
> apparently, it was already non-compliant to this specific coding style
> rule. Should the
On Mon, Jul 23, 2018 at 01:09:05PM -0700, Doug Anderson wrote:
> I know you are still looking for time to review the RPMh-regulator
> driver and that's fine. One idea I had though: if the bindings look
> OK to you and are less controversial, is there any chance they could
> land in the meantime?
On Mon, 23 Jul 2018 11:31:59 +0300
Andy Shevchenko wrote:
> This is the only location on kernel that has wrong spelling
> of the container_of() helper. Fix it.
>
> Signed-off-by: Andy Shevchenko
Acked-by: Steven Rostedt (VMware)
-- Steve
> ---
> kernel/trace/trace_printk.c | 2 +-
> 1
I would like to speak with the person that managing photos for your
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We provide image editing like – photos cutting out and retouching.
Enhancing your images is just a part of what we can do for your business.
Whether you’re an ecommerce
store or portrait photographer, real estate
I would like to speak with the person that managing photos for your
company?
We provide image editing like – photos cutting out and retouching.
Enhancing your images is just a part of what we can do for your business.
Whether you’re an ecommerce
store or portrait photographer, real estate
Commit-ID: 2397134ce2d73dcf1d4846579f594c9f3880b2ec
Gitweb: https://git.kernel.org/tip/2397134ce2d73dcf1d4846579f594c9f3880b2ec
Author: YueHaibing
AuthorDate: Fri, 20 Jul 2018 15:32:13 +0800
Committer: Ingo Molnar
CommitDate: Tue, 24 Jul 2018 09:46:42 +0200
x86/platform/pcspeaker: Use
Commit-ID: 387048f51aecaa083e660fe0f15ad339354b116e
Gitweb: https://git.kernel.org/tip/387048f51aecaa083e660fe0f15ad339354b116e
Author: zhong jiang
AuthorDate: Sat, 21 Jul 2018 15:55:32 +0800
Committer: Ingo Molnar
CommitDate: Tue, 24 Jul 2018 09:52:32 +0200
x86/mm/tlb: Make
Commit-ID: d2753e6b4882a637a0e8fb3b9c2e15f33265300e
Gitweb: https://git.kernel.org/tip/d2753e6b4882a637a0e8fb3b9c2e15f33265300e
Author: Thomas Gleixner
AuthorDate: Fri, 20 Jul 2018 10:39:07 +0200
Committer: Ingo Molnar
CommitDate: Tue, 24 Jul 2018 09:51:10 +0200
perf/x86/amd/ibs:
On 07/24/2018 04:48 PM, Steven Rostedt wrote:
> On Tue, 24 Jul 2018 10:17:37 +0200
> Snild Dolkow wrote:
>
>> creator other
>> vsnprintf:
>>fill (not terminated)
>>count the restread/use comm
>
> I think it would be better to
Actions Semi OWL family SoC's provides support for external interrupt
controller to be connected and controlled using SIRQ pins. S500, S700
and S900 provides 3 SIRQ lines and works independently for 3 external
interrupt controllers.
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan
Actions Semi Owl family SoC's S500, S700 and S900 provides support
for 3 external interrupt controllers through SIRQ pins.
Each line can be independently configured as interrupt or wake-up source,
and triggers either on rising, falling or both edges. Each line can also
be masked independently.
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