Hi Finn,
On Fri, Aug 24, 2018 at 4:02 AM Finn Thain wrote:
> Now that the 68k Mac port has adopted the via-pmu driver, it must decode
> the PMU response accordingly otherwise the date and time will be wrong.
>
> Signed-off-by: Finn Thain
Looks good to me, so I will queue as a fix for v4.19.
I
On Fri, Aug 31, 2018 at 07:12:44AM +0300, Meelis Roos wrote:
> > Thanks for the report! I'll try to reproduce the problem tomorrow and
> > investigate it. Can you please check if any of the kernel configurations
> > that show the bug has CONFIG_X86_PAE set? If not, can you please test
> > if enabli
> > I am seeing userland corruption and application crashes on multiple
> > 32-bit machines with 4.19-rc1+git. The machines vary: PII, PIII, P4.
> > They are all Intel. AMD Duron/Athlon/AthlonMP have been fine in my tests
> > so far (may be configuration dependent).
>
> Thanks for the report! I
On Fri, 31 Aug 2018, Geert Uytterhoeven wrote:
> Hi Finn,
>
> On Fri, Aug 24, 2018 at 4:02 AM Finn Thain wrote:
> > Now that the 68k Mac port has adopted the via-pmu driver, it must decode
> > the PMU response accordingly otherwise the date and time will be wrong.
> >
> > Signed-off-by: Finn Tha
On Thu, Aug 30, 2018 at 10:35:37PM +0100, John Whitmore wrote:
> On Thu, Aug 30, 2018 at 11:26:28AM +0300, Dan Carpenter wrote:
> > On Thu, Aug 30, 2018 at 11:23:05AM +0300, Dan Carpenter wrote:
> > > On Wed, Aug 29, 2018 at 09:35:27PM +0100, John Whitmore wrote:
> > > > Rename the bit field elemen
On 30/08/18 18:06, Aapo Vienamo wrote:
> Hi all,
>
> This series implements support for faster signaling modes on Tegra
> SDHCI controllers. This series consist of several parts: changes
> required for 1.8 V signaling and pad control, pad calibration, and
> tuning. Following earlies patch sets hav
Hi.
A problem was found in my drivers.
Before sending out patches, please let me
ask a question to make sure the right fix.
The problem is, my driver is forcibly setting
STOP condition unless the next message is read.
Please see this line:
https://github.com/torvalds/linux/blob/v4.19-rc1/dri
Hi Finn,
On Fri, Aug 31, 2018 at 9:12 AM Finn Thain wrote:
> On Fri, 31 Aug 2018, Geert Uytterhoeven wrote:
> > On Fri, Aug 24, 2018 at 4:02 AM Finn Thain
> > wrote:
> > > Now that the 68k Mac port has adopted the via-pmu driver, it must decode
> > > the PMU response accordingly otherwise the d
Hey everyone,
On Mon, 20 Aug 2018 15:27 Linus Torvalds wrote:
> On Mon, Aug 20, 2018 at 3:02 PM Woodhouse, David wrote:
>>
>> It's the *kernel* we don't want being able to access those pages,
>> because of the multitude of unfixable cache load gadgets.
>
> Ahh.
>
> I guess the proof is in the p
Hi Robert,
I love your patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on v4.19-rc1 next-20180831]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On 31.08.2018 00:14, Pasha Tatashin wrote:
> Hi David,
>
> I am not sure this is needed, because we already have a stricter checker:
>
> check_hotplug_memory_range()
>
> You could call it from online_pages(), if you think there is a reason to
> do it, but other than that it is done from add_memo
This patch adds one new led trigger that LED device can configure
the software or hardware pattern and trigger it.
Consumers can write 'pattern' file to enable the software pattern
which alters the brightness for the specified duration with one
software timer.
Moreover consumers can write 'hw_pat
This patch implements the 'pattern_set'and 'pattern_clear'
interfaces to support SC27XX LED breathing mode.
Signed-off-by: Baolin Wang
---
Changes from v6:
- None.
Changes from v5:
- None.
Changes from v4:
- None.
Changes from v3:
- None.
Changes from v2:
- None.
Changes from v1:
- Rem
i.MX6 SoCs have MMDC driver which will access MMDC registers, and the
register access need to have MMDC IPG clocks enabled, current MMDC
driver does NOT handle the MMDC IPG clocks at all, most of the i.MX6
SoCs clock tree have MMDC0 IPG clock registered and have flag
CLK_IS_CRITICAL set, but some i
i.MX6 SoCs have MMDC ipg clock for registers access, to make
sure MMDC registers access successfully, add optional clock
enable for MMDC driver.
Signed-off-by: Anson Huang
---
arch/arm/mach-imx/mmdc.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/mach-imx/mmdc.c b/
i.MX6UL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx6ul.c | 1 +
include/dt-bindings/clock/imx6ul-clock.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk
On Fri, Aug 31, 2018 at 3:56 PM Corentin Labbe
wrote:
>
> On Fri, Aug 31, 2018 at 09:35:00AM +0200, Maxime Ripard wrote:
> > On Thu, Aug 30, 2018 at 09:01:16PM +0200, Corentin Labbe wrote:
> > > R40 have a sata controller which is the same as A20.
> > > This patch adds a DT node for it.
> > >
> >
i.MX6SX has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx6sx.c | 1 +
include/dt-bindings/clock/imx6sx-clock.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk
i.MX6SL has MMDC0 and MMDC1 ipg clock in CCM CCGR, add them into
clock tree for clock management.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx6sl.c | 2 ++
include/dt-bindings/clock/imx6sl-clock.h | 4 +++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drive
i.MX6 SoCs has MMDC clock gates in CCM CCGR, add
clock property for MMDC driver's clock operation.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx6qdl.dtsi | 1 +
arch/arm/boot/dts/imx6sl.dtsi | 1 +
arch/arm/boot/dts/imx6sll.dtsi | 1 +
arch/arm/boot/dts/imx6sx.dtsi | 1 +
arch/arm/boot/
i.MX6Q has MMDC0 ipg clock in CCM CCGR, add it into
clock tree for clock management.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx6q.c | 1 +
include/dt-bindings/clock/imx6qdl-clock.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/cl
i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx6sll.c | 1 +
include/dt-bindings/clock/imx6sll-clock.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/
On 08/31/2018 03:29 AM, Stephen Boyd wrote:
> Quoting Peng Fan (2018-08-12 18:15:41)
>> Hi Anson,
>>
> -Original Message-
> From: Anson Huang
> Sent: 2018年8月8日 12:39
> To: shawn...@kernel.org; s.ha...@pengutronix.de;
> ker...@pengutronix.de; Fabio Estevam ;
> mtur
On Thu, Aug 30, 2018 at 09:47:36PM +0200, Jann Horn wrote:
> I sloppily passed a kernel-typed pointer to __range_not_ok(), and sparse
> doesn't like that.
> Make `prologue` a __user pointer (to protect against accidental
> dereferences) and force-cast it to a kernel pointer when calling
> probe_ker
On 25/08/2018 01:24, Eduardo Valentin wrote:
> On Thu, Aug 09, 2018 at 06:02:34PM +0530, Amit Kucheria wrote:
>> c(1) + x(1) was actually meant to be c(1) * x(1).
>>
>> While we're at it, add some brackets to make it nicer to read.
>>
>> Signed-off-by: Amit Kucheria
>> ---
>> Documentation/device
Hi,
This patch series provides a way for irqchips to define some IRQs as NMIs.
For this to be possible, the irqchip must:
- be a root irqchip
- not require bus locking
- have the NMI support flag
Once these conditions are met, interrupt lines can be requested as NMIs.
These lines must not be sha
NMI handling code should be executed between calls to nmi_enter and
nmi_exit.
Add a separate domain handler to properly setup NMI context when handling
an interrupt requested as NMI.
Signed-off-by: Julien Thierry
Cc: Thomas Gleixner
Cc: Marc Zyngier
Cc: Will Deacon
Cc: Peter Zijlstra
---
in
Add support for percpu_devid interrupts treated as NMIs.
Percpu_devid NMIs need to be setup/torn down on each CPU they target.
The same restrictions as for global NMIs still apply for percpu_devid NMIs.
Signed-off-by: Julien Thierry
Cc: Thomas Gleixner
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc:
Add functionality to allocate interrupt lines that will deliver IRQs
as Non-Maskable Interrupts. These allocations are only successful if
the irqchip provides the necessary support and allows NMI delivery for the
interrupt line.
Interrupt lines allocated for NMI delivery must be enabled/disabled t
Provide flow handlers that are NMI safe for interrupts and percpu_devid
interrupts.
Signed-off-by: Julien Thierry
Cc: Thomas Gleixner
Cc: Marc Zyngier
Cc: Peter Zijlstra
---
include/linux/irq.h | 3 +++
kernel/irq/chip.c | 54 +
2 files c
On Thu, Aug 30, 2018 at 09:47:36PM +0200, Jann Horn wrote:
> I sloppily passed a kernel-typed pointer to __range_not_ok(), and sparse
> doesn't like that.
> Make `prologue` a __user pointer (to protect against accidental
> dereferences) and force-cast it to a kernel pointer when calling
> probe_ker
On Thu, Aug 30, 2018 at 04:03:58AM -0700, tip-bot for Mukesh Ojha wrote:
> Commit-ID: 935aad3015fb4afc0b7ef6e6c18175b95461de47
> Gitweb:
> https://git.kernel.org/tip/935aad3015fb4afc0b7ef6e6c18175b95461de47
> Author: Mukesh Ojha
> AuthorDate: Tue, 28 Aug 2018 12:24:54 +0530
> Committer:
Replace custom grown macro with generic INTEL_CPU_FAM6() one.
No functional change intended.
Signed-off-by: Andy Shevchenko
---
drivers/platform/x86/intel_mid_powerbtn.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/platform/x86/intel_mid_powerbtn.c
b/drive
Replace custom grown macro with generic INTEL_CPU_FAM6() one.
No functional change intended.
Signed-off-by: Andy Shevchenko
---
drivers/platform/x86/intel_pmc_core.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/platform/x86/intel_pmc_core.c
b/driver
On Tue, 28 Aug 2018, Petr Mladek wrote:
> The address of the to be patched function and new function is stored
> in struct klp_func as:
>
> void *new_func;
> unsigned long old_addr;
>
> The different naming scheme and type is derived from the way how
> the addresses are set. @old_add
On Tue, 28 Aug 2018, Petr Mladek wrote:
> We are going to simplify the API and code by removing the registration
> step. This would require calling init/free functions from enable/disable
> ones.
>
> This patch just moves the code the code to prevent more forward
> declarations.
s/the code the c
On 29 August 2018 at 19:33, Jan Kundrát wrote:
> On čtvrtek 16. srpna 2018 14:54:49 CEST, Baolin Wang wrote:
>>
>> + * @word_delay: clock cycles to inter word delay after each word size
>> + * (set by bits_per_word) transmission.
>
>
> I need a similar functionality for talking to a SPI device
On Mon, 2018-08-20 at 21:52 +, Woodhouse, David wrote:
> On Mon, 2018-08-20 at 14:48 -0700, Linus Torvalds wrote:
> >
> > Of course, after the long (and entirely unrelated) discussion about
> > the TLB flushing bug we had, I'm starting to worry about my own
> > competence, and maybe I'm missin
Sorry for the delay!! For some reason I missed this email thread totally!
On 31/08/18 02:26, Brian Norris wrote:
Seems to me that nvmem needs to be extended to allow providers to
retrieve and interpret data. Not everything is at some fixed offset and
size. Something like this is valid dts:
nvme
On Fri, Aug 31, 2018 at 11:50 AM Andy Shevchenko
wrote:
>
> Replace custom grown macro with generic INTEL_CPU_FAM6() one.
>
> No functional change intended.
Actually there is one, that's why please drop this patch.
--
With Best Regards,
Andy Shevchenko
Hi,
On 2018년 08월 30일 19:02, vincent.donnef...@arm.com wrote:
> From: Vincent Donnefort
>
> device_release() is freeing the resources before calling the device
> specific release callback which is, in the case of devfreq, stopping
> the governor.
>
> It is a problem as some governors are using t
David, what do you think?
/Jarkko
On Tue, Aug 14, 2018 at 05:57:48PM +0300, Jarkko Sakkinen wrote:
> As a TPM maintainer I have to review all these commits. This commit is
> just to make that documented.
>
> Signed-off-by: Jarkko Sakkinen
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertio
Are you planning to send v6 soon fixing the minor things in 1/2 (typo
+ change for the commit message)?
/Jarkko
On Mon, Aug 13, 2018 at 01:32:48PM -0700, Tadeusz Struk wrote:
> The TCG SAPI specification [1] defines a set of functions, which allow
> applications to use the TPM device in either bl
Just the change to the commit message. Mislooked patchwork, the typo was
in my response :-) I'll do recheck for 2/2. Check those comments before
v6 if there is anything else.
/Jarkko
On Fri, Aug 31, 2018 at 11:57:11AM +0300, Jarkko Sakkinen wrote:
> Are you planning to send v6 soon fixing the min
Some MICRON related macros in spi-nor domain were ST.
Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
Added entry of MFR Id for Micron flashes, 0x002C.
Signed-off-by: Yogesh Gaur
---
drivers/mtd/spi-nor/spi-nor.c | 9 ++---
include/linux/mtd/cfi.h | 1 +
include/
Add entry for mt35xu512aba Micron NOR flash.
This flash is having uniform sector erase size of 128KB, have
support of FSR(flag status register), flash size is 64MB and
supports 4-byte commands.
Signed-off-by: Yogesh Gaur
---
drivers/mtd/spi-nor/spi-nor.c | 3 +++
1 file changed, 3 insertions(+)
Add MFR_ID information, 0x002C, related to the Micron flash.
Currently, MFR_ID 0x0020 is being specified as Micron flash ID but
these are actually CFI ID of STMicro flashes.
Rename SNOR_MFR_MICRON to SNOR_MFR_ST and add entry for
SNOR_MFR_MICRON having CFI ID value of Micron flash.
Add entry of mt
On 29-Aug 14:28, Quentin Perret wrote:
> Hi Patrick,
>
> On Wednesday 29 Aug 2018 at 11:04:35 (+0100), Patrick Bellasi wrote:
> > In the loop above we use smp_store_release() to propagate the pointer
> > setting in a PER_CPU(em_data), which ultimate goal is to protect
> > em_register_perf_domain()
Some MICRON related macros in spi-nor domain were ST.
Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
Added entry of MFR Id for Micron flashes, 0x002C.
Signed-off-by: Yogesh Gaur
---
drivers/mtd/spi-nor/spi-nor.c | 9 ++---
include/linux/mtd/cfi.h | 1 +
include/
Add entry for mt35xu512aba Micron NOR flash.
This flash is having uniform sector erase size of 128KB, have
support of FSR(flag status register), flash size is 64MB and
supports 4-byte commands.
Signed-off-by: Yogesh Gaur
---
drivers/mtd/spi-nor/spi-nor.c | 3 +++
1 file changed, 3 insertions(+)
Add MFR_ID information, 0x002C, related to the Micron flash.
Currently, MFR_ID 0x0020 is being specified as Micron flash ID but
these are actually CFI ID of STMicro flashes.
Rename SNOR_MFR_MICRON to SNOR_MFR_ST and add entry for
SNOR_MFR_MICRON having CFI ID value of Micron flash.
Add entry of mt
Mon, Aug 13, 2018 at 01:32:58PM -0700, Tadeusz Struk wrote:
> Currently the TPM driver only supports blocking calls, which doesn't allow
> asynchronous IO operations to the TPM hardware.
> This patch changes it and adds support for nonblocking write and a new poll
> function to enable applications,
On 29/08/2018 16:31:36+0200, Nicolas Ferre wrote:
> Hi,
>
> This is an update of most of Microchip MAINTAINERS' entries. I took advantage
> of the addition of Ludovic as co-maintainer to go through some of the entries
> that were outdated.
>
> There are moves of entries in the 3 last patches of t
On Fri, Aug 31, 2018 at 11:11 AM Nestor Lopez Casado
wrote:
>
>
>
> On Thu, Aug 30, 2018 at 10:38 PM Harry Cutts wrote:
>>
>> Hi Benjamin,
>>
>> On Thu, 30 Aug 2018 at 00:18, Benjamin Tissoires
>> wrote:
>> >> On Thu, Aug 30, 2018 at 1:06 AM Harry Cutts wrote:
>> > > > The conversion input_repo
On Thu, Aug 30, 2018 at 05:31:32PM -0400, Alan Stern wrote:
> On Thu, 30 Aug 2018, Andrea Parri wrote:
>
> > > All the architectures supported by the Linux kernel (including RISC-V)
> > > do provide this ordering for locks, albeit for varying reasons.
> > > Therefore this patch changes the model i
On Thu, Aug 30, 2018 at 10:41:56AM -0400, jgli...@redhat.com wrote:
> From: Ralph Campbell
>
> Private ZONE_DEVICE pages use a special pte entry and thus are not
> present. Properly handle this case in map_pte(), it is already handled
> in check_pte(), the map_pte() part was lost in some rebase m
On Thu, Aug 30, 2018 at 6:49 PM Andy Shevchenko
wrote:
> There are few Intel PMIC GPIO device drivers which I would like
> to review.
>
> Note, Intel MSIC is old system controller that based mostly on PMIC
> integrated in it. Thus, I included it as well.
>
> Signed-off-by: Andy Shevchenko
Patch
On Thu, Aug 30, 2018 at 09:42:10PM +0300, Dmitry Osipenko wrote:
> Currently all PLL's on Tegra20 use a hardcoded delay despite of having
> a lock-status bit. The lock-status polling was disabled ~7 years ago
> because PLLE was failing to lock and was a suspicion that other PLLs
> might be faulty t
On Fri, Aug 31, 2018 at 12:35 AM Igor Stoppa wrote:
> WARN_ON() already contains an unlikely(), so it's not necessary to
> wrap it into another.
>
> Signed-off-by: Igor Stoppa
> Cc: Andrew Jeffery
> Cc: Linus Walleij
Patch applied as obviously correct.
Yours,
Linus Walleij
On Thu, Aug 30, 2018 at 10:28:28AM +0300, Tero Kristo wrote:
> On 29/08/18 10:50, Johan Hovold wrote:
> > On Tue, Aug 28, 2018 at 03:32:03PM -0700, Stephen Boyd wrote:
> >> Quoting Johan Hovold (2018-08-22 02:03:19)
> >>> Fix child-node lookup which by using the wrong OF helper was searching
> >>>
This partially reverts commit f07b3c1da92db108662f99417a212fc1eddc44d1.
It looks like some mice are not correctly treated by
HID_QUIRK_INPUT_PER_APP. Those mice have the following
report descriptor:
0x05, 0x01,// Usage Page (Generic Desktop)0
0x09, 0x02,
Meelis Roos reported a {menu,n}config regression:
"I have libncurses devel package installed in the default system
location (as do 99%+ on actual developers probably) and in this
case, pkg-config is useless. pkg-config is needed only when
libraries and headers are installed in non-default
Hi.
2018-08-20 0:37 GMT+09:00 Randy Dunlap :
> On 08/19/2018 04:15 AM, Meelis Roos wrote:
>> Just tried to run 'make menuconfig' on v4.18-10568-g08b5fa819970 and
>> found a bad surprise:
>>
>> 'make *config' requires 'pkg-config'. Please install it.
>> make[1]: *** [scripts/kconfig/Makefile:219: s
> > > + b. The "unless" RMW operations are not currently modeled:
> > > + atomic_long_add_unless(), atomic_add_unless(),
> > > + atomic_inc_unless_negative(), and
> > > + atomic_dec_unless_positive(). These can be emulated
> > > + in litmus tests, for example,
On Thu, Aug 30, 2018 at 08:10:53PM -0700, Bjorn Andersson wrote:
> On Wed 29 Aug 02:25 PDT 2018, Niklas Cassel wrote:
>
> > On Mon, Aug 27, 2018 at 10:12:03PM -0700, Bjorn Andersson wrote:
> > > The Hexagon v5 ADSP driver is used for more than only the ADSP and
> > > there's an upcoming non-PAS AD
On 8/31/18 12:29 PM, Peter De Schrijver wrote:
> On Thu, Aug 30, 2018 at 09:42:10PM +0300, Dmitry Osipenko wrote:
>> Currently all PLL's on Tegra20 use a hardcoded delay despite of having
>> a lock-status bit. The lock-status polling was disabled ~7 years ago
>> because PLLE was failing to lock and
Hi Robert
On Thu, 2018-08-30 at 21:59 +0200, Robert Jarzmik wrote:
> Add device-tree description of the Mitac MIO A701 board.
> This is aimed at replacing mioa701.c board file, and once stabilized,
> the leftover, such as the suspend resume mechanics will rely on a new
> IPL, and not the legacy Wi
On Fri, 2018-08-31 at 15:45 +0800, kbuild test robot wrote:
> Hi Robert,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on robh/for-next]
> [also build test ERROR on v4.19-rc1 next-20180831]
> [if your patch is applied to the wrong git tree, pl
On Thu, Aug 30, 2018 at 06:04:12PM -0700, Linus Torvalds wrote:
> On Thu, Aug 30, 2018 at 6:01 PM Nicholas Piggin wrote:
> >
> > Well it would help if powerpc say wanted to start using them without a
> > merge cycle lag. Not a huge issue because powerpc already does
> > reasonably well here and th
> The problem is, my driver is forcibly setting
> STOP condition unless the next message is read.
This likely is a problem.
In Linux I2C terminology, a transfer is everything between a START and a
STOP. A transfer may consist of multiple messages, connected with
REP_START [1].
So, a STOP should
The spec states that the HID devices should allow
the host to query the HID descriptor at any time.
Some devices require the HID descriptor to be set
on resume, or they will fail.
Instead of having a growing list of blacklisted devices
make the call part of the general resume process
so we can re
Hi,
On 31-08-18 11:54, Benjamin Tissoires wrote:
The spec states that the HID devices should allow
the host to query the HID descriptor at any time.
Some devices require the HID descriptor to be set
on resume, or they will fail.
Instead of having a growing list of blacklisted devices
make the
On 2018/8/31 0:50, John Garry wrote:
> On 30/08/2018 17:34, James Morse wrote:
>
> Hi James,
>
> Zhengqiang no longer works on this topic, so I have cc'ed some more guys who
> should be able to help.
>
> John
>
>> Hi Zhengqiang,
>>
>> On 29/08/18 19:33, Fan Wu wrote:
>>> The current ghes_ed
Hi,
On 31-08-18 06:45, Dong Aisheng wrote:
Switching to use clk_bulk API to simplify clock operations.
Cc: Hans de Goede
Cc: Bartlomiej Zolnierkiewicz
Cc: linux-fb...@vger.kernel.org
Cc: Masahiro Yamada
Cc: Stephen Boyd
Tested-by: Thor Thayer
Signed-off-by: Dong Aisheng
---
v5->v6:
* ad
On Fri, Aug 31, 2018 at 10:54:18AM +0100, Will Deacon wrote:
> Proposal below (omitted Linus because that seems to be the pattern elsewhere
> in the file and he's not going to shout at himself when things break :)
> Anybody I've missed?
>
> Will
>
> --->8
>
> diff --git a/MAINTAINERS b/MAINTAIN
- Add a driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI ac
Add flags for Octal I/O data transfer
Required for the SPI controller which can do data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Gaur
---
include/linux/spi/spi.h | 2 ++
1 file cha
On Fri, 31 Aug 2018 12:10:14 +0200
Peter Zijlstra wrote:
> On Fri, Aug 31, 2018 at 10:54:18AM +0100, Will Deacon wrote:
>
> > Proposal below (omitted Linus because that seems to be the pattern elsewhere
> > in the file and he's not going to shout at himself when things break :)
> > Anybody I've
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9d5eeff..2696898 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10228,6 +10228,12 @@ L: linux-...@lists.01.org (mode
- Add a driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data
transfer (1/2/4/8 bidirectional data lines)
i.e.
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
arch/arm64/boot/dts/f
Add 'size' data variable in spi_device struct.
This is to save the size of the connected slave device.
After slave device scan, spi_nor_scan, size being assigned to this
from MTD layer.
SFDP read is being requested before completion of spi_nor_scan()
routine, thus populate device size before maki
Add binding file for NXP FlexSPI driver.
Signed-off-by: Yogesh Gaur
---
.../devicetree/bindings/spi/spi-nxp-fspi.txt | 42 ++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-nxp-fspi.txt
diff --git a/Documentation/devicetr
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 3cfa8ca..75ceddf 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch
On Tue, 28 Aug 2018, Petr Mladek wrote:
> The code for freeing livepatch structures is a bit scattered and tricky:
>
> + direct calls to klp_free_*_limited() and kobject_put() are
> used to release partially initialized objects
>
> + klp_free_patch() removes the patch from the public lis
On Fri, Aug 31, 2018 at 08:32:34PM +1000, Nicholas Piggin wrote:
> Oh gee, I suppose. powerpc hash is kind of interesting because it's
> crazy, Aneesh knows that code a lot better than I do. radix modulo
> some minor details of exact instructions is fairly like x86
The whole TLB broadcast vs expl
On Tue, Aug 28, 2018 at 09:53:11AM -0700, Dave Hansen wrote:
> >>> extern bool sgx_enabled;
> >>> extern bool sgx_lc_enabled;
> >>> +extern struct sgx_epc_bank sgx_epc_banks[SGX_MAX_EPC_BANKS];
> >>> +
> >>> +/*
> >>> + * enum sgx_epc_page_desc - defines bits and masks for an EPC page's desc
> >>
On Fri, Aug 31, 2018 at 12:49:45PM +0200, Peter Zijlstra wrote:
> On Fri, Aug 31, 2018 at 08:32:34PM +1000, Nicholas Piggin wrote:
> > Oh gee, I suppose. powerpc hash is kind of interesting because it's
> > crazy, Aneesh knows that code a lot better than I do. radix modulo
> > some minor details of
On Tue, Aug 28, 2018 at 02:34:32PM -0700, Sean Christopherson wrote:
> On Tue, Aug 28, 2018 at 09:53:11AM -0700, Dave Hansen wrote:
> > >>> + sgx_nr_epc_banks++;
> > >>> + }
> > >>> +
> > >>> + if (!sgx_nr_epc_banks) {
> > >>> + pr_err("There are zero EPC ban
On 2018/08/31 15:51, Jiri Slaby wrote:
> On 08/29/2018, 05:19 PM, Tetsuo Handa wrote:
>> On 2018/08/29 11:23, Dmitry Safonov wrote:
>>> tty_ldisc_reinit() doesn't race with neither tty_ldisc_hangup()
>>> nor set_ldisc() nor tty_ldisc_release() as they use tty lock.
>>> But it races with anyone who
Hi!
> - gnss, finally an in-kernel GPS subsystem to try to tame all of
> the crazy out-of-tree drivers that have been floating around
> for years, combined with some really hacky userspace
> implementations. This is only for GNSS receivers, but you
> have to
On Fri, Aug 31, 2018 at 12:12:48PM +0100, Will Deacon wrote:
> On Fri, Aug 31, 2018 at 12:49:45PM +0200, Peter Zijlstra wrote:
> > On Fri, Aug 31, 2018 at 08:32:34PM +1000, Nicholas Piggin wrote:
> > > Oh gee, I suppose. powerpc hash is kind of interesting because it's
> > > crazy, Aneesh knows tha
On 08/31/2018, 01:17 PM, Tetsuo Handa wrote:
> Also, noisy messages like
>
> pts pts4033: tty_release: tty->count(10529) != (#fd's(7) + #kopen's(0))
>
> are gone.
fwiw, thanks to 1/4…
Dmitry, could you note the message above to the commit log of 1/4, so
that we know the patch fixed that and d
On Tue, Aug 28, 2018 at 02:22:44PM -0700, Sean Christopherson wrote:
> On Tue, Aug 28, 2018 at 07:07:33AM -0700, Dave Hansen wrote:
> > On 08/28/2018 01:35 AM, Jarkko Sakkinen wrote:
> > > On Mon, Aug 27, 2018 at 02:15:34PM -0700, Dave Hansen wrote:
> > >> On 08/27/2018 11:53 AM, Jarkko Sakkinen wr
On Fri, 31 Aug 2018, Feng Tang wrote:
> On Thu, Aug 30, 2018 at 03:25:42PM +0200, Thomas Gleixner wrote:
> This panic happens as the earlycon's fixmap address has no
> pmd/pte ready, and __set_fixmap will try to allocate memory to
> setup the page table, and trigger panic due to no memory.
>
> x86
Hi Yogesh,
Thanks for your patch!
On Fri, Aug 31, 2018 at 12:33 PM Yogesh Gaur wrote:
> Add 'size' data variable in spi_device struct.
> This is to save the size of the connected slave device.
What is the "size" of an SPI slave device?
> After slave device scan, spi_nor_scan, size being assign
Define a mask for the IF_SI_OWNER field.
Signed-off-by: Alexandre Belloni
---
drivers/spi/spi-dw-mmio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 351f49976161..a768461614a0 100644
--- a/drivers/spi/spi-dw-mmi
On Fri, 31 Aug 2018 12:49:45 +0200
Peter Zijlstra wrote:
> On Fri, Aug 31, 2018 at 08:32:34PM +1000, Nicholas Piggin wrote:
> > Oh gee, I suppose. powerpc hash is kind of interesting because it's
> > crazy, Aneesh knows that code a lot better than I do. radix modulo
> > some minor details of exac
On Fri, Aug 31, 2018 at 01:40:46PM +0200, Alexandre Belloni wrote:
> Define a mask for the IF_SI_OWNER field.
>
Thanks!
Acked-by: Andy Shevchenko
> Signed-off-by: Alexandre Belloni
> ---
> drivers/spi/spi-dw-mmio.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/d
On Fri, 2018-08-31 at 08:47 +0200, Jiri Slaby wrote:
> On 08/29/2018, 06:13 PM, Dmitry Safonov wrote:
> > > I would just do:
> > > if (!retval)
> > > tty->count++;
> > > here. Nobody from ldiscs should rely on tty->count.
> >
> > I thought about that and probably should have described in com
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