On 6/19/2019 2:23 PM, Xiaoyao Li wrote:
On 6/19/2019 2:09 PM, Tao Xu wrote:
UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.
This patch adds support for user wait instructions in KVM. Availability
of the user wait instructions is indicated by the presence of the CPUID
feature f
On Mon, 17 Jun 2019 12:29:48 PDT (-0700), lolliv...@baylibre.com wrote:
Create a config option for building SiFive SoC specific resources
e.g. SiFive device tree, platform drivers...
Signed-off-by: Loys Ollivier
Cc: Paul Walmsley
Cc: Palmer Dabbelt
---
arch/riscv/Kconfig | 2
On Mon, 17 Jun 2019 12:29:50 PDT (-0700), lolliv...@baylibre.com wrote:
Enable SOC_SIFIVE so the default upstream config is bootable on the SiFive
Unleashed Board.
And have basic support for future boards based on the same SoC.
Signed-off-by: Loys Ollivier
---
arch/riscv/configs/defconfig | 6
On Mon, 17 Jun 2019 12:29:49 PDT (-0700), lolliv...@baylibre.com wrote:
On selection of SOC_SIFIVE select the corresponding platform drivers.
Signed-off-by: Loys Ollivier
---
arch/riscv/Kconfig.socs | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/K
From: Anson Huang
Some of i.MX SoCs' clock driver use platform driver model,
and they need to call imx_register_uart_clocks() API, so
imx_register_uart_clocks() API should NOT be in .init section.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk.c | 6 +++---
1 file changed, 3 insertions(+),
From: Anson Huang
Call imx_register_uart_clocks() API to keep uart clocks enabled
when earlyprintk or earlycon is active.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx8mq.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/c
Hello,
syzbot has tested the proposed patch and the reproducer did not trigger
crash:
Reported-and-tested-by:
syzbot+c277e8e2f46414645...@syzkaller.appspotmail.com
Tested on:
commit: a6a3fd5c fanotify: update connector fsid cache on add mark
git tree: https://github.com/ami
Michael Ellerman's on June 19, 2019 3:14 pm:
> Hi Naveen,
>
> Sorry I meant to reply to this earlier .. :/
>
> "Naveen N. Rao" writes:
>> With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
>> enable function tracing and profiling. So far, with dynamic ftrace, we
>> used to o
On 6/19/2019 3:01 PM, Tao Xu wrote:
On 6/19/2019 2:23 PM, Xiaoyao Li wrote:
On 6/19/2019 2:09 PM, Tao Xu wrote:
UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.
This patch adds support for user wait instructions in KVM. Availability
of the user wait instructions is indicated b
Hi Karthikeyan,
> -Original Message-
> From: Karthikeyan Mitran [mailto:m.karthike...@mobiveil.co.in]
> Sent: 2019年6月19日 13:29
> To: Lorenzo Pieralisi
> Cc: Z.q. Hou ; linux-...@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org;
> linux-kernel@vger.kernel
From: Eugen Hristev
ld: drivers/media/platform/atmel/atmel-isc-base.o:(.bss+0x0): multiple
definition of `debug'; arch/x86/entry/entry_32.o:(.entry.text+0x21ac): first
defined here
Changed module parameters to static.
Reported-by: kbuild test robot
Signed-off-by: Eugen Hristev
---
Hello Ha
On Wed, Jun 19, 2019 at 10:34:54AM +1000, Alexey Kardashevskiy wrote:
>
>
> On 23/05/2019 17:49, Christoph Hellwig wrote:
> > None of these routines were ever used since they were added to the
> > kernel.
>
>
> It is still being used exactly in the way as it was explained before in
> previous r
Commit-ID: 5423f5ce5ca410b3646f355279e4e937d452e622
Gitweb: https://git.kernel.org/tip/5423f5ce5ca410b3646f355279e4e937d452e622
Author: Thomas Gleixner
AuthorDate: Tue, 18 Jun 2019 22:31:40 +0200
Committer: Borislav Petkov
CommitDate: Wed, 19 Jun 2019 09:16:35 +0200
x86/microcode: Fix
Hi, Jason Baron
Could you help to check if we can support Intel Corporation 3rd Gen Core
processor in driver ie31200?
It is tested by our customer. Test result is accepted by the customer.
Summary: EDAC, ie31200: Add Intel Corporation 3rd Gen Core processor
commit 9a5001c8840928c3b51bc330a0
3rd Gen Core seems to work just like Skylake.
Signed-off-by: Jiping Ma
---
drivers/edac/ie31200_edac.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
index aac9b9b..1445336 100644
--- a/drivers/edac/ie31200_edac.c
+++ b/drivers/
On Fri, Jun 07, 2019 at 03:22:22PM -0700, Palmer Dabbelt wrote:
> The comment describes why in detail. This was found because QEMU never
> gives up load reservations, the issue is unlikely to manifest on real
> hardware.
>
> Thanks to Carlos Eduardo for finding the bug!
> @@ -330,6 +330,17 @@ EN
Hi Marek,
> Subject
>
> Re: [PATCH v13 3/3] dt-bindings: mfd: Document Renesas R-Car Gen3 RPC-IF
> controller bindings
>
> On 6/6/19 9:40 AM, masonccy...@mxic.com.tw wrote:
> [...]
>
> > RPC-IF works either in SPI or HyperFlash is decided by external
hardware
> > pins
> > configuration
From: Oliver Graute
added header defines for imx8qm clock
Signed-off-by: Oliver Graute
---
include/dt-bindings/clock/imx8qm-clock.h | 851 +++
1 file changed, 851 insertions(+)
create mode 100644 include/dt-bindings/clock/imx8qm-clock.h
diff --git a/include/dt-bindings/cl
From: Oliver Graute
added header defines for imx8qm clock
Signed-off-by: Oliver Graute
---
include/dt-bindings/clock/imx8qm-clock.h | 851 +++
1 file changed, 851 insertions(+)
create mode 100644 include/dt-bindings/clock/imx8qm-clock.h
diff --git a/include/dt-bindings/cl
On 6/18/19 7:02 PM, Michael Neuling wrote:
> On Tue, 2019-06-18 at 09:57 +0530, Ravi Bangoria wrote:
>> Watchpoint match range is always doubleword(8 bytes) aligned on
>> powerpc. If the given range is crossing doubleword boundary, we
>> need to increase the length such that next doubleword also
On 6/18/19 11:47 AM, Michael Neuling wrote:
> On Tue, 2019-06-18 at 08:01 +0200, Christophe Leroy wrote:
>>
>> Le 18/06/2019 à 06:27, Ravi Bangoria a écrit :
>>> patch 1-3: Code refactor
>>> patch 4: Speedup disabling breakpoint
>>> patch 5: Fix length calculation for unaligned targets
>>
>> Whi
From: Guo Ren
The asid code is from arm64 and here is the ref link:
https://lore.kernel.org/linux-arm-kernel/20190321163623.20219-12-julien.gr...@arm.com/
Seems it's good for other arch to implement asid.
Signed-off-by: Guo Ren
---
arch/csky/include/asm/asid.h | 77 ++
arch/c
From: Guo Ren
Julien Grall plan to seperate asid allocator into generic and vmid and
other architectures could use it.
ref:
https://lore.kernel.org/linux-arm-kernel/20190321163623.20219-1-julien.gr...@arm.com/
For C-SKY the first implementation is from mips and it's not implemented
well for SMP
From: Guo Ren
Current C-SKY ASID mechanism is from mips and it doesn't work well
in a multi-core case. ASID per core mechanism is not suitable for
C-SKY SMP tlb maintain operations, eg: tlbi.vas need share the same
asid in all processors and it'll invalid the tlb entry in all cores
with the same
From: Guo Ren
Use linux generic asid/vmid algorithm to implement csky
switch_mm function. The algorithm is from arm and it could
work with SMP system. It'll help reduce tlb flush for
switch_mm in task/vm switch.
Signed-off-by: Guo Ren
Cc: Julien Grall
Cc: Arnd Bergmann
---
arch/csky/abiv1/in
From: Guo Ren
There are two generations of tlb operation instruction for C-SKY.
First generation is use mcr register and it need software do more
things, second generation is use specific instructions, eg:
tlbi.va, tlbi.vas, tlbi.alls
We implemented the following functions:
- flush_tlb_range
The 'affinity_hint_set' is not used any longer since
commit 0d9f0a52c8b9 ("virtio_scsi: use virtio IRQ affinity").
Signed-off-by: Dongli Zhang
---
drivers/scsi/virtio_scsi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/scsi/virtio_scsi.c b/drivers/scsi/virtio_scsi.c
index 13f1b3
On Tue, 18 Jun 2019 13:51:31 +0200
Greg KH wrote:
> On Tue, Jun 18, 2019 at 07:36:18AM +1000, Stephen Rothwell wrote:
> > Hi all,
> >
> > In commit
> >
> > 0c75376fa395 ("counter/ftm-quaddec: Add missing dependencies in Kconfig")
> >
> > Fixes tag
> >
> > Fixes: a3b9a99 ("counter: add Fle
Steven Rostedt wrote:
On Tue, 18 Jun 2019 23:53:11 +0530
"Naveen N. Rao" wrote:
Naveen N. Rao wrote:
> Steven Rostedt wrote:
>> On Tue, 18 Jun 2019 20:17:04 +0530
>> "Naveen N. Rao" wrote:
>>
>>> @@ -1551,7 +1551,7 @@ unsigned long ftrace_location_range(unsigned long start, unsigned lon
On Thu, 10 Jan 2019 at 09:16, Thierry Reding wrote:
>
> On Tue, Jan 08, 2019 at 03:37:13PM +0100, Anders Roxell wrote:
> > Without CONFIG_PM_SLEEP, we get annoying warnings about unused
> > functions:
> >
> > drivers/mailbox/tegra-hsp.c:782:12: warning: ‘tegra_hsp_resume’ defined but
> > not used
On Tue, Jun 18, 2019 at 05:06:39PM +0200, Arnd Bergmann wrote:
> On Tue, Jun 18, 2019 at 3:59 PM Peter Zijlstra wrote:
> > On Tue, Jun 18, 2019 at 04:27:45PM +0300, Andrey Ryabinin wrote:
> > > On 6/18/19 3:56 PM, Arnd Bergmann wrote:
> > > > On Mon, Jun 17, 2019 at 4:02 PM Peter Zijlstra
> > >
On Wed, 19 Jun 2019 at 09:56, Anders Roxell wrote:
>
> On Thu, 10 Jan 2019 at 09:16, Thierry Reding wrote:
> >
> > On Tue, Jan 08, 2019 at 03:37:13PM +0100, Anders Roxell wrote:
> > > Without CONFIG_PM_SLEEP, we get annoying warnings about unused
> > > functions:
> > >
> > > drivers/mailbox/tegra
Hi Eugen,
On Wed, Jun 19, 2019 at 07:24:41AM +, eugen.hris...@microchip.com wrote:
> From: Eugen Hristev
>
> ld: drivers/media/platform/atmel/atmel-isc-base.o:(.bss+0x0): multiple
> definition of `debug'; arch/x86/entry/entry_32.o:(.entry.text+0x21ac): first
> defined here
>
> Changed mod
On Thu, Jun 13, 2019 at 03:14:56PM -0700, David Miller wrote:
> > On 13/06/2019, David Miller wrote:
> >> From: Thomas Huth
> >> Date: Mon, 27 May 2019 18:32:53 +0200
> >>
> >>> We already provide the LGPL-2.0 text in LICENSES/preferred/LGPL-2.0,
> >>> so there is no need for this additional copy
Hi Boris,
>
> Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller
>
> On Tue, 18 Jun 2019 08:14:36 +0200
> Boris Brezillon wrote:
>
> > > > > > >
> > > > > > > How to make all #CS keep high for NAND to enter
> > > > > > > low-power standby mode if driver don't use
"legac
When file refaults are detected and there are many inactive file pages,
the system never reclaim anonymous pages, the file pages are dropped
aggressively when there are still a lot of cold anonymous pages and
system thrashes. This issue impacts the performance of applications with
large executable,
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/ipi
head: 0663387727c00bb25ce1e76f30deb6b193f591f8
commit: 8adde844ea4f8d0d147e0ad6c675970a58550bae [3/11] x86/hotplug: Silence
APIC and NMI when CPU is dead
config: i386-tinyconfig (attached as .config)
compiler: gcc-7
Hi Mason,
masonccy...@mxic.com.tw wrote on Wed, 19 Jun 2019 16:04:43 +0800:
> Hi Boris,
>
> >
> > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller
> >
> > On Tue, 18 Jun 2019 08:14:36 +0200
> > Boris Brezillon wrote:
> >
> > > > > > > >
> > > > > > > > How to make all
On 5/30/19 1:28 PM, Paolo Bonzini wrote:
> This allows a list of requests to be issued, with the LLD only writing
> the hardware doorbell when necessary, after the last request was prepared.
> This is more efficient if we have lists of requests to issue, particularly
> on virtualized hardware, wher
On Tue, Jun 18, 2019 at 04:16:20PM +, Vineet Gupta wrote:
> > +/*
> > + * To make atomic update of patched instruction available we need to
> > guarantee
> > + * that this instruction doesn't cross L1 cache line boundary.
> > + *
Oh urgh. Is that the only way ARC can do text patching? We've
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/ipi
head: 0663387727c00bb25ce1e76f30deb6b193f591f8
commit: b3b483a0796da8f2c0d91b8594ef0ae593ec29fb [8/11] x86/apic: Add static
key to Control IPI shorthands
config: x86_64-randconfig-x015-201924 (attached as .config)
co
On Wed, 19 Jun 2019 16:04:43 +0800
masonccy...@mxic.com.tw wrote:
> Hi Boris,
>
> >
> > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND controller
> >
> > On Tue, 18 Jun 2019 08:14:36 +0200
> > Boris Brezillon wrote:
> >
> > > > > > > >
> > > > > > > > How to make all #CS keep h
On Tue, Jun 18, 2019 at 10:58:40AM -0700, Sowjanya Komatineni wrote:
>
> On 6/18/19 5:16 AM, Thierry Reding wrote:
> > On Tue, Jun 18, 2019 at 12:46:25AM -0700, Sowjanya Komatineni wrote:
> > > This patch adds system suspend and resume support for Tegra210
> > > clocks.
> > >
> > > All the CAR co
On Fri, 2019-06-14 at 11:41 +0200, Jacopo Mondi wrote:
> Hi Lubomir,
>
> On Sun, May 05, 2019 at 04:00:23PM +0200, Lubomir Rintel wrote:
> > The commit d790b7eda953 ("[media] vb2-dma-sg: move dma_(un)map_sg here")
> > left dma_desc_nent unset. It previously contained the number of DMA
> > descript
On Tue, Jun 18, 2019 at 11:30:34AM -0400, Alan Stern wrote:
> On Tue, 18 Jun 2019, Suwan Kim wrote:
>
> > vhci doesn’t do dma for remote device. Actually, the real dma
> > operation is done by network card driver. So, vhci doesn’t use and
> > need dma address of transfer buffer of urb.
> >
> > Bu
On 6/18/19 7:06 PM, Yang Shi wrote:
> The BUG_ON was removed by commit
> d44d363f65780f2ac2ec672164555af54896d40d ("mm: don't assume anonymous
> pages have SwapBacked flag") since 4.12.
Perhaps that commit should be sent to stable@ ? Although with
VM_BUG_ON() this is less critical than plain BUG
On Tue, Jun 18, 2019 at 05:03:52PM +0300, Dmitry Osipenko wrote:
> It was left unnoticed by accident, which means that the code could be
> cleaned up a tad more.
>
> Acked-by: Jon Hunter
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/clocksource/timer-tegra.c | 42 ++--
On Tue, Jun 18, 2019 at 05:03:51PM +0300, Dmitry Osipenko wrote:
> The clocksource rate is initialized only for the first per-CPU clocksource
> and then that rate shall be replicated for the rest of clocksource's
> because they are initialized manually in the code.
>
> Fixes: 3be2a85a0b61 ("clocks
On Tue, Jun 18, 2019 at 05:03:54PM +0300, Dmitry Osipenko wrote:
> There is no need to cast void because kernel allows to do that without
> a warning message from a compiler.
>
> Acked-by: Jon Hunter
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/clocksource/timer-tegra.c | 2 +-
> 1 file cha
On Tue, Jun 18, 2019 at 05:03:55PM +0300, Dmitry Osipenko wrote:
> Convert all 1MHz literals to a verbose constant for better readability.
>
> Suggested-by: Daniel Lezcano
> Acked-by: Jon Hunter
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/clocksource/timer-tegra.c | 12 +++-
> 1 f
ВНИМАНИЕ;
В вашем почтовом ящике превышен лимит хранилища, который составляет 5 ГБ, как
определено администратором, который в настоящее время работает на 10,9 ГБ.
Возможно, вы не сможете отправлять или получать новую почту, пока вы не
подтвердите свою почту. Чтобы подтвердить свой почтовый ящик
On Tue, Jun 18, 2019 at 05:03:53PM +0300, Dmitry Osipenko wrote:
> The of_clk structure has a period field that is set up initially by
> timer_of_clk_init(), that period value need to be adjusted for a case of
> TIMER1-9 that are running at a fixed rate that doesn't match the clock's
> rate. Note t
On Tue, Jun 18, 2019 at 05:03:57PM +0300, Dmitry Osipenko wrote:
> Tegra's timer uses n+1 scheme for the counter, i.e. timer will fire after
> one tick if 0 is loaded. The minimum and maximum numbers of oneshot ticks
> are defined by clockevents_config_and_register(min, max) invocation and
> the mi
On Tue, Jun 18, 2019 at 05:03:56PM +0300, Dmitry Osipenko wrote:
> We're adjusting the timer's base for each per-CPU timer to point to the
> actual start of the timer since device-tree defines a compound registers
> range that includes all of the timers. In this case the original base
> need to be
On Tue, Jun 18, 2019 at 05:03:58PM +0300, Dmitry Osipenko wrote:
> Tegra's timer has 29 bits for the counter and for the "load" register
> which sets counter to a load-value. The counter's value is lower than
> the actual value by 1 because it starts to decrement after one tick,
> hence the maximum
On Thu 13-06-19 09:02:24, Dave Chinner wrote:
> On Wed, Jun 12, 2019 at 12:21:44PM -0400, Kent Overstreet wrote:
> > This would simplify things a lot and eliminate a really nasty corner case -
> > page
> > faults trigger readahead. Even if the buffer and the direct IO don't
> > overlap,
> > reada
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/ipi
head: 0663387727c00bb25ce1e76f30deb6b193f591f8
commit: 8adde844ea4f8d0d147e0ad6c675970a58550bae [3/11] x86/hotplug: Silence
APIC and NMI when CPU is dead
config: i386-randconfig-x009-201924 (attached as .config)
comp
On 6/19/19 7:21 AM, Michal Hocko wrote:
> On Tue 18-06-19 14:13:16, Yang Shi wrote:
> [...]
>>
>> I used to have !__PageMovable(page), but it was removed since the
>> aforementioned reason. I could add it back.
>>
>> For the temporary off LRU page, I did a quick search, it looks the most
>> paths h
>
> When calling debugfs functions, there is no need to ever check the return
> value. The function can work or not, but the code logic should never do
> something different based on this.
Maybe need to mention that API has changed in patch '
ff9fb72bc07705c00795ca48631f7fffe24d2c6b' in 5.0
an
Yes, then I think we have solved the behavioural problem of Linux, and it seems
to come down to the GNU idol, that seems based on Morphine Psychosis. And such
the worst Stallman fans, have irate behaviour.
And much have pointed to that already, and much criticism done, and indeed the
GNU idol s
Refer to the Intel SDM Vol.4, the package C-state residency counters
of modern IA micro-architecture are all ticking in TSC frequency,
hence we can apply simple math to transform the ticks into microseconds.
i.e.,
residency (ms) = count / tsc_khz
residency (us) = count / tsc_khz * 1000
This also a
Hi Andrew,
Sure, I will Cc Russel King in next version of patch series.
Regards,
Parshuram Thombare
>-Original Message-
>From: Andrew Lunn
>Sent: Wednesday, June 19, 2019 3:03 AM
>To: Parshuram Raju Thombare
>Cc: nicolas.fe...@microchip.com; da...@davemloft.net;
>f.faine...@gmail.com;
On Wed, Jun 19, 2019 at 2:19 AM Dmitry Torokhov
wrote:
>
> Hi Rafael,
>
> On Tue, Jun 18, 2019 at 10:18:28AM +0200, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki
> >
> > The name of pm_suspend_via_s2idle() is confusing, as it doesn't
> > reflect the purpose of the function precisely enough
On Tue, Jun 18, 2019 at 11:00:05PM +0300, Dmitry Osipenko wrote:
> 18.06.2019 20:34, Sowjanya Komatineni пишет:
> >
> > On 6/18/19 9:50 AM, Sowjanya Komatineni wrote:
> >>
> >> On 6/18/19 8:41 AM, Stephen Warren wrote:
> >>> On 6/18/19 3:30 AM, Dmitry Osipenko wrote:
> 18.06.2019 12:22, Dmitr
On Tue, Jun 18, 2019 at 09:41:03AM -0600, Stephen Warren wrote:
> On 6/18/19 3:30 AM, Dmitry Osipenko wrote:
> > 18.06.2019 12:22, Dmitry Osipenko пишет:
> > > 18.06.2019 10:46, Sowjanya Komatineni пишет:
> > > > This patch adds suspend and resume support for Tegra pinctrl driver
> > > > and regist
On Tue, 18 Jun 2019 08:58:22 -0700
Ranjani Sridharan wrote:
> On Tue, 2019-06-18 at 13:00 +0200, Amadeusz Sławiński wrote:
> > On Mon, 17 Jun 2019 13:51:42 -0700
> > Ranjani Sridharan wrote:
> >
> > > On Mon, 2019-06-17 at 13:36 +0200, Amadeusz Sławiński wrote:
> > > > When we unload Skylak
On Thursday 30 May 2019 at 10:20:35 (+0100), Quentin Perret wrote:
> Quentin Perret (3):
> arm64: defconfig: Enable CONFIG_ENERGY_MODEL
> thermal: cpu_cooling: Make the power-related code depend on IPA
> thermal: cpu_cooling: Migrate to using the EM framework
>
> arch/arm64/configs/defconfi
On Wed, Jun 19, 2019 at 1:52 AM Joel Fernandes wrote:
>
> On Tue, Jun 18, 2019 at 7:15 PM Tri Vo wrote:
> [snip]
> > > > > >
> > > > > > Android userspace reading wakeup_sources is not ideal because:
> > > > > > - Debugfs API is not stable, i.e. Android tools built on top of it
> > > > > > are
>
Hello !,
This is second version of patch set containing following patches
for Cadence ethernet controller driver.
1. 0001-net-macb-add-phylink-support.patch
Replace phylib API's with phylink API's.
2. 0002-net-macb-add-support-for-sgmii-MAC-PHY-interface.patch
This patch add support for SGM
This patch add support for SGMII interface) and
2.5Gbps MAC in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 76 ++--
drivers/net/ethernet/cadence/macb_main.c | 151 ---
2 files changed, 200 inser
This patch modify MDIO read/write functions to support
communication with C45 PHY.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 15 --
drivers/net/ethernet/cadence/macb_main.c | 61 +++-
2 files changed, 61 insertions(+), 15 deletions(-
This patch replace phylib API's by phylink API's.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/Kconfig | 2 +-
drivers/net/ethernet/cadence/macb.h | 3 +
drivers/net/ethernet/cadence/macb_main.c | 312 +--
3 files changed, 182 insertions(+),
Hi Uffe,
> -Original Message-
> From: Ulf Hansson
> Sent: Monday, June 17, 2019 5:51 PM
[...]
>
> The "const struct zynqmp_eemi_ops *eemi_ops; should then be moved into
> a clock provider specific struct, which is assigned when calling
> sdhci_arasan_register_sdclk. I understand that al
19.06.2019 11:31, Thierry Reding пишет:
> On Tue, Jun 18, 2019 at 11:00:05PM +0300, Dmitry Osipenko wrote:
>> 18.06.2019 20:34, Sowjanya Komatineni пишет:
>>>
>>> On 6/18/19 9:50 AM, Sowjanya Komatineni wrote:
On 6/18/19 8:41 AM, Stephen Warren wrote:
> On 6/18/19 3:30 AM, Dmitry Osip
This patch add support for high speed USXGMII PCS and 10G
speed in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 41 +
drivers/net/ethernet/cadence/macb_main.c | 216 +++
2 files changed, 218 insertio
New parameters added to Cadence ethernet controller DT binding
for USXGMII interface.
Signed-off-by: Parshuram Thombare
---
Documentation/devicetree/bindings/net/macb.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/device
On 17/06/2019 22:09, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.53 release.
> There are 75 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
On 17/06/2019 22:08, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.1.12 release.
> There are 115 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
> > +static int est_poll_srwo(void *ioaddr) {
> > + /* Poll until the EST GCL Control[SRWO] bit clears.
> > +* Total wait = 12 x 50ms ~= 0.6s.
> > +*/
> > + unsigned int retries = 12;
> > + unsigned int value;
> > +
> > + do {
> > + value = TSN_RD32(ioaddr + MTL_EST_GCL_CT
On 17/06/2019 22:09, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.128 release.
> There are 53 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
Hi Miquel,
> > >
> > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND
controller
> > >
> > > On Tue, 18 Jun 2019 08:14:36 +0200
> > > Boris Brezillon wrote:
> > >
> > > > > > > > >
> > > > > > > > > How to make all #CS keep high for NAND to enter
> > > > > > > > > low-power st
Greetings!
As the guilty party in authoring this, and also pretty new around here
I’m wondering what I need to do to help clean it up?
> On 19 Jun 2019, at 05:14, Masahiro Yamada
> wrote:
>
> On Wed, Jun 19, 2019 at 1:02 PM Masahiro Yamada
> wrote:
>>
>> Hi.
>>
>>
>> On Wed, Jun 19, 2019 a
Hi Boris,
> > >
> > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND
controller
> > >
> > > On Tue, 18 Jun 2019 08:14:36 +0200
> > > Boris Brezillon wrote:
> > >
> > > > > > > > >
> > > > > > > > > How to make all #CS keep high for NAND to enter
> > > > > > > > > low-power sta
On Wed, Jun 19, 2019 at 10:33:08AM +0200, Thierry Reding wrote:
> On Tue, Jun 18, 2019 at 09:41:03AM -0600, Stephen Warren wrote:
> > On 6/18/19 3:30 AM, Dmitry Osipenko wrote:
> > > 18.06.2019 12:22, Dmitry Osipenko пишет:
> > > > 18.06.2019 10:46, Sowjanya Komatineni пишет:
> > > > > This patch a
On 18/06/2019 19:26, Dmitry Osipenko wrote:
> 18.06.2019 11:42, Bitan Biswas пишет:
>> tegra_i2c_xfer_msg initiates the I2C transfer in DMA
>> or PIO mode. It involves steps that need FIFO register
>> access, DMA API calls like dma_sync_single_for_device, etc.
>> Tegra I2C ISR has calls to tegra_
From: Colin Ian King
Pointer 'node' is assigned a value that is never read, node is
later overwritten when it re-assigned a different value inside
the while-loop. The assignment is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
fs/ext4/ext
19.06.2019 11:58, Jon Hunter пишет:
>
> On 18/06/2019 19:26, Dmitry Osipenko wrote:
>> 18.06.2019 11:42, Bitan Biswas пишет:
>>> tegra_i2c_xfer_msg initiates the I2C transfer in DMA
>>> or PIO mode. It involves steps that need FIFO register
>>> access, DMA API calls like dma_sync_single_for_device
On Wed, 19 Jun 2019 16:55:52 +0800
masonccy...@mxic.com.tw wrote:
> Hi Boris,
>
> > > >
> > > > Re: [PATCH v3 2/4] mtd: rawnand: Add Macronix MX25F0A NAND
> controller
> > > >
> > > > On Tue, 18 Jun 2019 08:14:36 +0200
> > > > Boris Brezillon wrote:
> > > >
> > > > > > > > > >
> > > > >
Hi Nick,
Thanks for the review. Some replies below.
On 06/19/2019 09:53 AM, Nicholas Piggin wrote:
Abhishek Goel's on June 17, 2019 7:56 pm:
Currently, the cpuidle governors determine what idle state a idling CPU
should enter into based on heuristics that depend on the idle history on
that CPU
19.06.2019 12:02, Dmitry Osipenko пишет:
> 19.06.2019 11:58, Jon Hunter пишет:
>>
>> On 18/06/2019 19:26, Dmitry Osipenko wrote:
>>> 18.06.2019 11:42, Bitan Biswas пишет:
tegra_i2c_xfer_msg initiates the I2C transfer in DMA
or PIO mode. It involves steps that need FIFO register
acces
On Tue, 2019-03-19 at 19:45 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Use USEC_PER_SEC to indicate the polling timeout directly.
> > And add documentation of scp_domain_data.
> >
> > Signed-off-by: Weiyi Lu
> > ---
> > drivers/soc/mediatek/mtk-scpsys
On Wed, Jun 19, 2019 at 09:54:21AM +0100, Julien Grall wrote:
> On 6/19/19 9:07 AM, Guo Ren wrote:
> > You forgot CCing C-SKY folks :P
>
> I wasn't aware you could be interested :).
>
> > Move arm asid allocator code in a generic one is a agood idea, I've
> > made a patchset for C-SKY and test is
On 18/06/2019 22:28, Jeremy Linton wrote:
Hi,
On 6/18/19 12:23 PM, John Garry wrote:
On 18/06/2019 15:40, Valentin Schneider wrote:
On 18/06/2019 15:21, Jeremy Linton wrote:
[...]
+ * Return: -ENOENT if the PPTT doesn't exist, the CPU cannot be
found or
+ * the table revision isn't new
On Wed, Jun 19, 2019 at 8:39 AM Viresh Kumar wrote:
>
> On 19-06-19, 00:23, Rafael J. Wysocki wrote:
> > In patch [3/5] you could point notifiers for both min and max freq to the
> > same
> > notifier head. Both of your notifiers end up calling
> > cpufreq_update_policy()
> > anyway.
>
> I tri
On Wed, 19 Jun 2019 11:28:22 +0900
Masami Hiramatsu wrote:
> > BTW,
> >
> > I pulled in patches 1-9 and I'm starting to test them now.
>
> Thanks! Should I send 10-21 patches in v2?
Yes please.
The tests have passed, and I will be pushing them to linux-next soon.
But as I'm currently travel
On Tue, 2019-03-19 at 20:02 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Put clock enable and disable control in separate function.
> >
> > Signed-off-by: Weiyi Lu
> > ---
> > drivers/soc/mediatek/mtk-scpsys.c | 49 ---
> > 1
On Wed, Jun 19, 2019 at 09:40:36AM +0100, Parshuram Thombare wrote:
> This patch replace phylib API's by phylink API's.
>
> Signed-off-by: Parshuram Thombare
> ---
> drivers/net/ethernet/cadence/Kconfig | 2 +-
> drivers/net/ethernet/cadence/macb.h | 3 +
> drivers/net/ethernet/cade
On Wed, 19 Jun 2019 13:26:37 +0530
"Naveen N. Rao" wrote:
> > In include/ftrace.h:
> >
> > #ifndef FTRACE_IP_EXTENSION
> > # define FTRACE_IP_EXTENSION0
> > #endif
> >
> >
> > In arch/powerpc/include/asm/ftrace.h
> >
> > #define FTRACE_IP_EXTENSION MCOUNT_INSN_SIZE
> >
> >
> > Then
On Wed, Jun 05, 2019 at 04:20:03PM +0200, Michal Koutný
wrote:
> I considered relaxing the check to non-root cgroups only, however, as
> your example shows, it doesn't prevent reaching the avoided state by
> other paths. I'm not that familiar with RT sched to tell whether
> RT-priority tasks in d
On Tue, 2019-03-19 at 20:07 +0800, Nicolas Boichat wrote:
> On Tue, Mar 19, 2019 at 4:02 PM Weiyi Lu wrote:
> >
> > Put sram enable and disable control in separate functions.
> >
> > Signed-off-by: Weiyi Lu
>
> Refactoring looks ok, just a small comment.
>
> Reviewed-by: Nicolas Boichat
>
> >
1 - 100 of 875 matches
Mail list logo
