When building the kernel with W=1 the build system complains of:
drivers/mmc/host/omap.c:854:6: warning: no previous prototype for
‘omap_mmc_notify_cover_event’ [-Wmissing-prototypes]
854 | void omap_mmc_notify_cover_event(struct device *dev, int num, int
is_closed)
| ^~~~
On Tue, Jun 30, 2020 at 09:47:30PM +0200, Marco Elver wrote:
> On Tue, 30 Jun 2020 at 19:39, Will Deacon wrote:
> >
> > When building with LTO, there is an increased risk of the compiler
> > converting an address dependency headed by a READ_ONCE() invocation
> > into a control dependency and conse
On Tue, Jun 30, 2020 at 03:57:54PM -0700, Sami Tolvanen wrote:
> On Tue, Jun 30, 2020 at 12:47 PM Marco Elver wrote:
> >
> > On Tue, 30 Jun 2020 at 19:39, Will Deacon wrote:
> > >
> > > When building with LTO, there is an increased risk of the compiler
> > > converting an address dependency heade
On Wed, Jul 1, 2020 at 9:13 AM Calvin Johnson
wrote:
>
> Introduce ACPI mechanism to get PHYs registered on a MDIO bus and
> provide them to be connected to MAC.
>
> An ACPI node property "mdio-handle" is introduced to reference the
> MDIO bus on which PHYs are registered with autoprobing method u
Hi Santosh,
This series is a set of non critical updates for The TI K3 AM654x/J721E
Ring Accelerator driver.
Patch 1 - convert bindings to json-schema
Patches 2,3,5 - code reworking
Patch 4 - adds new API to request pair of rings k3_ringacc_request_rings_pair()
Patch 6 - updates K3 UDMA to use n
From: Peter Ujfalusi
We only request ring pairs via K3 DMA driver, switch to use the new
k3_ringacc_request_rings_pair() to simplify the code.
Signed-off-by: Peter Ujfalusi
Signed-off-by: Grygorii Strashko
---
drivers/dma/ti/k3-udma-glue.c | 40 ---
drivers/dma
Separate SoC specific initialization and and OF mach data in preparation of
adding support for more K3 SoCs
Signed-off-by: Grygorii Strashko
---
drivers/soc/ti/k3-ringacc.c | 70 +
1 file changed, 55 insertions(+), 15 deletions(-)
diff --git a/drivers/soc/ti/
From: Peter Ujfalusi
Move the free, occ, windex and rindex under a struct. We can use memset to
zero them and it will allow a cleaner way to extend driver functionality in
the future,
Signed-off-by: Peter Ujfalusi
Signed-off-by: Grygorii Strashko
---
drivers/soc/ti/k3-ringacc.c | 99 +
Add struct k3_ring *ring->flags to the ring dump.
Signed-off-by: Grygorii Strashko
---
drivers/soc/ti/k3-ringacc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/ti/k3-ringacc.c b/drivers/soc/ti/k3-ringacc.c
index d2dc9c144a89..8a8f31d59e24 100644
--- a/drivers/soc/ti/k3-ringacc
This is done so that code that's not specific to a particular
jh057n panel is named after the controller. Functions specific
to the panel are kept named after the panel.
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 90 ++
Convert the K3 NavigatorSS Ring Accelerator bindings documentation to
json-schema.
Cc: Rob Herring
Signed-off-by: Grygorii Strashko
---
.../devicetree/bindings/soc/ti/k3-ringacc.txt | 59 --
.../bindings/soc/ti/k3-ringacc.yaml | 102 ++
2 files changed, 102 in
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most cases Rings are used with DMA channels, which need to
request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API
The datasheet suggests to issue sleep in after display off
as a part of the panel's shutdown sequence.
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/driv
Parametrize the driver so that it can support more panels based
on st7703 controller.
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 43 +--
1 file changed, 31 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/d
It's better than having it spread around the driver.
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 50 +--
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in
PinePhone. Add support for it.
Signed-off-by: Icenowy Zheng
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 200 +-
1 file changed, 198 insertions(+), 2
The reset pin is inverted, so if we don't assert reset, the actual gpio
will be high and may keep driving the IO port of the panel.
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drive
From: Icenowy Zheng
Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels for the PinePhone.
Add the vendor prefix of it.
Signed-off-by: Icenowy Zheng
Signed-off-by: Ondrej Jirman
Acked-by: Rob Herring
---
Documentation/devicetre
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel. It is based on
Sitronix ST7703 LCD controller just like rocktech,jh057n00900. It is
used in PinePhone.
Add a compatible for it.
Signed-off-by: Ondrej Jirman
---
.../bindings/display/panel/rocktech,jh057n00900.yaml| 6 +-
1 fi
Convert Rocktech MIPI DSI panel driver from txt to yaml bindings.
Signed-off-by: Ondrej Jirman
---
.../display/panel/rocktech,jh057n00900.txt| 23 ---
.../display/panel/rocktech,jh057n00900.yaml | 66 +++
2 files changed, 66 insertions(+), 23 deletions(-)
delete mode 1
This rename is done so that the driver matches the name of the
display controller and in preparation for adding support for more
panels to the driver.
This is just a basic file rename, with no code changes.
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/Kconf
This patchset adds support for the LCD panel of PinePhone.
I've tested this on PinePhone 1.0 and 1.2.
Please take a look.
thank you and regards,
Ondrej Jirman
Changes in v6:
- Fixed spacing in yaml
- Fixed wrong vccio->iovcc supply name in the bindings doc
- I noticed that the original driver
Pinephone has a Goodix GT917S capacitive touchscreen controller on
I2C0 bus. Add support for it.
Signed-off-by: Ondrej Jirman
Acked-by: Linus Walleij
---
.../dts/allwinner/sun50i-a64-pinephone.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/al
Calling sleep out and display on is a controller specific part
of the initialization process. Move it out of the panel specific
initialization function to the enable callback.
Signed-off-by: Ondrej Jirman
Reviewed-by: Linus Walleij
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 33
From: Icenowy Zheng
PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.
Backlight levels curve was optimized by Martijn Braam using a
lux meter.
Add its device nodes.
Signed-off-by: Icenowy Zheng
Signed-off-by: Martijn Braam
Signed-off-by: Ondrej Jirman
Acked-by: Linus
On Wed, 01 Jul 2020, Lee Jones wrote:
> vmw_vmci_defs.h is included by multiple source files. Some of which
> do not make use of 'struct vmci_handle VMCI_ANON_SRC_HANDLE' rendering
> it unused. Ensure the compiler knows that this is in fact intentional
> by marking it as __maybe_unused. This fi
On Sun, Jun 07, 2020 at 09:53:48PM +0530, Manivannan Sadhasivam wrote:
> Add support for MaxLinear/Exar USB to Serial converters. This driver
> only supports XR21V141X series but it can be extended to other series
> from Exar as well in future.
>
> This driver is inspired from the initial one subm
Hello Linus,
On Wed, Jul 01, 2020 at 09:50:40AM +0200, Linus Walleij wrote:
> On Fri, Jun 26, 2020 at 2:56 AM Ondrej Jirman wrote:
>
> > Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in
> > PinePhone. Add support for it.
> >
> > Signed-off-by: Icenowy Zheng
> > Signed-off-by: On
Hi Iskren,
On Tue, Jun 30, 2020 at 05:09:05PM +0300, Iskren Chernev wrote:
> Enable support for various hw found on the Samsung Galaxy S5:
> - touchkey (the two buttons around the home button)
> - touchscreen
> - notification led
> - wifi
> - external SD card
>
> Please note that for working wifi
I would like to contribute some of my time to co-maintain the CAMSS
driver. I'm currently working to extend CAMSS to new hardware platforms.
Signed-off-by: Robert Foss
---
I'd like to volunteer as co-maintainer or maintainer. Currently I don't
know how active Todor is, but if he is inactive or i
On Wed, Jul 1, 2020 at 9:13 AM Calvin Johnson
wrote:
>
> Modify dpaa2_mac_connect() to support ACPI along with DT.
> Modify dpaa2_mac_get_node() to get the dpmac fwnode from either
> DT or ACPI.
> Replace of_get_phy_mode with fwnode_get_phy_mode to get
> phy-mode for a dpmac_node.
> Define and use
On Jun 16 2020, Yash Shah wrote:
> The patch series adds the support for dynamic CPU frequency switching
> for FU540-C000 SoC on the HiFive Unleashed board. All the patches are
> based on Paul Walmsley's work.
>
> This series is based on Linux v5.7 and tested on HiFive unleashed board.
I'm using
On Tue, Jun 23, 2020 at 6:15 PM Eugenio Perez Martin
wrote:
>
> On Mon, Jun 22, 2020 at 6:29 PM Michael S. Tsirkin wrote:
> >
> > On Mon, Jun 22, 2020 at 06:11:21PM +0200, Eugenio Perez Martin wrote:
> > > On Mon, Jun 22, 2020 at 5:55 PM Michael S. Tsirkin
> > > wrote:
> > > >
> > > > On Fri, J
On 23/06/20 4:33 pm, Akshu Agrawal wrote:
> HS400/HS200/eMMC HS doesn't have Preset Value register.
> Hence, sdhci_set_ios function overrides the value set by fmw to
> SDHCI_CTRL_DRV_TYPE_B.
> This patch sets drv_type to MMC_SET_DRIVER_TYPE_A
> so that host_control2 register gets updated with the r
On 01-07-20, 10:07, Ionela Voinescu wrote:
> diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
> index 83b58483a39b..60b5272c5d80 100644
> --- a/drivers/cpufreq/cpufreq.c
> +++ b/drivers/cpufreq/cpufreq.c
> @@ -59,6 +59,9 @@ static struct cpufreq_driver *cpufreq_driver;
> static D
On 01-07-20, 10:07, Ionela Voinescu wrote:
> diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
> index 3494f6763597..42668588f9f8 100644
> --- a/include/linux/cpufreq.h
> +++ b/include/linux/cpufreq.h
> @@ -293,7 +293,7 @@ __ATTR(_name, 0644, show_##_name, store_##_name)
>
> struct
On 01-07-20, 10:07, Ionela Voinescu wrote:
> From: Valentin Schneider
>
> To properly scale its per-entity load-tracking signals, the task scheduler
> needs to be given a frequency scale factor, i.e. some image of the current
> frequency the CPU is running at. Currently, this scale can be compute
On 01-07-20, 10:07, Ionela Voinescu wrote:
> In the majority of cases, the index argument to cpufreq's target_index()
> is meant to identify the frequency that is requested from the hardware,
> according to the frequency table: policy->freq_table[index].frequency.
>
> After successfully requesting
On Wed, 1 Jul 2020 at 12:07, Zijun Hu wrote:
>
> sched_entity @se not static @left should be compared
> to pick up @cfs_rq->next.
Could you elaborate why ?
left is the leftmost sched_entity and the one that should be used.
se != left means that left should be skipped after a yield and the
next
On Thu, Jun 25, 2020 at 09:39:26AM +0200, Alain Volmat wrote:
> SMBus Host-Notify protocol, from the adapter point of view
> consist of receiving a message from a client, including the
> client address and some other data.
>
> It can be simply handled by creating a new slave device
> and registeri
On Tue, Jun 30, 2020 at 03:55:58PM +0100, Colin King wrote:
> From: Colin Ian King
>
> The 32 bit int value 512 is being left shifted and then used in a context
> that expects the expression to be a larger unsigned long. There may be
> a potential integer overflow, so make 512 a UL before shift t
On Wed, 2020-07-01 at 09:02 +, Peter Chen wrote:
> On 20-07-01 08:32:22, Philippe Schenker wrote:
> > On Wed, 2020-07-01 at 02:52 +, Peter Chen wrote:
> > > On 20-06-30 11:59:49, Philippe Schenker wrote:
> > > > On Tue, 2020-06-30 at 00:43 +, Peter Chen wrote:
> > > > > On 20-06-29 10:0
On 2020-07-01 01:40, Qian Cai wrote:
Looks like this patchset introduced an use-after-free on arm-smmu-v3.
Reproduced using mlx5,
# echo 1 > /sys/class/net/enp11s0f1np1/device/sriov_numvfs
# echo 0 > /sys/class/net/enp11s0f1np1/device/sriov_numvfs
The .config,
https://github.com/cailca/linux-m
On Wed, Jul 1, 2020 at 2:52 PM Marco Elver wrote:
>
> On Wed, 1 Jul 2020 at 03:34, Stephen Rothwell wrote:
> >
> > Hi all,
> >
> > Today's linux-next merge of the rcu tree got a conflict in:
> >
> > kernel/kcsan/Makefile
> >
> > between commit:
> >
> > f7c28e224da6 ("kbuild: remove cc-option
On Tue, Jun 23, 2020 at 11:14:27AM -0500, Mario Limonciello wrote:
> Currently updates to Thunderbolt and USB4 controllers are fully atomic
> actions. When writing into the non-active NVM nothing gets flushed to
> the hardware until authenticate is sent.
>
> There has been some desire to improve t
On Wed, Jul 01, 2020 at 10:47:50AM +0200, Pavel Machek wrote:
> Hi!
>
> > > We normally trust the hardware NOT to be malicious. (Because if hacker
> > > has physical access to hardware and lot of resources, you lost).
> >
> > That is what we originally thought, however the world has changed and w
Jianyong Wu wrote on Wed, Jul 01, 2020:
> In the current setattr implementation in 9p, fid is always retrieved
> from dentry no matter file instance exists or not. There may be
> some info related to opened file instance dropped. so it's better
> to retrieve fid from file instance if file instance
On Wed, Jul 1, 2020 at 12:19 PM Will Deacon wrote:
> On Tue, Jun 30, 2020 at 09:25:03PM +0200, Arnd Bergmann wrote:
> > On Tue, Jun 30, 2020 at 7:39 PM Will Deacon wrote:
> > Once we make gcc-4.9 the minimum version,
> > this could be further improved to
> >
> >__auto_type __x = &(x);
>
>
* David Hildenbrand [2020-07-01 12:15:54]:
> On 01.07.20 12:04, Srikar Dronamraju wrote:
> > * Michal Hocko [2020-07-01 10:42:00]:
> >
> >>
> >>>
> >>> 2. Also existence of dummy node also leads to inconsistent information.
> >>> The
> >>> number of online nodes is inconsistent with the inform
The current generation of Intel® QuickAssist Technology devices
are not designed to run in an untrusted environment because of the
following issues reported in the release notes in
https://01.org/intel-quickassist-technology:
QATE-39220 - GEN - Intel® QAT API submissions with bad addresses that
This patchset defines a blocklist of devices in the vfio-pci module and adds
the current generation of Intel(R) QuickAssist devices to it as they are
not designed to run in an untrusted environment.
By default, if a device is in the blocklist, the probe of vfio-pci fails.
If a user wants to use a
Add device IDs for the following Intel QuickAssist devices: DH895XCC,
C3XXX and C62X.
The defines in this patch are going to be referenced in two independent
drivers, qat and vfio-pci.
Signed-off-by: Giovanni Cabiddu
---
include/linux/pci_ids.h | 6 ++
1 file changed, 6 insertions(+)
diff
Add blocklist of devices that by default are not probed by vfio-pci.
Devices in this list may be susceptible to untrusted application, even
if the IOMMU is enabled. To be accessed via vfio-pci, the user has to
explicitly disable the blocklist.
The blocklist can be disabled via the module parameter
Build pci_device_id structure using the PCI_VDEVICE macro.
This removes any references to the ADF_SYSTEM_DEVICE macro.
Signed-off-by: Giovanni Cabiddu
---
drivers/crypto/qat/qat_c3xxx/adf_drv.c | 7 ++-
drivers/crypto/qat/qat_c3xxxvf/adf_drv.c| 7 ++-
drivers/crypto/qat/qat_c62x
Replace device ids defined in the qat drivers with the ones in
include/linux/pci_ids.h.
Signed-off-by: Giovanni Cabiddu
---
drivers/crypto/qat/qat_c3xxx/adf_drv.c| 6 +++---
drivers/crypto/qat/qat_c3xxxvf/adf_drv.c | 6 +++---
drivers/crypto/qat/qat_c62x/adf_drv.c
On 01.07.20 13:01, Srikar Dronamraju wrote:
> * David Hildenbrand [2020-07-01 12:15:54]:
>
>> On 01.07.20 12:04, Srikar Dronamraju wrote:
>>> * Michal Hocko [2020-07-01 10:42:00]:
>>>
>
> 2. Also existence of dummy node also leads to inconsistent information.
> The
> number
On Wed, Jul 01, 2020 at 10:02:13AM +0200, Peter Zijlstra wrote:
> On Wed, Jul 01, 2020 at 12:26:46PM +1000, Dave Chinner wrote:
>
> > There's nothing like this in the scheduler code that I can find that
> > explains the expected overall ordering/serialisation mechanisms and
> > relationships used
On Wed, Jul 01, 2020 at 05:15:52PM +0800, 孙世龙 sunshilong wrote:
> Hi, list
>
> Are there some potentially serious problems that I should be aware of
> if I totally disable the CONFIG_ACPI option on the X86_64 platform?
Yes, your ACPI-based system will not boot.
> Would it do harm to the hardware
Xen is requiring 64-bit machines today and since Xen 4.14 it can be
built without 32-bit PV guest support. There is no need to carry the
burden of 32-bit PV guest support in the kernel any longer, as new
guests can be either HVM or PVH, or they can use a 64 bit kernel.
Remove the 32-bit Xen PV sup
The long term plan has been to replace Xen PV guests by PVH. The first
victim of that plan are now 32-bit PV guests, as those are used only
rather seldom these days. Xen on x86 requires 64-bit support and with
Grub2 now supporting PVH officially since version 2.04 there is no
need to keep 32-bit PV
There are some code parts using CONFIG_PARAVIRT for Xen pvops related
issues instead of the more stringent CONFIG_PARAVIRT_XXL.
Signed-off-by: Juergen Gross
---
arch/x86/entry/entry_64.S| 4 ++--
arch/x86/include/asm/fixmap.h| 2 +-
arch/x86/include/asm/required-featu
Some paravirt macros are no longer used, delete them.
Signed-off-by: Juergen Gross
---
arch/x86/include/asm/paravirt.h | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index cfe9f6e472b5..cff2fbd1edd5 100644
---
Hi Rafael,
On Tue, Jun 30, 2020 at 6:11 PM Rafael J. Wysocki wrote:
> On Tue, Jun 30, 2020 at 5:39 PM Greg Kroah-Hartman
> wrote:
> > On Tue, Jun 30, 2020 at 03:50:58PM +0200, Rafael J. Wysocki wrote:
> > > On Fri, Jun 26, 2020 at 10:53 PM Geert Uytterhoeven
> > > wrote:
> > > > On Fri, Jun 26,
The last 32-bit user of stuff under CONFIG_PARAVIRT_XXL is gone.
Remove 32-bit specific parts.
Signed-off-by: Juergen Gross
---
arch/x86/entry/vdso/vdso32/vclock_gettime.c | 1 +
arch/x86/include/asm/paravirt.h | 92 +++--
arch/x86/include/asm/paravirt_types.h
On Wed, Jul 1, 2020 at 10:29 AM Xia Jiang wrote:
>
> On Tue, 2020-06-30 at 16:53 +, Tomasz Figa wrote:
> > Hi Xia,
> >
> > On Tue, Jun 30, 2020 at 10:56:21AM +0800, Xia Jiang wrote:
> > > On Thu, 2020-06-11 at 18:46 +, Tomasz Figa wrote:
> > > > Hi Xia,
> > > >
> > > > On Thu, Jun 04, 2020
Hi!
> > > Yes, it originally was designed that way, but again, the world has
> > > changed so we have to change with it. That is why USB has for a long
> > > time now, allowed you to not bind drivers to devices that you do not
> > > "trust", and that trust can be determined by userspace. That al
On Wed, Jul 01, 2020 at 12:43:09PM +0200, Eugenio Perez Martin wrote:
> On Tue, Jun 23, 2020 at 6:15 PM Eugenio Perez Martin
> wrote:
> >
> > On Mon, Jun 22, 2020 at 6:29 PM Michael S. Tsirkin wrote:
> > >
> > > On Mon, Jun 22, 2020 at 06:11:21PM +0200, Eugenio Perez Martin wrote:
> > > > On Mon,
On 16.06.2020 12:25, Niklas Cassel wrote:
Add a new max_active zones definition in the sysfs documentation.
This definition will be common for all devices utilizing the zoned block
device support in the kernel.
Export max_active_zones according to this new definition for NVMe Zoned
Namespace dev
Hi Vinay.
On Wed, Jul 01, 2020 at 03:14:09PM +0530, Vinay Simha B N wrote:
> sam,
>
> I rechecked, but did not find any indents are too spaced.
> This is taken from a working dts tree.
>
port@1 {
| reg = <1>;
| dsi0_out: endpoint {
| remo
On 6/1/2020 11:26 AM, Rajendra Nayak wrote:
On 5/28/2020 1:06 AM, Rob Herring wrote:
On Wed, May 13, 2020 at 11:33:27AM +0530, Rajendra Nayak wrote:
Add an optional power domain which when specified can be used for
setting the performance state of Venus.
Signed-off-by: Rajendra Nayak
---
From: Matthias Brugger
The driver relies on the compatible string from DT to determine which
FW configuration file it should load. The DTS spec allows for '/' as
part of the compatible string. We change this to '-' so that we will
still be able to load the config file, even when the compatible ha
On Mon, 18 May 2020 19:39:07 +0200
Enric Balletbo i Serra wrote:
> This is really a cosmetic change just to make a bit more readable the
> code after convert the driver to drm_bridge. The bridge variable name
> will be used by the encoder drm_bridge, and the chained bridge will be
> named next_br
On Wed, Jul 1, 2020 at 6:45 AM James Jones wrote:
>
> This implies something is trying to use one of the old
> DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK format modifiers with DRM-KMS without
> first checking whether it is supported by the kernel. I had tried to
> force an Xorg+Mesa stack without my users
There is a potential space leak problem while linking tmpfile, in which
case, inode node (with nlink=0) is valid in tnc (on flash), which leads
to space leak. Meanwhile, the corresponding data nodes won't be released
from tnc. For example, (A reproducer can be found in Link):
$ mount UBIFS
[proc
As discussed on the list.
Signed-off-by: Christian König
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 40474982a21d..5d7130f8d342 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5089,6 +5089,7 @@ F:fs/dlm/
DMA BUFFER SHARING FRAMEWO
Hey Stan,
Hey Stan,
On 6/18/20 7:47 AM, Rajendra Nayak wrote:
Hey Matthias, thanks for summarizing this.
On 6/18/2020 3:45 AM, Matthias Kaehlcke wrote:
What is the plan for landing these, it seems not all must/should
go through the QCOM tree.
My guesses:
tty: serial: qcom_geni_serial:
Hi,
On 16/06/2020 10:35, Keqian Zhu wrote:
kvm_set_pte is called to replace a target PTE with a desired one.
We always do this without changing the desired one, but if dirty
status set by hardware is coverred, let caller know it.
Signed-off-by: Keqian Zhu
---
arch/arm64/kvm/mmu.c | 36 ++
On 01.07.20 13:06, David Hildenbrand wrote:
> On 01.07.20 13:01, Srikar Dronamraju wrote:
>> * David Hildenbrand [2020-07-01 12:15:54]:
>>
>>> On 01.07.20 12:04, Srikar Dronamraju wrote:
* Michal Hocko [2020-07-01 10:42:00]:
>
>>
>> 2. Also existence of dummy node also leads
On Wed, Jul 1, 2020 at 12:16 PM Will Deacon wrote:
> On Tue, Jun 30, 2020 at 09:11:32PM +0200, Arnd Bergmann wrote:
> > On Tue, Jun 30, 2020 at 7:37 PM Will Deacon wrote:
> > >
> > > In preparation for allowing architectures to define their own
> > > implementation of the READ_ONCE() macro, move
On Wed, 1 Jul 2020 13:23:03 +0200
Boris Brezillon wrote:
> On Mon, 18 May 2020 19:39:07 +0200
> Enric Balletbo i Serra wrote:
>
> > This is really a cosmetic change just to make a bit more readable the
> > code after convert the driver to drm_bridge. The bridge variable name
> > will be used by
Hello Lukas,
On Wed, Jul 01, 2020 at 06:30:01AM +0200, Lukas Wunner wrote:
> On Tue, Jun 30, 2020 at 04:42:11PM -0700, Daniel Winkler wrote:
> > This reverts commit 0eeaf62981ecc79e8395ca8caa1570eaf3a12257.
>
> That is not an upstream commit. You probably mean:
>
> commit 7b668c064ec33f3d68
On Wed, Jul 01, 2020 at 11:41:17AM +0200, Marco Elver wrote:
> On Tue, 30 Jun 2020 at 22:30, Paul E. McKenney wrote:
> > On Tue, Jun 30, 2020 at 10:12:43PM +0200, Peter Zijlstra wrote:
> > > On Tue, Jun 30, 2020 at 09:19:31PM +0200, Marco Elver wrote:
> > > > Thoughts?
> > >
> > > How hard would
These patches add DVFS support for Venus. Where posted
earlier as part of a series with multiple different drivers [1]
I have split them into specific driver changes in order to avoid
confusion on dependencies. Also added the corresponding device tree
changes for sdm845 and sc7180 platforms.
These
On Mon, 18 May 2020 19:39:09 +0200
Enric Balletbo i Serra wrote:
> The mtk_dpi driver uses an empty implementation for its encoder. Replace
> the code with the generic simple encoder.
>
> Signed-off-by: Enric Balletbo i Serra
> Reviewed-by: Chun-Kuang Hu
> ---
>
> drivers/gpu/drm/mediatek/mt
Add the OPP tables in order to be able to vote on the performance state
of a power-domain
Signed-off-by: Rajendra Nayak
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 35 +--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc718
Add support to add OPP tables and perf voting on the OPP powerdomain.
This is needed so venus votes on the corresponding performance state
for the OPP powerdomain along with setting the core clock rate.
Signed-off-by: Rajendra Nayak
Reviewed-by: Matthias Kaehlcke
---
drivers/media/platform/qcom
Add the OPP tables in order to be able to vote on the performance state of
a power-domain.
Signed-off-by: Rajendra Nayak
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm
Replace the custom code to parse GPIO offsets and/or GPIO offset ranges
by a call to bitmap_parselist(), and an iteration over the returned bit
mask.
This should have no impact on the format of the configuration parameters
written to the "new_device" virtual file in sysfs.
Suggested-by: Andy Shev
Hi Linus, Bartosz, Andy,
This patch series contains two improvements for the parsing code in the
GPIO Aggregator.
The second one converts the driver to use bitmap_parselist() for parsing
GPIO offsets and/or ranges, as suggested by Andy[1]. This should have
no impact on the format of the
In get_arg(), the variable start is pre-initialized, but overwritten
again in the first statement. Rework the assignment to not rely on
pre-initialization, to make the code easier to read.
Signed-off-by: Geert Uytterhoeven
---
v2:
- No changes.
---
drivers/gpio/gpio-aggregator.c | 4 ++--
1 f
thanks for your explanation.
you are right. @lest should be used as reference point to compare.
Please ignore this patch.
On 7/1/2020 6:47 PM, Vincent Guittot wrote:
> On Wed, 1 Jul 2020 at 12:07, Zijun Hu wrote:
>>
>> sched_entity @se not static @left should be compared
>> to pick up @cfs_rq->ne
On Wed, Jul 1, 2020 at 7:44 AM Zong Li wrote:
>
> On Wed, Jul 1, 2020 at 2:57 AM Atish Patra wrote:
> >
> > On Tue, 2020-06-30 at 17:08 +0530, Anup Patel wrote:
> > > On Tue, Jun 30, 2020 at 3:48 PM Anup Patel
> > > wrote:
> > > > On Tue, Jun 30, 2020 at 1:34 PM Zong Li wrote:
> > > > > On Tue,
Hi Peter,
On Sat, Jun 27, 2020 at 1:36 AM Peter Xu wrote:
> Use the general page fault accounting by passing regs into handle_mm_fault().
> It naturally solve the issue of multiple page fault accounting when page fault
> retry happened.
I sent a patch to fix up riscv page fault accounting some d
On Sat, Feb 1, 2020 at 8:02 PM Arnaldo Carvalho de Melo
wrote:
>
> Em Sat, Feb 01, 2020 at 01:14:53PM -0500, Steven Rostedt escreveu:
> > On Sat, 1 Feb 2020 17:19:31 +0100
> > Lukas Bulwahn wrote:
> >
> > > The git history shows that the files under ./tools/lib/traceevent/ are
> > > being develo
On Wed, Jul 1, 2020 at 1:26 PM Christian König
wrote:
>
> As discussed on the list.
>
> Signed-off-by: Christian König
Acked-by: Daniel Vetter
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 40474982a21d..5d7130f8d342 100644
> ---
On Mon, 18 May 2020 19:39:08 +0200
Enric Balletbo i Serra wrote:
> Convert mtk_dpi to a bridge driver with built-in encoder support for
> compatibility with existing component drivers.
>
> Signed-off-by: Enric Balletbo i Serra
> Reviewed-by: Chun-Kuang Hu
> ---
>
> drivers/gpu/drm/mediatek/m
Hi Grygorii,
On 01/07/2020 13.30, Grygorii Strashko wrote:
> Add new API k3_ringacc_request_rings_pair() to request pair of rings at
> once, as in the most cases Rings are used with DMA channels, which need to
> request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
> one to rece
On Wed, Jul 01, 2020 at 10:29:08AM +0200, David Hildenbrand wrote:
>On 01.07.20 04:11, Wei Yang wrote:
>> On Tue, Jun 30, 2020 at 02:44:00PM +0200, David Hildenbrand wrote:
>>> On 30.06.20 05:18, Wei Yang wrote:
When walking page tables, we define several helpers to get the address of
the
>> …
>>> +++ linux-next-20200629/Documentation/dev-tools/coccinelle.rst
>> …
>> > @@ -177,13 +177,13 @@ For example, to check drivers/net/wirele
>>> To apply Coccinelle on a file basis, instead of a directory basis, the
>>> following command may be used::
>>>
>>> -make C=1 CHECK="scripts/cocc
Map old corporate email address @yandex-team.ru to stable private address.
Signed-off-by: Konstantin Khlebnikov
---
.mailmap |1 +
1 file changed, 1 insertion(+)
diff --git a/.mailmap b/.mailmap
index c69d9c734fb5..b15c836ea7fe 100644
--- a/.mailmap
+++ b/.mailmap
@@ -146,6 +146,7 @@ Kamil
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