We see that sometimes the CPU in GOYA and GAUDI is occupied by the
power/thermal loop and can't answer requests from the driver fast enough.
Therefore, to avoid false notifications on timeouts, increase the timeout
to 4 seconds on each message sent to the device CPU.
Signed-off-by: Oded Gabbay
-
Store flags per struct pollfd *entries object in a bitmap of int size.
Implement fdarray_flag__nonfilterable flag to skip object from counting
by fdarray__filter().
Signed-off-by: Alexey Budankov
---
tools/lib/api/fd/array.c | 3 ++-
tools/lib/api/fd/array.h |
In guest protected mode, if the current privilege level
is not 0 and the PCE flag in the CR4 register is cleared,
we will inject a #GP for RDPMC usage.
Signed-off-by: Like Xu
---
arch/x86/kvm/pmu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
i
Avoid moving of fds by fdarray__filter() so fds indices returned
by fdarray__add() can be used for access and processing of
objects at struct pollfd *entries.
Signed-off-by: Alexey Budankov
---
tools/lib/api/fd/array.c | 11 +--
tools/perf/tests/fdarray.c | 20 ++--
2
On Wed, Jul 08, 2020 at 03:19:26PM +0800, Frank Lee wrote:
> This patch set adds initial support for allwinner a100 soc,
> which is a 64-bit tablet chip.
>
Hello
Does a product already exists with it ? I couldnt found any.
Does a datasheet is availlable ?
Regards
Power Management Controller (PMC) can override the PLLM clock settings,
including the enable-state. Although PMC could only act as a second level
gate, meaning that PLLM needs to be enabled by the Clock and Reset
Controller (CaR) anyways if we want it to be enabled. Hence, when PLLM is
overridden b
On Wed, 08 Jul 2020, Johannes Thumshirn wrote:
> On 07/07/2020 16:01, Lee Jones wrote:
> > + * @disc: The descovery context
>
> s/descovery/discovery
Ah yes. I can't even blame copy/paste for this!
I think this patch has been applied. I will send up a follow-up.
Thank you!
--
Lee Jones [李
Define and initialize control file descriptors.
Signed-off-by: Alexey Budankov
---
tools/perf/util/evlist.c | 3 +++
tools/perf/util/evlist.h | 5 +
2 files changed, 8 insertions(+)
diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
index bcbe0cb8482e..36eb50aba1f5 100644
--
Avoid counting of struct pollfd *entries objects with
fdarray_flag__nonfilterable flag by fdarray__filter().
Nonfilterable objects are still processed if requested
events have been signaled for them.
Signed-off-by: Alexey Budankov
---
tools/lib/api/fd/array.c | 3 ++-
1 file changed, 2 inserti
On Wed, Jul 8, 2020 at 9:31 AM Mickaël Salaün wrote:
> On 08/07/2020 09:22, Arnd Bergmann wrote:
> > On Tue, Jul 7, 2020 at 8:10 PM Mickaël Salaün wrote:
> >
> >> index f4a01305d9a6..a63a411a74d5 100644
> >> --- a/include/uapi/asm-generic/unistd.h
> >> +++ b/include/uapi/asm-generic/unistd.h
>
>
On Wed 08-07-20 16:19:17, Joonsoo Kim wrote:
> On Tue, Jul 07, 2020 at 01:40:19PM +0200, Michal Hocko wrote:
[...]
> Subject: [PATCH] mm/migrate: clear __GFP_RECLAIM for THP allocation for
> migration
>
> In migration target allocation functions, THP allocations uses different
> gfp_mask, especia
Hi all,
Today's linux-next merge of the set_fs tree got a conflict in:
fs/btrfs/file.c
between commit:
8d628ca164a3 ("btrfs: switch to iomap_dio_rw() for dio")
from the btrfs tree and commit:
343f02a47b7e ("fs: default to generic_file_splice_read for files having
->read_iter")
from th
Implement functions of initialization, finalization and processing
of control command messages coming from control file descriptors.
Allocate control file descriptor as descriptor at struct pollfd
object of evsel_list for atomic poll() operation.
Signed-off-by: Alexey Budankov
---
tools/perf/u
08.07.2020 10:46, Dmitry Osipenko пишет:
> - return val & PLL_BASE_ENABLE ? 1 : 0;
> + return val & PLL_BASE_ENABLE;
This was unintended change that caught my eve only after sending out the
email, woops :) Please let me make a v3 shortly.
Introduce handle_interval() function that factors out body of event
handling loop for attach and system wide monitoring use cases.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-stat.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/tools/perf/buil
Kindly ping.
I think we may need this patch, as we limit the maximum vPMU version to 2:
eax.split.version_id = min(cap.version, 2);
Thanks,
Like Xu
On 2020/6/24 9:59, Like Xu wrote:
Some new Intel platforms (such as TGL) already have the
fourth fixed counter TOPDOWN.SLOTS, but it has not b
Check for target existence in loop control statement jointly
with external asynchronous 'done' signal.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-stat.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index
On Wed, Jul 8, 2020 at 12:22 AM David Hildenbrand wrote:
>
> On 08.07.20 07:27, Mike Rapoport wrote:
> > On Tue, Jul 07, 2020 at 03:05:48PM -0700, Dan Williams wrote:
> >> On Tue, Jul 7, 2020 at 11:01 AM Mike Rapoport wrote:
> >>>
> >>> On Tue, Jul 07, 2020 at 02:26:08PM +0200, David Hildenbrand
On 07/08/2020 03:45 AM, Maciej W. Rozycki wrote:
On Tue, 7 Jul 2020, Tiezhu Yang wrote:
In the MIPS architecture, we should clear the security-relevant
flag READ_IMPLIES_EXEC in the function SET_PERSONALITY2() of the
file arch/mips/include/asm/elf.h.
Otherwise, with this flag set, PROT_READ im
Hi, baohua
Thank you for your attention.
In my understanding of the MEMORY_HOTPLUG this patch has no effect on it. The
reason is that in sparse_add_one_section() the memory that memmap needs from
Slab if kernel start completed，this memory has nothing to do with memblock
alloc/ free memory in t
Factor out body of event handling loop for fork case reusing
handle_interval() function.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-stat.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index 87eebf3f55ae
Consolidate event dispatching loops for fork, attach and system
wide monitoring use cases into common dispatch_events() function.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-stat.c | 36
1 file changed, 24 insertions(+), 12 deletions(-)
diff --gi
Le 08/07/2020 à 09:44, Jordan Niethe a écrit :
On Wed, Jul 8, 2020 at 2:53 PM Ravi Bangoria
wrote:
Milton Miller reported that we are aligning start and end address to
wrong size SZ_512M. It should be SZ_512. Fix that.
While doing this change I also found a case where ALIGN() comparison
fa
Extend -D,--delay option with -1 value to start monitoring with
events disabled to be enabled later by enable command provided
via control file descriptor.
Signed-off-by: Alexey Budankov
---
tools/perf/Documentation/perf-stat.txt | 5 +++--
tools/perf/builtin-stat.c | 18
Implement handling of 'enable' and 'disable' control commands coming
from control file descriptor. If poll event splits initiated timeout
interval then the reminder is calculated and still waited in the
following evlist__poll() call.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-stat.c
On Wed, Jul 8, 2020 at 12:40 AM Dan Williams wrote:
>
> Linux maintains a coding-style and its own idiomatic set of terminology.
> Update the style guidelines to recommend replacements for the terms
> master/slave and blacklist/whitelist.
>
> Link:
> http://lore.kernel.org/r/159389297140.2210796.
Introduce --control fd:ctl-fd[,ack-fd] options to pass open file
descriptors numbers from command line. Extend perf-stat.txt file
with --control fd:ctl-fd[,ack-fd] options description. Document
possible usage model introduced by --control fd:ctl-fd[,ack-fd]
options by providing example bash shell
On 01. 07. 20 14:46, Lee Jones wrote:
> Kerneldoc expects arg descriptions to be in the format '@.*: '. If either
> the '@' or the ':' is omitted then kerneldoc complains that the description
> is missing. Add the missing ':' here and provide a new description for
> 'value'.
>
> Fixes the fol
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
From: Finley Xiao
commit 371a3bc79c11b707d7a1b7a2c938dc3cc042fffb upstream.
The function cpu_power_to_freq is used to find a frequency and set the
cooling device to consume at most the power to be converted. For example,
if the power to be converted is 80mW, and the em table is as follow.
struct
Extend -D,--delay option with -1 to start collection with events
disabled to be enabled later by 'enable' command provided via
control file descriptor.
Signed-off-by: Alexey Budankov
---
tools/perf/Documentation/perf-record.txt | 5 +++--
tools/perf/builtin-record.c | 12
Power Management Controller (PMC) can override the PLLM clock settings,
including the enable-state. Although PMC could only act as a second level
gate, meaning that PLLM needs to be enabled by the Clock and Reset
Controller (CaR) anyways if we want it to be enabled. Hence, when PLLM is
overridden b
Implement handling of 'enable' and 'disable' control commands
coming from control file descriptor.
Signed-off-by: Alexey Budankov
---
tools/perf/builtin-record.c | 16
1 file changed, 16 insertions(+)
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
inde
>-Original Message-
>From: Peter Xu
>Sent: 2020年7月3日 8:59
>To: lkp
>Cc: Paolo Bonzini ; kbuild-...@lists.01.org; linux-
>ker...@vger.kernel.org
>Subject: [kbuild-all] Re: arch/x86/kvm/../../../virt/kvm/kvm_main.c:4326:17:
>sparse: struct kvm_vcpu Documentation Kbuild Makefile crypto in
Introduce --control fd:ctl-fd[,ack-fd] options to pass open file
descriptors numbers from command line. Extend perf-record.txt file
with --control fd:ctl-fd[,ack-fd] options description. Document
possible usage model introduced by --control fd:ctl-fd[,ack-fd]
options by providing example bash she
Hi Linus,
Am 2020-07-08 09:39, schrieb Linus Walleij:
just a drive-by-comment:
On Mon, Jul 6, 2020 at 7:57 PM Michael Walle wrote:
Add a pwm-fan mapped to the PWM channel 0 which is connected to the
fan connector of the carrier.
Signed-off-by: Michael Walle
If you have a cooling device l
> -Original Message-
> From: netdev-ow...@vger.kernel.org [mailto:netdev-ow...@vger.kernel.org]
> On Behalf Of Christoph Hellwig
> Sent: Wednesday, July 8, 2020 6:50 PM
> To: Robin Murphy
> Cc: Björn Töpel ; Christoph Hellwig ;
> Daniel Borkmann ; maxi...@mellanox.com;
> konrad.w...@ora
On Wed, Jul 08, 2020 at 02:54:32AM +0800, Yang Shi wrote:
> Recently we found regression when running will_it_scale/page_fault3 test
> on ARM64. Over 70% down for the multi processes cases and over 20% down
> for the multi threads cases. It turns out the regression is caused by commit
> 89b15332a
On Wed, Jul 08, 2020 at 01:56:00AM -0400, Gabriel Krisman Bertazi wrote:
> Introduce a mechanism to quickly disable/enable syscall handling for a
> specific process and redirect to userspace via SIGSYS. This is useful
> for processes that have different personalities depending on which part
> of t
On Wed, Jul 08, 2020 at 09:33:46AM +0200, Alexander A. Klimov wrote:
> Rationale:
> Reduces attack surface on kernel devs opening the links for MITM
> as HTTPS traffic is much harder to manipulate.
>
> Deterministic algorithm:
> For each file:
> If not .svg:
> For each line:
> If doesn
On (20/07/08 09:40), Kurt Kanzenbach wrote:
> I'm not sure how this patch will help with the situation. Because at the
> point of that THRE test the irq handler isn't registered. It's
> registered a few lines below (up->ops->setup_irq()) meaning the irq line
> has to be disabled if shared. Otherwis
Hi Alex,
Eric asked if we will to have data strcut other than struct iommu_nesting_info
type in the struct vfio_iommu_type1_info_cap_nesting @info[] field. I'm not
quit sure on it. I guess the answer may be not as VFIO's nesting support should
based on IOMMU UAPI. how about your opinion?
+#define
On Tue, Jul 07, 2020 at 02:16:07PM -0500, Pierre-Louis Bossart wrote:
> Fix W=1 warnings - missing fields in description
>
> Signed-off-by: Pierre-Louis Bossart
Acked-by: Maxime Ripard
Thanks!
Maxime
On Tue, Jul 07, 2020 at 02:16:08PM -0500, Pierre-Louis Bossart wrote:
> Fix W=1 warning - typo in field description
>
> Signed-off-by: Pierre-Louis Bossart
Acked-by: Maxime Ripard
Thanks!
Maxime
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
Hi Alex,
> From: Liu, Yi L < yi.l@intel.com>
> Sent: Friday, July 3, 2020 2:28 PM
>
> Hi Alex,
>
> > From: Alex Williamson
> > Sent: Friday, July 3, 2020 5:19 AM
> >
> > On Wed, 24 Jun 2020 01:55:19 -0700
> > Liu Yi L wrote:
> >
> > > This patch allows user space to request PASID allocatio
RENOIR loads dmub fw not dmcu, check dmcu only will prevent loading iram,
it breaks backlight control.
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=208277
Signed-off-by: Aaron Ma
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Hi Rafael,
On Tue, Jul 7, 2020 at 5:56 PM Rafael J. Wysocki wrote:
> On Wed, Jul 1, 2020 at 9:43 PM Saravana Kannan wrote:
> > When commit 93d2e4322aa7 ("of: platform: Batch fwnode parsing when
> > adding all top level devices") enabled batch processing of fw_devlink to
> > optimize the parsing
On Sat, 18 Apr 2020 at 00:39, Paolo Bonzini wrote:
>
> When a nested page fault is taken from an address that does not have
> a memslot associated to it, kvm_mmu_do_page_fault returns RET_PF_EMULATE
> (via mmu_set_spte) and kvm_mmu_page_fault then invokes
> svm_need_emulation_on_page_fault.
>
> T
On Wed, Jul 08, 2020 at 12:23:59AM -0700, Dan Williams wrote:
> Linux maintains a coding-style and its own idiomatic set of terminology.
> Update the style guidelines to recommend replacements for the terms
> master/slave and blacklist/whitelist.
>
> Link:
> http://lore.kernel.org/r/159389297140.
On 08/07/2020 09:47, Arnd Bergmann wrote:
> On Wed, Jul 8, 2020 at 9:31 AM Mickaël Salaün wrote:
>> On 08/07/2020 09:22, Arnd Bergmann wrote:
>>> On Tue, Jul 7, 2020 at 8:10 PM Mickaël Salaün wrote:
>>>
index f4a01305d9a6..a63a411a74d5 100644
--- a/include/uapi/asm-generic/unistd.h
>>
Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds
the basical DTSI file of it, including the clock, i2c, pins, sid, ths,
nmi, and UART support.
Signed-off-by: Frank Lee
---
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 364 +
1 file changed, 364 inser
[+Ard]
On Tue, Jul 07, 2020 at 07:46:08AM -0400, Peng Hao wrote:
> If plt_max_entries is 0, a warning is triggered.
> WARNING: CPU: 200 PID: 3000 at arch/arm64/kernel/module-plts.c:97
> module_emit_plt_entry+0xa4/0x150
Which kernel are you seeing this with? There is a PLT-related change in
for-n
On Wed, Jul 08, 2020 at 09:24:53AM +0800, Wei Yang wrote:
> The purpose of this code is to calculate the smaller extent in old and
> new range. Let's leverage pmd_addr_end() to do the calculation.
>
> Hope this would make the code easier to read.
>
> Signed-off-by: Wei Yang
> ---
> mm/mremap.c
Hello!
This series addresses a problem that I discovered on Nexus 7 device where
GPIO interrupts may be left enabled after bootloader and the driver isn't
prepared to this. Secondly, I made few very minor cleanup improvements to
the code.
Dmitry Osipenko (5):
gpio: max77620: Initialize interrup
The afs filesystem driver allows unstarted operations to be cancelled by
signal, but most of these can easily be restarted (mkdir for example). The
primary culprits for reproducing this are those applications that use
SIGALRM to display a progress counter.
File lock-extension operation is marked
On 08.07.20 09:50, Dan Williams wrote:
> On Wed, Jul 8, 2020 at 12:22 AM David Hildenbrand wrote:
>>
>> On 08.07.20 07:27, Mike Rapoport wrote:
>>> On Tue, Jul 07, 2020 at 03:05:48PM -0700, Dan Williams wrote:
On Tue, Jul 7, 2020 at 11:01 AM Mike Rapoport wrote:
>
> On Tue, Jul 07, 2
Document board compatible names for Allwinner A100 Perf1 Board.
Signed-off-by: Frank Lee
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
b/Documentation/devicetree/bindings/arm/sunxi.y
Some asymmetric algorithms will get different ciphertext after
each encryption, such as SM2, and let testmgr support the testing
of such algorithms.
In struct akcipher_testvec, set c and c_size to be empty, skip
the comparison of the ciphertext, and compare the decrypted
plaintext with m to achiev
Both crypto_sm3_update and crypto_sm3_finup have been
exported, exporting crypto_sm3_final, to avoid having to
use crypto_sm3_finup(desc, NULL, 0, dgst) to calculate
the hash in some cases.
Signed-off-by: Tianjia Zhang
---
crypto/sm3_generic.c | 7 ---
include/crypto/sm3.h | 2 ++
2 files ch
A100 perf1 is an Allwinner A100-based SBC, with the following features:
- 1GiB DDR3 DRAM
- AXP803 PMIC
- 2 USB 2.0 ports
- MicroSD slot and on-board eMMC module
- on-board Nand flash
- ···
Adds initial support for it, including UART and PMU.
Signed-off-by: Frank Lee
---
arch/arm64/boot/dts/all
I noticed on Nexus 7 that after rebooting from downstream kernel to
upstream, the GPIO interrupt is triggering non-stop despite of interrupts
being disabled for all of GPIOs. This happens because Nexus 7 uses a
soft-reboot, meaning that bootloader should take care of resetting
hardware, but bootloa
Let's move the virq variable declaration to a top-level scope just to
make the code a bit more visually appealing.
Signed-off-by: Dmitry Osipenko
---
drivers/gpio/gpio-max77620.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-max77620.c b/drivers/gpio/gp
Check whether GPIO IRQ is enabled before proceeding with handling the
interrupt request. The interrupt handler now returns IRQ_NONE if none
of interrupts were handled, which is usually a sign of a problem.
Signed-off-by: Dmitry Osipenko
---
drivers/gpio/gpio-max77620.c | 4 +++-
1 file changed,
There is no need to dedicate an array where a bitmap could be used.
Let's replace the interrupt's enable-array with the enable-mask in order
to improve the code a tad.
Signed-off-by: Dmitry Osipenko
---
drivers/gpio/gpio-max77620.c | 12
1 file changed, 8 insertions(+), 4 deletions(
The MAX77620_GPIO_NR enum value represents the total number of GPIOs,
let's use it instead of a raw value in order to improve the code's
readability a tad.
Signed-off-by: Dmitry Osipenko
---
drivers/gpio/gpio-max77620.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/dr
Hello all,
This new module implement the OSCCA certificate and SM2 public key
algorithm. It was published by State Encryption Management Bureau, China.
List of specifications for OSCCA certificate and SM2 elliptic curve
public key cryptography:
* GM/T 0003.1-2012
* GM/T 0003.2-2012
* GM/T 0003.3-
The digital certificate format based on SM2 crypto algorithm as
specified in GM/T 0015-2012. It was published by State Encryption
Management Bureau, China.
The method of generating Other User Information is defined as
ZA=H256(ENTLA || IDA || a || b || xG || yG || xA || yA), it also
specified in ht
This new module implement the SM2 public key algorithm. It was
published by State Encryption Management Bureau, China.
List of specifications for SM2 elliptic curve public key cryptography:
* GM/T 0003.1-2012
* GM/T 0003.2-2012
* GM/T 0003.3-2012
* GM/T 0003.4-2012
* GM/T 0003.5-2012
IETF: https:
The implementation of EC is introduced from libgcrypt as the
basic algorithm of elliptic curve, which can be more perfectly
integrated with MPI implementation.
Some other algorithms will be developed based on mpi ecc, such as SM2.
Signed-off-by: Tianjia Zhang
---
include/linux/mpi.h | 105 +++
Asymmetric digsig supports SM2-with-SM3 algorithm combination,
so that IMA can also verify SM2's signature data.
Signed-off-by: Tianjia Zhang
---
security/integrity/digsig_asymmetric.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/security/integrity/digsig_a
The digital certificate format based on SM2 crypto algorithm as
specified in GM/T 0015-2012. It was published by State Encryption
Management Bureau, China.
This patch adds the OID object identifier defined by OSCCA. The
x509 certificate supports sm2-with-sm3 type certificate parsing.
It uses the s
Expand the mpi library based on libgcrypt, and the ECC algorithm of
mpi based on libgcrypt requires these functions.
Some other algorithms will be developed based on mpi ecc, such as SM2.
Signed-off-by: Tianjia Zhang
---
include/linux/mpi.h| 88 +++
lib/mpi/Makefile | 5 +
l
Hi Krzysztof,
On Tue, 7 Jul 2020 at 17:06, Krzysztof Kozlowski wrote:
>
> On Tue, Jul 07, 2020 at 09:59:08AM +, Anand Moon wrote:
> > Instead of a busy waiting loop while loop using udelay
>
> You doubled "loop".
>
I will fix this in the next version.
> > use readl_poll_timeout function to ch
Hi Martin,
On Tue, 2020-07-07 at 17:56 +0200, Martin Fuzzey wrote:
> When performing a modeset the atomic core calls
> ipu_crtc_atomic_disable() which switches off the DC and DI.
>
> When we immediately restart as in the modeset case this sometimes
> leads to corruption at the bottom of the scree
* Mathieu Desnoyers:
> Allright, thanks for the insight! I'll drop these patches and focus only
> on the bugfix.
Thanks, much appreciated!
On 01/07/2020 13.30, Grygorii Strashko wrote:
> Hi Santosh,
>
> This series is a set of non critical updates for The TI K3 AM654x/J721E
> Ring Accelerator driver.
>
> Patch 1 - convert bindings to json-schema
> Patches 2,3,5 - code reworking
> Patch 4 - adds new API to request pair of rings
On 7/7/2020 5:40 PM, Greg KH wrote:
On Tue, Jul 07, 2020 at 10:16:21AM +0800, Cathy Zhang wrote:
Intel TSX suspend load tracking instructions aim to give a way to
choose which memory accesses do not need to be tracked in the TSX
read set. Add TSX suspend load tracking CPUID feature flag TSXLDTRK
On 29. 06. 20 15:49, Laurent Pinchart wrote:
> Hi Vinod,
>
> On Mon, Jun 29, 2020 at 06:49:17PM +0530, Vinod Koul wrote:
>> On 29-06-20, 15:00, Laurent Pinchart wrote:
>>> Hello,
>>>
>>> The patch series adds a PHY driver for the Xilinx ZynqMP gigabit serial
>>> transceivers (PS-GTR). The PS-GT
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
Yes i search but not find any information.
And write hear to help if any have same problem or any of you have
idea from where is comme this problem.
If need more debug i will only write how to get more information.
Martin
На ср, 8.07.2020 г. в 10:09 Greg KH написа:
>
> On Wed, Jul 08, 2020 at
The genpd infrastructure uses the terms master/slave, but such uses have
no external exposures (not even in Documentation/driver-api/pm/*) and are
not mandated by nor associated with any external specifications. Change
the language used through-out to leader/follower.
There was one possible except
On Wed, Jul 8, 2020 at 10:46 AM Oded Gabbay wrote:
> We see that sometimes the CPU in GOYA and GAUDI is occupied by the
> power/thermal loop and can't answer requests from the driver fast enough.
>
> Therefore, to avoid false notifications on timeouts, increase the timeout
> to 4 seconds on each
On Tue, Jul 7, 2020 at 9:12 PM Eric Biggers wrote:
>
> On Tue, Jul 07, 2020 at 08:05:50PM -0700, Daniel Rosenberg wrote:
> > +/**
> > + * generic_ci_d_compare - generic d_compare implementation for casefolding
> > filesystems
> > + * @dentry: dentry whose name we are checking against
> > + * @le
On 08/07/20 10:17, Wanpeng Li wrote:
> On Sat, 18 Apr 2020 at 00:39, Paolo Bonzini wrote:
>> When a nested page fault is taken from an address that does not have
>> a memslot associated to it, kvm_mmu_do_page_fault returns RET_PF_EMULATE
>> (via mmu_set_spte) and kvm_mmu_page_fault then invokes
>
On 7/7/20 16:37, Lee Jones wrote:
Ideally the author or someone 'in the know' should come back and
provide the remainder of the documentation. Until the kerneldoc
checkers have been satisfied, let's just demote the header to a
standard comment block.
Thanks for the patch Lee, Pierre-Luis Bossa
On 7/8/2020 1:46 AM, Douglas Anderson wrote:
Not to be confused with the similar series I posed for the _other_
Qualcomm SPI controller (spi-geni-qcom) [1], this one avoids the
overhead on the Quad SPI controller.
It's based atop the current Qualcomm tree including Rajendra's ("spi:
spi-qcom-
On 07/07/2020 16:13, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.230 release.
> There are 24 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
On Wed, Jul 08, 2020 at 10:26:41AM +0200, David Hildenbrand wrote:
> On 08.07.20 09:50, Dan Williams wrote:
> > On Wed, Jul 8, 2020 at 12:22 AM David Hildenbrand wrote:
> >>
> On Tue 07-07-20 13:59:15, Jia He wrote:
> > This exports memory_add_physaddr_to_nid() for module driver t
On 07/07/2020 16:10, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.230 release.
> There are 19 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
On 07/07/2020 16:16, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.4.51 release.
> There are 65 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sho
On 07/07/2020 16:15, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.188 release.
> There are 27 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
On 07/07/2020 16:16, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.132 release.
> There are 36 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
On Tue, Jul 07, 2020 at 03:57:06PM +1000, Nicholas Piggin wrote:
> Yes, powerpc could certainly get more performance out of the slow
> paths, and then there are a few parameters to tune.
Can you clarify? The slow path is already in use on ARM64 which is weak,
so I doubt there's superfluous seriali
On Wed, Jul 8, 2020 at 11:30 AM Dmitry Osipenko wrote:
>
> There is no need to dedicate an array where a bitmap could be used.
> Let's replace the interrupt's enable-array with the enable-mask in order
> to improve the code a tad.
...
> +#include
> unsigned intirq_type[MAX7
On Tue, Jul 07, 2020 at 11:33:45PM -0400, Waiman Long wrote:
> From 5d7941a498935fb225b2c7a3108cbf590114c3db Mon Sep 17 00:00:00 2001
> From: Waiman Long
> Date: Tue, 7 Jul 2020 22:29:16 -0400
> Subject: [PATCH 2/9] locking/pvqspinlock: Introduce
> CONFIG_PARAVIRT_QSPINLOCKS_LITE
>
> Add a new P
On 08.07.20 10:39, Mike Rapoport wrote:
> On Wed, Jul 08, 2020 at 10:26:41AM +0200, David Hildenbrand wrote:
>> On 08.07.20 09:50, Dan Williams wrote:
>>> On Wed, Jul 8, 2020 at 12:22 AM David Hildenbrand wrote:
>> On Tue 07-07-20 13:59:15, Jia He wrote:
>>> This exports memor
On Wed, Jul 8, 2020 at 11:29 AM Dmitry Osipenko wrote:
>
> Check whether GPIO IRQ is enabled before proceeding with handling the
> interrupt request. The interrupt handler now returns IRQ_NONE if none
> of interrupts were handled, which is usually a sign of a problem.
...
> - pending = val
On Wed, Jul 8, 2020 at 11:29 AM Dmitry Osipenko wrote:
>
> Let's move the virq variable declaration to a top-level scope just to
> make the code a bit more visually appealing.
To me it sounds like unneeded churn, but it's up to maintainers.
--
With Best Regards,
Andy Shevchenko
Andy Duan writes:
> From: Sergey Organov Sent: Tuesday, July 7, 2020 10:43 PM
>> Andy Duan writes:
>>
>> > From: Sergey Organov Sent: Monday, July 6, 2020
>> 10:26 PM
>> >> Code of the form "if(x) x = 0" replaced with "x = 0".
>> >>
>> >> Code of the form "if(x == a) x = a" removed.
>> >>
>>
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