HP DreamColor panel needs to be controlled via AUX interface. However,
it has both DP_EDP_BACKLIGHT_BRIGHTNESS_AUX_SET_CAP and
DP_EDP_BACKLIGHT_BRIGHTNESS_PWM_PIN_CAP set, so it fails to pass
intel_dp_aux_display_control_capable() test.
Skip the test if the panel has force DPCD quirk.
Signed-off-
HP DreamColor panel, which is used by new HP ZBook Studio, needs to use
DPCD to control brightness.
Signed-off-by: Kai-Heng Feng
---
drivers/gpu/drm/drm_dp_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 092c8c9
On Fri, 02 Oct 2020, Russ Weight wrote:
> Add macros and definitions required by the MAX10 BMC
> Security Engine driver.
>
> Signed-off-by: Russ Weight
> ---
> v2:
> - These functions and macros were previously distributed among
> the patches that needed them. They are now grouped together
> On Apr 8, 2020, at 15:22, Jani Nikula wrote:
>
> On Tue, 07 Apr 2020, Kai-Heng Feng wrote:
>>> On Mar 27, 2020, at 19:03, Kai-Heng Feng
>>> wrote:
>>>
>>> Hi,
>>>
On Mar 23, 2020, at 13:35, Kai-Heng Feng
wrote:
There's another OLED panel needs to use DPCD aux inte
> On Apr 8, 2020, at 15:23, Jani Nikula wrote:
>
> On Tue, 07 Apr 2020, Kai-Heng Feng wrote:
>> There's another Samsung OLED panel needs to use DPCD aux interface to
>> control backlight.
>
> Acked-by: Jani Nikula
David,
Can you please merge this patch? Thanks.
Kai-Heng
>
>>
>> Signe
On 05-10-20, 08:11, Dave Jiang wrote:
> == Background ==
> A typical DMA device requires the driver to translate application buffers to
> hardware addresses,
> and a kernel-user transition to notify the hardware of new work. Shared
> Virtual Addressing (SVA)
> allows the processor and device to
On Tue, Oct 06, 2020 at 01:11:15PM -0700, Nathan Chancellor wrote:
> Clang warns:
>
> security/security.c:1716:59: warning: implicit conversion from
> enumeration type 'enum kernel_load_data_id' to different enumeration
> type 'enum kernel_read_file_id' [-Wenum-conversion]
> ret = call_int
On Tue, Oct 06, 2020 at 06:21:14PM -0700, Mike Travis wrote:
> When the UV BIOS starts the kernel it passes the UVsystab info struct to the
> kernel
Oh wow, *now* I get it. There is no "patch" being passed - your initial
commit message simply states that this is a patch to add and process...
Yeah
Hi Catalin,
On Tue, Oct 6, 2020 at 11:30 PM Catalin Marinas wrote:
>
> On Mon, Oct 05, 2020 at 11:12:10PM +0530, Bhupesh Sharma wrote:
> > I think my earlier email with the test results on this series bounced
> > off the mailing list server (for some weird reason), but I still see
> > several iss
On Tue, 06 Oct 2020, Michael Brunner wrote:
> On Tue, 2020-10-06 at 07:53 +0100, Lee Jones wrote:
> > On Mon, 05 Oct 2020, Michael Brunner wrote:
> >
> > > On Fri, 2020-10-02 at 08:01 +0100, Lee Jones wrote:
> > > > On Thu, 01 Oct 2020, Michael Brunner wrote:
> > > >
> > > > > The Intel 0-DAY CI
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: 7a6d94f0ed957fb667d4d74c5c6c640a26e87c8f
Gitweb:
https://git.kernel.org/tip/7a6d94f0ed957fb667d4d74c5c6c640a26e87c8f
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:29 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: 6a7cf55e9f2b743695adac84375548aa18112327
Gitweb:
https://git.kernel.org/tip/6a7cf55e9f2b743695adac84375548aa18112327
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:27 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: c4d98077443adf61268ffb8b2c5d63c6176d845f
Gitweb:
https://git.kernel.org/tip/c4d98077443adf61268ffb8b2c5d63c6176d845f
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:18 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: 8540b2cf0de09b6d96b7dce56a16e26ab4fe8a9b
Gitweb:
https://git.kernel.org/tip/8540b2cf0de09b6d96b7dce56a16e26ab4fe8a9b
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:24 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: d6922effe4f3d5c643c8c05d51a572d6db4c9cb3
Gitweb:
https://git.kernel.org/tip/d6922effe4f3d5c643c8c05d51a572d6db4c9cb3
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:26 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: a74a7e992caf0745f548a63b263ac34c6a4a29dd
Gitweb:
https://git.kernel.org/tip/a74a7e992caf0745f548a63b263ac34c6a4a29dd
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:25 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: ae5f8ce3c247b8d937782e76802a9036c09998ad
Gitweb:
https://git.kernel.org/tip/ae5f8ce3c247b8d937782e76802a9036c09998ad
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:28 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: 39297dde7390e01bfd737052fbb5313a09062e2d
Gitweb:
https://git.kernel.org/tip/39297dde7390e01bfd737052fbb5313a09062e2d
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:17 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: 1e61f5a95f1913c015a2d6a1544c108248b3971c
Gitweb:
https://git.kernel.org/tip/1e61f5a95f1913c015a2d6a1544c108248b3971c
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:22 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: 6c7794423a998478f6df0234d2dd5baa3ccbdb1d
Gitweb:
https://git.kernel.org/tip/6c7794423a998478f6df0234d2dd5baa3ccbdb1d
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:21 -05:00
Committe
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: 788b66e34e8ab82a93c63a83ba5a9d04f2f4ae26
Gitweb:
https://git.kernel.org/tip/788b66e34e8ab82a93c63a83ba5a9d04f2f4ae26
Author:Mike Travis
AuthorDate:Tue, 06 Oct 2020 16:34:27 -05:00
Committe
On Tue, Oct 6, 2020 at 9:12 PM Palmer Dabbelt wrote:
>
> On Tue, 06 Oct 2020 09:49:33 PDT (-0700), guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > As Aurelien has reported:
> >
> > [3.484586] AppArmor: AppArmor sha1 policy hashing enabled
> > [4.749835] Freeing unused kernel memory: 49
The following commit has been merged into the x86/platform branch of tip:
Commit-ID: ffe2febca4304b9288e2d274d2ece5e66c125441
Gitweb:
https://git.kernel.org/tip/ffe2febca4304b9288e2d274d2ece5e66c125441
Author:Mike Travis
AuthorDate:Mon, 05 Oct 2020 15:39:23 -05:00
Committe
On Tue, Oct 06, 2020 at 05:52:20PM +0200, Christoph Hellwig wrote:
> Hi WeiXiong, hi Kees,
>
> what is the use case for the code added in commit 17639f67c1d6
> ("pstore/blk: Introduce backend for block devices").
>
> This still doesn't have a user, and the API looks really odd to me.
pstore is
Add YAML schema for Tegra audio graph sound card DT bindings. It uses the
same DT bindings provided by generic audio graph driver. Along with this
few standard clock DT bindings are added which are specifically required
for Tegra audio.
Signed-off-by: Sameer Pujar
---
.../sound/nvidia,tegra
On Tue, Oct 06, 2020 at 09:34:32PM +0200, Pavel Machek wrote:
> Hi!
>
> > [ Upstream commit 17dd1367389cfe7f150790c83247b68e0c19d106 ]
> >
> > Before to call vdev->config->reset(vdev) we need to be sure that
> > no one is accessing the device, for this reason, we add new variables
> > in the stru
From: SeongJae Park
NOTE: This is only an RFC for future features of DAMON patchset[1], which is
not merged in the mainline yet. The aim of this RFC is to show how DAMON would
be evolved once it is merged in. So, if you have some interest in this RFC,
please consider reviewing the DAMON patchse
From: SeongJae Park
Some 'damon-dbgfs' users would want to monitor only a part of the entire
virtual memory address space. The framework users in the kernel space
could use '->init_target_regions' callback or even set the regions
inside the context struct as they want, but 'damon-dbgfs' users ca
From: SeongJae Park
This commit updates the damon user space tool to support the initial
monitoring target regions specification.
Signed-off-by: SeongJae Park
---
tools/damon/_damon.py | 39 +++
tools/damon/record.py | 12 +++-
tools/damon/schemes.
On Tue, Oct 06, 2020 at 09:28:17AM -0700, Joe Perches wrote:
> Convert the various uses of sprintf/snprintf/scnprintf to
> format sysfs output to sysfs_emit and sysfs_emit_at to make
> clear the output is sysfs related and to avoid any possible
> buffer overrun of the PAGE_SIZE buffer.
>
> Done wi
From: SeongJae Park
This commit adds another test case for the new feature, 'init_regions'.
Signed-off-by: SeongJae Park
Reviewed-by: Brendan Higgins
---
mm/damon/dbgfs-test.h | 55 +++
1 file changed, 55 insertions(+)
diff --git a/mm/damon/dbgfs-test.
From: SeongJae Park
Now the regions can be explicitly set as users want. Therefore checking
the number of gaps doesn't make sense. Remove the condition.
Signed-off-by: SeongJae Park
---
tools/testing/selftests/damon/_chk_record.py | 6 --
1 file changed, 6 deletions(-)
diff --git a/tool
From: SeongJae Park
This commit adds description of the 'init_regions' feature in the DAMON
usage document.
Signed-off-by: SeongJae Park
---
Documentation/admin-guide/mm/damon/usage.rst | 41 +++-
1 file changed, 39 insertions(+), 2 deletions(-)
diff --git a/Documentation/admi
From: SeongJae Park
This commit implements the primitives for the basic access monitoring of
the physical memory address space. By using this, users can easily
monitor the accesses to the physical memory.
Internally, it uses the PTE Accessed bit, as similar to that of the
virtual memory support
From: SeongJae Park
This commit makes the 'damon-dbgfs' to support the physical memory
monitoring, in addition to the virtual memory monitoring.
Users can do the physical memory monitoring by writing a special
keyword, 'paddr\n' to the 'pids' debugfs file. Then, DAMON will check
the special key
From: SeongJae Park
This commit updates the DAMON user space tool (damo-record) for NUMA
specific physical memory monitoring. With this change, users can
monitor accesses to physical memory of specific NUMA node.
Signed-off-by: SeongJae Park
---
tools/damon/_paddr_layout.py | 147
From: SeongJae Park
This commit allows users to record the data accesses on physical memory
address space by passing 'paddr' as target to 'damo-record'. If the
init regions are given, the regions will be monitored. Else, it will
monitor biggest conitguous 'System RAM' region in '/proc/iomem' an
From: SeongJae Park
This commit updates the DAMON documents for the physical memory
monitoring support.
Signed-off-by: SeongJae Park
---
Documentation/admin-guide/mm/damon/usage.rst | 42
Documentation/vm/damon/design.rst| 29 +-
Documentation/vm/da
This patch is against to mkp's 5.10/scsi-staging.
1. Use upper_32_bits() instead of dma_addr_hi32().
2. Use round_up() instead of logical operation.
---
Hi Peter,
On 2020-10-04 15:31, Peter Geis wrote:
> Good Day,
>
> This series introduces upstream kernel support for the Ouya game
> console device. Please review and apply. Thank you in advance.
Interesting patchset, maybe I can give my Ouya a second live now :-) Do
you happen to have (a link) t
On Tue, Oct 06, 2020 at 04:55:27PM +0100, Qais Yousef wrote:
> > +int cpumask_any_distribute(const struct cpumask *srcp)
> > +{
> > + int next, prev;
> > +
> > + /* NOTE: our first selection will skip 0. */
> > + prev = __this_cpu_read(distribute_cpu_mask_prev);
>
> We had a discussion then
Hello,
On Tue, Oct 6, 2020 at 8:11 PM Jiri Olsa wrote:
>
> On Tue, Oct 06, 2020 at 06:39:44AM +, Song Bao Hua (Barry Song) wrote:
>
> SNIP
>
> > > > Andi, thanks! Could you share the link or the commit ID? I'd like to
> > > > take a
> > > look at the fix.
> > > > I could still reproduce this
From: ching Huang
Use upper_32_bits() instead of dma_addr_hi32().
Signed-off-by: ching Huang
---
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c
index d13d672..55d85c9 100644
--- a/drivers/scsi/arcmsr/arcmsr_hba.c
+++ b/drivers/scsi/arcmsr/arcmsr_hba.c
@@ -653,
On Wed 2020-10-07 02:15:04, Sergey Senozhatsky wrote:
> On (20/10/06 18:35), Petr Mladek wrote:
> > > > Whatever is decided, I'd like to have it made official and documented to
> > > > avoid a similar problem in the future.
> >
> > Sigh, it is even bigger mess than I expected. There is a magic
> >
On 10/6/20 8:48 PM, Pratyush Yadav wrote:
> On 06/10/20 03:23PM, Bert Vermeulen wrote:
>> If a flash chip has more than 16MB capacity but its BFPT reports
>> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
>>
>> The check in spi_nor_set_addr_width() doesn't catch it becaus
From: ching Huang
Use round_up() instead of logical operation.
Reported-by: Martin K. Petersen
Signed-off-by: ching Huang
---
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c
index 55d85c9..1e358d9 100644
--- a/drivers/scsi/arcmsr/arcmsr_hba.c
+++ b/drivers/scs
Tuesday, October 6, 2020, 4:19:15 PM, Mauro Carvalho Chehab wrote:
>> diff --git a/Documentation/w1/slaves/w1_therm.rst
>> b/Documentation/w1/slaves/w1_therm.rst
>> index f1148181f53e..00376501a5ef 100644
>> --- a/Documentation/w1/slaves/w1_therm.rst
>> +++ b/Documentation/w1/slaves/w1_therm.rst
Raj,
On Sun, Oct 4, 2020 at 12:57 PM Raj, Ashok wrote:
>
> Hi Ethan
>
> On Sat, Oct 03, 2020 at 03:55:09AM -0400, Ethan Zhao wrote:
> > Hi,folks,
> >
> > This simple patch set fixed some serious security issues found when DPC
> > error injection and NVMe SSD hotplug brute force test were doing --
On Wed, Oct 07, 2020 at 12:13:27AM -0700, Kees Cook wrote:
> On Tue, Oct 06, 2020 at 05:52:20PM +0200, Christoph Hellwig wrote:
> > Hi WeiXiong, hi Kees,
> >
> > what is the use case for the code added in commit 17639f67c1d6
> > ("pstore/blk: Introduce backend for block devices").
> >
> > This s
On Tue, Oct 06, 2020 at 09:34:19PM -0700, Sean Christopherson wrote:
> On Wed, Oct 07, 2020 at 06:14:02AM +0300, Jarkko Sakkinen wrote:
> > On Tue, Oct 06, 2020 at 06:17:38PM -0700, Sean Christopherson wrote:
> > > On Wed, Oct 07, 2020 at 03:22:36AM +0300, Jarkko Sakkinen wrote:
> > > > > And then
arch_validate_prot() is a hook that can validate whether a given set of
protection flags is valid in an mprotect() operation. It is given the set
of protection flags and the address being modified.
However, the address being modified can currently not actually be used in
a meaningful way because:
sparc_validate_prot() is called from do_mprotect_pkey() as
arch_validate_prot(); it tries to ensure that an mprotect() call can't
enable ADI on incompatible VMAs.
The current implementation only checks that the VMA at the start address
matches the rules for ADI mappings; instead, check all VMAs tha
syzbot has found a reproducer for the following issue on:
HEAD commit:c85fb28b Merge tag 'arm64-fixes' of git://git.kernel.org/p..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=17406d7050
kernel config: https://syzkaller.appspot.com/x/.config?x=140446a
On Wed, 2020-10-07 at 00:54 +0200, Jann Horn wrote:
> Until now, the mmap lock of the nascent mm was ordered inside the mmap lock
> of the old mm (in dup_mmap() and in UML's activate_mm()).
> A following patch will change the exec path to very broadly lock the
> nascent mm, but fine-grained locking
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: d3d45f8220d60a0b2cf8fb2be4e6ffd9008e
commit: 2c855d73f2f6107f5b8ebc45f8b934bf7f4419e0 bnx2x: Remove read_status_t
function casts
config: x86_64-randconfig-m001-20201003 (attached as .config)
compiler: gc
Hi John,
url:
https://github.com/0day-ci/linux/commits/John-Stultz/dma-buf-Performance-improvements-for-system-heap-a-system-uncached-implementation/20201003-120520
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
bcf876870b95592b52519ed4aafcf9d95999bc9c
config: i386
On Fri, 25 Sep 2020 at 07:10, Jonathan Neuschäfer wrote:
>
> Enable the Netronix EC on the Kobo Aura ebook reader.
>
> Several features are still missing:
> - Frontlight/backlight. The vendor kernel drives the frontlight LED
>using the PWM output of the EC and an additional boost pin that
>
Lukas,
On Mon, Oct 5, 2020 at 3:13 AM Lukas Wunner wrote:
>
> On Sat, Oct 03, 2020 at 03:55:12AM -0400, Ethan Zhao wrote:
> > When root port has DPC capability and it is enabled, then triggered by
> > errors, DPC DLLSC and PDC etc interrupts will be sent to DPC driver, pciehp
> > drivers almost a
On 07/10/20 12:59PM, Vignesh Raghavendra wrote:
>
>
> On 10/6/20 8:48 PM, Pratyush Yadav wrote:
> > On 06/10/20 03:23PM, Bert Vermeulen wrote:
> >> If a flash chip has more than 16MB capacity but its BFPT reports
> >> BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
> >>
> >
Bjorn,
On Sun, Oct 4, 2020 at 12:44 AM Bjorn Helgaas wrote:
>
> On Sat, Oct 03, 2020 at 03:55:13AM -0400, Ethan Zhao wrote:
> > When uncorrectable error happens, AER driver and DPC driver interrupt
> > handlers likely call
> >
> >pcie_do_recovery()
> >->pci_walk_bus()
> > ->report_fr
On Tue, 6 Oct 2020 at 18:10, Christian Eggers wrote:
>
> According to the "VFxxx Controller Reference Manual" (and the comment
> block starting at line 97), Vybrid requires writing a one for clearing
> an interrupt flag. Syncing the method for clearing I2SR_IIF in
> i2c_imx_isr().
>
> Signed-off-b
On Tue, 6 Oct 2020 at 18:11, Christian Eggers wrote:
>
> Arbitration Lost (IAL) can happen after every single byte transfer. If
> arbitration is lost, the I2C hardware will autonomously switch from
> master mode to slave. If a transfer is not aborted in this state,
> consecutive transfers will not
Hi Peter,
pet...@infradead.org writes:
> After commit eb1f00237aca ("lockdep,trace: Expose tracepoints") the
> lock tracepoints are visible to lockdep and RCU-lockdep is finding a
> bunch more RCU violations that were previously hidden.
>
> Switch the idle->seqcount over to using raw_write_*() to
Provide thermal zone to read thermal sensor
in the SoC. We can read all the thermal sensors
value in the SoC by the node /sys/class/thermal/
In mtk_thermal_bank_temperature, return -EAGAIN instead of -EACCESS
on the first read of sensor that often are bogus values.
This can avoid following warning
m 308d530ee9c28c7c729a5020073405522d27e091 Mon Sep 17 00:00:00 2001
From: Michael Kao
Date: Wed, 7 Oct 2020 15:42:57 +0800
Subject: [v5 0/2] Add Mediatek thermal dirver and dtsi
This patchset supports for MT8183 chip to mtk_thermal.c.
Add thermal zone of all the thermal sensor in SoC for
another g
Rebase to kernel-5.9-rc1.
Update content:
- Remove the [v4,7/7] thermal: mediatek: use spinlock to protect PTPCORESEL
[2/2]
- Add the judgement to the version of raw_to_mcelsius.
Michael Kao (1):
arm64: dts: mt8183: add thermal zone node
thermal: mediatek: add another get_temp ops f
On Tue, Oct 06, 2020 at 09:35:33AM -0400, Theodore Y. Ts'o wrote:
> On Mon, Oct 05, 2020 at 10:03:06PM -0700, Josh Triplett wrote:
> > I'm not trying to create a problem here; I'm trying to address a whole
> > family of problems. I was generally under the impression that mounting
> > existing root
On 07/10/2020 07:02, Pawel Laszczak wrote:
Function cdns3_gadget_exit is used only in gadget.c file.
This patch removes declaration and definition of this
function from gadget-export.h file and makes it static.
Signed-off-by: Pawel Laszczak
Acked-by: Roger Quadros
---
drivers/usb/cdn
Hi Mark
thanks for reviewing this series.
On Tue, Oct 06, 2020 at 11:59:22AM +0100, Mark Brown wrote:
> On Mon, Oct 05, 2020 at 11:26:23PM +0100, Cristian Marussi wrote:
>
> > +An SCMI Regulator is permanently bound to a well defined SCMI Voltage
> > Domain,
> > +and should be always positione
On Wed, Oct 07, 2020 at 12:13:27AM -0700, Kees Cook wrote:
> On Tue, Oct 06, 2020 at 05:52:20PM +0200, Christoph Hellwig wrote:
> > Hi WeiXiong, hi Kees,
> >
> > what is the use case for the code added in commit 17639f67c1d6
> > ("pstore/blk: Introduce backend for block devices").
> >
> > This s
On Wed, Oct 07, 2020 at 10:39:23AM +0300, Jarkko Sakkinen wrote:
> On Tue, Oct 06, 2020 at 09:34:19PM -0700, Sean Christopherson wrote:
> > Even more hypothetical would be if Andy gets one of his wishes, and EENTER2
> > comes along that doesn't allow the enclave to dictate the exit point,
> > "retu
On 2020-10-06 21:39, Thomas Gleixner wrote:
On Tue, Oct 06 2020 at 11:11, Marc Zyngier wrote:
It appears that some HW is ugly enough that not all the interrupts
connected to a particular interrupt controller end up with the same
hierarchy repth (some of them are terminated early). This leaves
When the slave address is written in do_start(), SLAVE_ADDR is written
completely. This may overwrite some setting related to the clock rate
or signal filtering.
Fix this by writing only the bits related to slave address. To avoid
causing unexpected changed, explicitly disable filtering or high/lo
SCL rate appears to be different than what is expected. For example,
We get 164kHz on i2c3 of the vim3 when 400kHz is expected. This is
partially due to the peripheral clock being disabled when the clock is
set.
Let's keep the peripheral clock on after probe to fix the problem. This
does not affec
This patchset fixes various issues related to SCL rate on AML SoCs.
We retain the method which was used so far to set the SCL rate.
This method does not provide manual control of the clock duty cycle
but so far it does seems to be a problem for anyone.
Amlogic vendor kernel source uses "HIGH/LOW"
From: Nicolas Belin
Apparently, 15 cycles of the peripheral clock are used by the controller
for sampling and filtering. Because this was not known before, the rate
calculation is slightly off.
Clean up and fix the calculation taking this filtering delay into account.
Fixes: 30021e3707a7 ("i2c:
Pawel,
On 07/10/2020 06:35, Pawel Laszczak wrote:
On failure, the platform_get_irq_byname prints an error message
so, patch removes error message related to this function from
core.c file.
A change was suggested during reviewing CDNSP driver by Chunfeng Yun.
Signed-off-by: Pawel Laszczak
---
On Tuesday 06 October 2020 17:22:22 Bjorn Helgaas wrote:
> [+cc Krzysztof, Yinghai]
>
> On Wed, Sep 09, 2020 at 01:28:50PM +0200, Pali Rohár wrote:
> > Hello! I'm adding more people to loop.
> >
> > Can somebody look at these race conditions and my patch?
> >
> > On Friday 14 August 2020 10:08:2
Thank you for your reply.
new_dir->i_ctime = new_dir->i_mtime = new_dir->i_atime =
EXFAT_I(new_dir)->i_crtime = current_time(new_dir);
exfat_truncate_atime(&new_dir->i_atime);
- if (IS_DIRSYNC(new_dir))
- exfat_sync_inode(new_dir);
- else
On Wednesday 07 October 2020 12:47:40 Oliver O'Halloran wrote:
> On Wed, Oct 7, 2020 at 10:26 AM Bjorn Helgaas wrote:
> >
> > I'm not really a fan of this because pci_sysfs_init() is a bit of a
> > hack to begin with, and this makes it even more complicated.
> >
> > It's not obvious from the code
It was reported that perf stat crashed when using with armv8_pmu (cpu)
events with the task mode. As perf stat uses an empty cpu map for
task mode but armv8_pmu has its own cpu mask, it confused which map
should use when accessing file descriptors and caused segfaults:
(gdb) bt
#0 0x
Hi Marek,
On 20-10-06 14:11, Florian Fainelli wrote:
> On 10/6/2020 1:24 PM, Marek Vasut wrote:
...
> > If this happens on MX6 with FEC, can you please try these two patches?
> >
> > https://patchwork.ozlabs.org/project/netdev/patch/20201006135253.97395-1-ma...@denx.de/
> >
> > https://patchwo
Coccinelle utilises all available threads to implement parallelisation.
However, this results in a decrease in performance.
This patchset aims to improve performance by modifying cocciccheck to
use at most one thread per core by default in machines with more than 4
hyperthreads.
Sumera Priyadarsi
On Wed, Oct 7, 2020 at 9:22 AM Jason Gunthorpe wrote:
> On Tue, Oct 06, 2020 at 12:41:22PM +0200, Daniel Vetter wrote:
> > On Mon, Oct 05, 2020 at 08:56:50PM -0300, Jason Gunthorpe wrote:
> > > On Sun, Oct 04, 2020 at 06:43:36PM +0300, Leon Romanovsky wrote:
> > > > This series extends __sg_alloc_
On 07/10/2020 06:39, Pawel Laszczak wrote:
Patch removes not used variable 'length' from
cdns3_wa2_descmiss_copy_data function.
Signed-off-by: Pawel Laszczak
Fixes: commit 141e70fef4ee ("usb: cdns3: gadget: need to handle sg case for
workaround 2 case")
Acked-by: Roger Quadros
---
d
On Wednesday, 7 October 2020, 09:50:23 CEST, Krzysztof Kozlowski wrote:
> I replied to your v2 with testing, so what happened with all my tested tags?
I am quite new to the kernel development process. Seems that I should
integrate all "Tested-by" tags into following version of my patches.
In whi
gcc-10 optimizes the scheduler code differently than its predecessors,
depending on DEBUG_SECTION_MISMATCH=y config -- the config sets
-fno-inline-functions-called-once. Until now, __schedule contained the
usual prologue (push bp; mov sp,bp). ORC unwinder simply picked sp from
bp and unwound from _
Hi,
1. Keem Bay: in subject is wrong. Tools are working with it and you
should just use keembay: instead.
2. This should come first before actual change to keep the tree bisectable.
On 06. 10. 20 17:55, muhammad.husaini.zulki...@intel.com wrote:
> From: Muhammad Husaini Zulkifli
>
> Add header
By default, coccicheck utilizes all available threads to implement
parallelisation. However, when all available threads are used,
a decrease in performance is noted. The elapsed time is minimum
when at most one thread per core is used.
For example, on benchmarking the semantic patch kfree.cocci f
Greetings,
I want to inform you that my principal's family wishes to make huge financial
investment in your home Country on areas of oil and gas, real estate, tourism
and hotel,manufacturing and production company,agriculture,fishing, Mining &
Trading of natural resources such as crude oil, coal
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 22fbc037cd32e4e6771d2271b565806cfb8c134c
commit: 7d9c9b791f9e275b49870b6b10a1ea4d49209de8 ice: Implement LFC workaround
config: x86_64-randconfig-m001-20201003 (attached as .config)
compiler: gcc-9 (Debian 9.
This patchset modifies coccicheck to use at most one thread per core by
default in machines with more than 4 hyperthreads for optimal performance.
Modify documentation in coccinelle.rst to reflect the same.
Signed-off-by: Sumera Priyadarsini
---
Changes in V2:
Update scripts/coccicheck to
On 07/10/2020 9.53, Vinod Koul wrote:
> On 30-09-20, 12:14, Peter Ujfalusi wrote:
>> Glue layer users should use the device of the DMA for DMA mapping and
>> allocations as it is the DMA which accesses to descriptors and buffers,
>> not the clients
>>
>> Signed-off-by: Peter Ujfalusi
>> ---
>>
On Tue, 06 Oct 2020, Mauro Carvalho Chehab wrote:
> While not all EXPORT_SYMBOL*() symbols should be documented,
> it seems useful to have a tool which would help to check what
> symbols aren't documented.
>
> This is a first step on this direction. The tool has some
> limitations. Yet, it could b
From: Tony Luck
> Sent: 06 October 2020 22:09
>
> In the page fault case it is ok to see if a few more unaligned bytes
> can be copied from the source address. Worst case is that the page fault
> will be triggered again.
>
> Machine checks are more serious. Just give up at the point where the
> m
On 10/7/20 10:14 AM, Marco Felsch wrote:
> Hi Marek,
Hi,
[...]
> On 20-10-06 14:11, Florian Fainelli wrote:
>> On 10/6/2020 1:24 PM, Marek Vasut wrote:
>
> ...
>
>>> If this happens on MX6 with FEC, can you please try these two patches?
>>>
>>> https://patchwork.ozlabs.org/project/netdev/patch
On Tue 06-10-20 16:09:30, Ralph Campbell wrote:
> There are several places where ZONE_DEVICE struct pages assume a reference
> count == 1 means the page is idle and free. Instead of open coding this,
> add a helper function to hide this detail.
>
> Signed-off-by: Ralph Campbell
> Reviewed-by: Chr
On Wed, 7 Oct 2020 at 10:17, Christian Eggers wrote:
>
> On Wednesday, 7 October 2020, 09:50:23 CEST, Krzysztof Kozlowski wrote:
> > I replied to your v2 with testing, so what happened with all my tested tags?
>
> I am quite new to the kernel development process. Seems that I should
> integrate al
On Wed, Oct 7, 2020 at 9:42 AM Johannes Berg wrote:
> On Wed, 2020-10-07 at 00:54 +0200, Jann Horn wrote:
> > Until now, the mmap lock of the nascent mm was ordered inside the mmap lock
> > of the old mm (in dup_mmap() and in UML's activate_mm()).
> > A following patch will change the exec path to
Commit f19a11d40a78 ("dmaengine: xilinx: convert tasklets to use new
tasklet_setup() API") updated driver to use new tasklet_setup() API but
missed to update the documentation for the tasklet function.
Fixes: f19a11d40a78 ("dmaengine: xilinx: convert tasklets to use new
tasklet_setup() API")
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