On Thu, Oct 22, 2020 at 01:45:25PM +0200, Rafael J. Wysocki wrote:
> On Thursday, October 22, 2020 12:47:03 PM CEST Viresh Kumar wrote:
> > On 22-10-20, 09:11, Peter Zijlstra wrote:
> > > Well, but we need to do something to force people onto schedutil,
> > > otherwise we'll get more crap like
On Wed, Oct 21, 2020 at 06:50:28PM +, Edgecombe, Rick P wrote:
> On Tue, 2020-10-20 at 09:18 +0300, Kirill A. Shutemov wrote:
> > @@ -467,7 +477,7 @@ void iounmap(volatile void __iomem *addr)
> > p = find_vm_area((void __force *)addr);
> >
> > if (!p) {
> > -
On Thu, Oct 22, 2020 at 05:26:47AM +0200, Halil Pasic wrote:
> On Tue, 20 Oct 2020 09:18:57 +0300
> "Kirill A. Shutemov" wrote:
>
> > We cannot access protected pages directly. Use ioremap() to
> > create a temporary mapping of the page. The mapping is destroyed
> > on __kvm_unmap_gfn().
> >
>
On Thu, Oct 22, 2020 at 1:58 PM Peter Zijlstra wrote:
>
> On Thu, Oct 22, 2020 at 01:30:01PM +0200, Rafael J. Wysocki wrote:
>
> > Many people use intel_pstate in the active mode with HWP enabled too.
>
> We now have HWP-passive supported, afaict. So we should discourage that.
Which is kind of
On Sun, Oct 4, 2020 at 1:01 AM Randy Dunlap wrote:
>
> On 9/30/20 9:37 AM, Daniel Gutson wrote:
> > diff --git a/drivers/mtd/spi-nor/controllers/Kconfig
> > b/drivers/mtd/spi-nor/controllers/Kconfig
> > index 5c0e0ec2e6d1..e7eaef506fc2 100644
> > --- a/drivers/mtd/spi-nor/controllers/Kconfig
> >
Hi Linus,
another harmless cycle.
(sorry latest commit's message isn't great, I was half expecting a v2
but it didn't come and I remembered too late/didn't want to reword it
myself; and it's still worth taking as is)
Thanks,
The following changes since commit
On Wed, Oct 14, 2020 at 02:20:16PM -0700, Florian Fainelli wrote:
> In bcm2835_spi_remove(), spi_controller_unregister() will free the ctlr
> reference which will lead to an use after free in bcm2835_release_dma().
>
> To avoid this use after free, allocate the bcm2835_spi structure with a
>
On Thu, Oct 22, 2020 at 12:48:05PM +0200, Greg KH wrote:
> On Thu, Oct 22, 2020 at 11:36:40AM +0200, David Hildenbrand wrote:
> > On 22.10.20 11:32, David Laight wrote:
> > > From: David Hildenbrand
> > >> Sent: 22 October 2020 10:25
> > > ...
> > >> ... especially because I recall that clang and
[CC linux-pm and Len]
On Thursday, October 22, 2020 2:02:13 PM CEST Peter Zijlstra wrote:
> On Thu, Oct 22, 2020 at 01:45:25PM +0200, Rafael J. Wysocki wrote:
> > On Thursday, October 22, 2020 12:47:03 PM CEST Viresh Kumar wrote:
> > > On 22-10-20, 09:11, Peter Zijlstra wrote:
> > > > Well, but
On Wed, Oct 21, 2020 at 01:44:26PM -0700, Mike Kravetz wrote:
> Michal Privoznik was using "free page reporting" in QEMU/virtio-balloon
> with hugetlbfs and hit the warning below. QEMU with free page hinting
> uses fallocate(FALLOC_FL_PUNCH_HOLE) to discard pages that are reported
> as free by a
On Thu, 2020-10-22 at 10:46 +0200, Peter Zijlstra wrote:
> On Sun, May 31, 2020 at 08:24:51PM +0200, Giovanni Gherdovich wrote:
>
> Hi Giovanni!
>
> > +error:
> > + pr_warn("Scheduler frequency invariance went wobbly, disabling!\n");
> > + schedule_work(_freq_invariance_work);
> > +}
>
>
On Wed, 21 Oct 2020 at 14:35, Nicolas Saenz Julienne
wrote:
>
> Introduce of_dma_get_max_cpu_address(), which provides the highest CPU
> physical address addressable by all DMA masters in the system. It's
> specially useful for setting memory zones sizes at early boot time.
>
> Signed-off-by:
Signed-off-by: kernel test robot
---
pcengines-apuv2.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/platform/x86/pcengines-apuv2.c
b/drivers/platform/x86/pcengines-apuv2.c
index 45f7a89de2780c..2f579bf9917645 100644
---
Hi Ed,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on tip/master]
[also build test WARNING on linus/master linux/master
platform-drivers-x86/for-next v5.9 next-20201022]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when
do_poll()/do_select() seem to set the _qproc member of poll_table to
NULL the first time they are called on a given table, making subsequent
calls of poll_wait() on that table no-ops. This is a problem for mem2mem
which calls poll_wait() on the V4L2 queues' waitqueues only when a
queue-related
When attaching a new group to the container, let's use the new helper
vfio_iommu_find_iommu_group() to check if it's already attached. There
is no functional change.
Also take this chance to add a missing blank line.
Signed-off-by: Zenghui Yu
---
drivers/vfio/vfio_iommu_type1.c | 17
When use_hierarchy=1, SLAB objects which outlive their descendant
memcg are moved to their parent memcg where they may be uncharged
because charges are made recursively from leaf to root nodes.
However when use_hierarchy=0, they are reparented directly to root and
charging is not made
On Wed, Oct 21, 2020 at 10:25:48PM +0200, Thomas Gleixner wrote:
> On Tue, Oct 20 2020 at 20:07, Thomas Gleixner wrote:
> > On Tue, Oct 20 2020 at 12:18, Nitesh Narayan Lal wrote:
> >> However, IMHO we would still need a logic to prevent the devices from
> >> creating excess vectors.
> >
> >
On Thu, Oct 22, 2020 at 04:39:52PM +0800, Luo Jiaxing wrote:
> We already own DEFINE_SHOW_ATTRIBUTE() helper macro for defining attribute
> for read-only file, but we found many of drivers also want a helper marco for
> read-write file too.
DEFINE_SHOW_ATTRIBUTE is a bloody bad idea; let's not
On Thu, Oct 22, 2020 at 06:01:27PM +0800, Zhuoliang Zhang wrote:
> From: zhuoliang zhang
>
> we found that the following race condition exists in
> xfrm_alloc_userspi flow:
>
> user threadstate_hash_work thread
>
On Thu, Oct 22, 2020 at 02:19:29PM +0200, Rafael J. Wysocki wrote:
> > However I do want to retire ondemand, conservative and also very much
> > intel_pstate/active mode.
>
> I agree in general, but IMO it would not be prudent to do that without making
> schedutil provide the same level of
On Thu, Oct 22, 2020 at 02:21:58PM +0200, Giovanni Gherdovich wrote:
> On Thu, 2020-10-22 at 10:46 +0200, Peter Zijlstra wrote:
> > On Sun, May 31, 2020 at 08:24:51PM +0200, Giovanni Gherdovich wrote:
> >
> > Hi Giovanni!
> >
> > > +error:
> > > + pr_warn("Scheduler frequency invariance went
On Thu, Oct 08, 2020 at 01:41:57PM +0200, Vlastimil Babka wrote:
> We initialize boot-time pagesets with setup_pageset(), which sets high and
> batch values that effectively disable pcplists.
>
> We can remove this wrapper if we just set these values for all pagesets in
> pageset_init(). Non-boot
On Thu, 22 Oct 2020, Markus Elfring wrote:
> > A disjunction is applied by this script for the semantic patch language.
> > This construct uses short-circuit evaluation. It has got the consequence
> > that the last element of the specified condition will only be checked
> > if all previous
On Thu, Oct 22, 2020 at 12:54:52PM +0200, Kurt Kanzenbach wrote:
> On Wed Oct 21 2020, Florian Fainelli wrote:
> > On 10/21/2020 5:16 PM, Vladimir Oltean wrote:
> >> On Wed, Oct 21, 2020 at 08:52:01AM +0200, Kurt Kanzenbach wrote:
> >>> On Mon Oct 19 2020, Christian Eggers wrote:
> >>> The node
This patch adds the new binding documentation of msdc controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,msdc.yaml | 46 ++
1 file changed, 46 insertions(+)
create mode 100644
Add MT8192 msdc clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-msdc.c | 57 ++
3 files changed, 64 insertions(+)
create mode 100644
Add MT8192 basic clock providers, include topckgen, apmixedsys,
infracfg and pericfg.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig |8 +
drivers/clk/mediatek/Makefile |1 +
drivers/clk/mediatek/clk-mt8192.c | 1350 +
Add MT8192 vdecsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-vdec.c | 82 ++
3 files changed, 89 insertions(+)
create mode 100644
This patch adds the new binding documentation of imp i2c wrapper controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../arm/mediatek/mediatek,imp_iic_wrap.yaml| 78 ++
1 file changed, 78 insertions(+)
create mode 100644
changes since v3:
- add critical clocks
- split large patches into small ones
changes since v2:
- update and split dt-binding documents by functionalities
- add error checking in probe() function
- fix incorrect clock relation and add critical clocks
- update license identifier and minor fix of
This patch adds the new binding documentation of mdpsys controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,mdpsys.yaml | 38 ++
1 file changed, 38 insertions(+)
create mode 100644
Add MT8192 imp i2c wrapper n clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_n.c | 60
3 files changed, 67
Add MT8192 camsys rawc clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam_rawc.c | 59 ++
3 files changed, 66 insertions(+)
create
Add MT8192 audio clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 ++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-aud.c | 118 ++
3 files changed, 125 insertions(+)
create mode 100644
This patch adds the binding documentation of topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt | 1 +
Add MT8192 mmsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 ++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-mm.c | 108 +++
3 files changed, 115 insertions(+)
create mode 100644
Add MT8192 mdpsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-mdp.c | 89 +++
3 files changed, 96 insertions(+)
create mode 100644
Add MT8192 camsys rawa clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam_rawa.c | 59 ++
3 files changed, 66 insertions(+)
create
Add MT8192 ipesys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-ipe.c | 64 +++
3 files changed, 71 insertions(+)
create mode 100644
Add MT8192 imp i2c wrapper c clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_c.c | 62
3 files changed, 69
Add MT8192 imp i2c wrapper w clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_w.c | 59
3 files changed, 66
Add MT8192 camsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam.c | 72 +++
3 files changed, 79 insertions(+)
create mode 100644
This patch adds the new binding documentation of camsys raw controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,camsys-raw.yaml | 54 ++
1 file changed, 54 insertions(+)
create mode 100644
On Thu, Oct 08, 2020 at 01:41:58PM +0200, Vlastimil Babka wrote:
> pageset_update() attempts to update pcplist's high and batch values in a way
> that readers don't observe batch > high. It uses smp_wmb() to order the
> updates
> in a way to achieve this. However, without proper pairing read
syzbot suspects this issue was fixed by commit:
commit a7809ff90ce6c48598d3c4ab54eb599bec1e9c42
Author: Manivannan Sadhasivam
Date: Sat Sep 26 16:56:25 2020 +
net: qrtr: ns: Protect radix_tree_deref_slot() using rcu read locks
bisection log:
In fact, the en_mask is a combination of divider enable mask
and pll enable bit(bit0).
Before this patch, we enabled both divider mask and bit0 in prepare(),
but only cleared the bit0 in unprepare().
In the future, we hope en_mask will only be used as divider enable mask.
The enable register(CON0)
On 22.10.20 14:18, Greg KH wrote:
> On Thu, Oct 22, 2020 at 12:48:05PM +0200, Greg KH wrote:
>> On Thu, Oct 22, 2020 at 11:36:40AM +0200, David Hildenbrand wrote:
>>> On 22.10.20 11:32, David Laight wrote:
From: David Hildenbrand
> Sent: 22 October 2020 10:25
...
> ... especially
On Thu, Oct 08, 2020 at 07:55:02PM +0200, Vlastimil Babka wrote:
> Right, here's updated patch:
>
> 8<
> From 6ab0f03762d122a896349d5e568f75c20875eb42 Mon Sep 17 00:00:00 2001
> From: Vlastimil Babka
> Date: Mon, 7 Sep 2020 14:20:08 +0200
> Subject: [PATCH v2 5/7] mm, page_alloc: cache
On Thu, Oct 22, 2020 at 12:25:07AM -0700, Prashant Malani wrote:
> Hi Greg,
>
> On Thu, Oct 22, 2020 at 12:17 AM Greg KH wrote:
> >
> > > > > +What:
> > > > > /sys/class/typec/-partner/identity/product_type_vdo
> > > > > +Date:October 2020
> > > > > +Contact:
This patch adds the new binding documentation of scp adsp controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/arm/mediatek/mediatek,scp-adsp.yaml | 38 ++
1 file changed, 38 insertions(+)
create mode 100644
Add MT8192 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.
Signed-off-by: Weiyi Lu
---
include/dt-bindings/clock/mt8192-clk.h | 592 +
1 file changed, 592 insertions(+)
create mode 100644
Add MT8192 vencsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-venc.c | 60 ++
3 files changed, 67 insertions(+)
create mode 100644
Hi Linus,
Please pull below to receive modules updates for the v5.10 merge window.
Details can be found in the signed tag.
Thank you,
Jessica
--
The following changes since commit f75aef392f869018f78cfedf3c320a6b3fcfda6b:
Linux 5.9-rc3 (2020-08-30 16:01:54 -0700)
are available in the Git
In all MediaTek PLL design, bit0 of CON0 register is always
the enable bit.
However, there's a special case of usbpll on MT8192.
The enable bit of usbpll is moved to bit2 of other register.
Add configurable en_reg and pll_en_bit for enable control or
default 0 where pll data are static variables.
Add MT8192 imp i2c wrapper ws clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_ws.c | 61 +++
3 files changed, 68
Add MT8192 scp adsp clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 57 ++
3 files changed, 64 insertions(+)
create mode
This patch adds the new binding documentation of vdecsys soc controller
for Mediatek MT8192.
Signed-off-by: Weiyi Lu
---
.../arm/mediatek/mediatek,vdecsys-soc.yaml | 38 ++
1 file changed, 38 insertions(+)
create mode 100644
Add MT8192 msdc top clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-msdc_top.c | 71 ++
3 files changed, 78 insertions(+)
create mode
Add MT8192 mfgcfg clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-mfg.c | 57 +++
3 files changed, 64 insertions(+)
create mode 100644
Hi Kai-Chuan,
On Thu, 22 Oct 2020 14:40:47 +0800, kaichuan.hs...@canonical.com wrote:
> From: Kai-Chuan Hsieh
>
> Some Dell platforms rely on modalias to customize configuration,
> the product sku can be more specific for the hardware.
>
> Add product_sku to modalias for better utilization.
Add MT8192 imgsys clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-img.c | 60 +++
3 files changed, 67 insertions(+)
create mode 100644
Add MT8192 imp i2c wrapper e clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_e.c | 59
3 files changed, 66
Add MT8192 imp i2c wrapper s clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile| 1 +
drivers/clk/mediatek/clk-mt8192-imp_iic_wrap_s.c | 61
3 files changed, 68
Add MT8192 camsys rawb clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-cam_rawb.c | 59 ++
3 files changed, 66 insertions(+)
create
Add MT8192 imgsys2 clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-img2.c | 62 ++
3 files changed, 69 insertions(+)
create mode 100644
On Thu, Oct 08, 2020 at 01:42:00PM +0200, Vlastimil Babka wrote:
> Currently, pcplists are drained during set_migratetype_isolate() which means
> once per pageblock processed start_isolate_page_range(). This is somewhat
> wasteful. Moreover, the callers might need different guarantees, and the
>
Add MT8192 vdecsys soc clock provider
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8192-vdec_soc.c | 82 ++
3 files changed, 89 insertions(+)
create
Add power domains controller node for SoC mt8192
Signed-off-by: Weiyi Lu
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 201 +++
1 file changed, 201 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index
For some power domain, like conn on MT8192, it should be default OFF.
Because the power on/off control relies the function of connectivity chip
and its firmware. And if project choose other chip vendor solution,
those necessary connectivity functions will not provided.
Signed-off-by: Weiyi Lu
Add power domains dt-bindings for MT8192.
Signed-off-by: Weiyi Lu
---
.../bindings/power/mediatek,power-controller.yaml | 1 +
include/dt-bindings/power/mt8192-power.h | 32 ++
2 files changed, 33 insertions(+)
create mode 100644
This series is based on v5.9-rc1, MT8192 clock v4[1] and
soc: mediatek: pm-domains: Add new driver for SCPSYS power domains controller[2]
[1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=368799
[2] https://patchwork.kernel.org/project/linux-mediatek/list/?series=358429
change
Add the needed board data to support mt8192 SoC.
Signed-off-by: Weiyi Lu
---
drivers/soc/mediatek/mtk-pm-domains.c | 290 +-
include/linux/soc/mediatek/infracfg.h | 56 +++
2 files changed, 345 insertions(+), 1 deletion(-)
diff --git
On 2020-10-22 17:02, Peter Zijlstra wrote:
On Thu, Oct 22, 2020 at 04:27:52PM +0530, Sai Prakash Ranjan wrote:
Looking at the ETR and other places in the kernel, ETF and the
ETB are the only places trying to dereference the task(owner)
in tmc_enable_etf_sink_perf() which is also called from
Hi Tian,
CC tglx
On Wed, Oct 21, 2020 at 2:15 PM Tian Tao wrote:
> The code has been in a irq-disabled context since it is hard IRQ. There
> is no necessity to do it again.
>
> Signed-off-by: Tian Tao
Thanks for your patch!
Is this also true if CONFIG_PREEMPT_RT=y, and all irq handlers
On Thu, Oct 08, 2020 at 01:42:01PM +0200, Vlastimil Babka wrote:
> Memory offline relies on page isolation can race with process freeing pages to
> pcplists in a way that a page from isolated pageblock can end up on pcplist.
> This can be worked around by repeated draining of pcplists, as done by
On Tue, Oct 20, 2020 at 03:52:45PM -0300, Marcelo Tosatti wrote:
> On Thu, Oct 15, 2020 at 01:40:53AM +0200, Frederic Weisbecker wrote:
> > Alternatively, we could rely on p->on_rq which is set to TASK_ON_RQ_QUEUED
> > at wake up time, prior to the schedule() full barrier. Of course that
> >
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8173.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8173.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt2701.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt2701.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt7629.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7629.c
Because all pll data has been updated. We no longer allow
en_mask is a combination of pll_en_bit and div_en_mask.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-pll.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/mediatek/clk-pll.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8183.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8183.c
This series is based on v5.9-rc1 and
[v4,09/34] clk: mediatek: Fix asymmetrical PLL enable and disable control[1]
in Mediatek MT8192 clock support series
[1]
https://patchwork.kernel.org/project/linux-mediatek/patch/1603370247-30437-10-git-send-email-weiyi...@mediatek.com/
Weiyi Lu (12):
clk:
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8135.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8135.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt7622.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt8516.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt8516.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt6797.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6797.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt6765.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6765.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt6779.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt6779.c
remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask
that only used for pll dividers.
Signed-off-by: Weiyi Lu
---
drivers/clk/mediatek/clk-mt2712.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git
On Thu, Oct 22, 2020 at 12:03:19PM +0200, Jaroslav Kysela wrote:
> Dne 22. 10. 20 v 11:50 Maxime Ripard napsal(a):
>
> > So, I'm not really sure what I'm supposed to do here. The drivers
> > involved don't appear to be doing anything extraordinary, but the issues
> > lockdep report are definitely
On Thu, Oct 22, 2020 at 02:42:24PM +0200, David Hildenbrand wrote:
> On 22.10.20 14:18, Greg KH wrote:
> > On Thu, Oct 22, 2020 at 12:48:05PM +0200, Greg KH wrote:
> >> On Thu, Oct 22, 2020 at 11:36:40AM +0200, David Hildenbrand wrote:
> >>> On 22.10.20 11:32, David Laight wrote:
> From:
MHP_MEMMAP_ON_MEMORY tells the system that we want the memmap
pagetables to be built from the hot-added range.
Signed-off-by: Oscar Salvador
---
include/linux/memory_hotplug.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/linux/memory_hotplug.h
Physical memory hotadd has to allocate a memmap (struct page array) for
the newly added memory section. Currently, alloc_pages_node() is used
for those allocations.
This has some disadvantages:
a) an existing memory is consumed for that purpose
(eg: ~2MB per 128MB memory section on x86_64)
This patch introduces a new Vmemmap page-type so we can better
picture and handle those kind of pages.
Signed-off-by: Oscar Salvador
---
include/linux/mm.h | 6 ++
include/linux/mm_types.h | 5 +
include/linux/page-flags.h | 6 ++
3 files changed, 17 insertions(+)
diff
This patchset would be the next version of [1], but a lot has changed
in the meantime, so I figured I would just make another RFC.
After some discussions with David off the list, we agreed that it would be
easier as a starter to only support memmap from hotadded memory if the hotadded
range
On 22/10/20 03:34, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Per KVM_GET_SUPPORTED_CPUID ioctl documentation:
>
> This ioctl returns x86 cpuid features which are supported by both the
> hardware and kvm in its default configuration.
>
> A well-behaved userspace should not set the bit if it is
Hi Geert,
Thank you for the review.
On Thu, Oct 22, 2020 at 12:43 PM Geert Uytterhoeven
wrote:
>
> Hi Prabhakar,
>
> On Wed, Oct 14, 2020 at 4:56 PM Lad Prabhakar
> wrote:
> > Enable VIN instances along with OV5640 as endpoints on the adapter board.
> >
> > Signed-off-by: Lad Prabhakar
> >
> This does not go without saying that the patchset is not 100% complete.
> It is missing:
>
> - a way to disable memmap_on_memory (either sysfs or boot_time cmd)
> - atm, arch_add_memory for s390 screams if an altmap is passed.
>I am still thinking of a way to nicely drop handle that.
>
make use of devm_of_platform_populate to remove some redundant code!
Signed-off-by: Srinivas Kandagatla
---
sound/soc/qcom/qdsp6/q6adm.c | 10 +-
sound/soc/qcom/qdsp6/q6afe.c | 10 +-
sound/soc/qcom/qdsp6/q6asm.c | 9 +
3 files changed, 3 insertions(+), 26 deletions(-)
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