On 17/04/21 1:33 am, Roman Gushchin wrote:
On Sat, Apr 17, 2021 at 01:14:03AM +0530, Pratik Sampat wrote:
On 17/04/21 12:39 am, Roman Gushchin wrote:
On Sat, Apr 17, 2021 at 12:11:37AM +0530, Pratik Sampat wrote:
On 17/04/21 12:04 am, Roman Gushchin wrote:
On Fri, Apr 16, 2021 at 11:57:03
On 17/04/21 3:17 am, Dennis Zhou wrote:
Hello,
On Sat, Apr 17, 2021 at 01:14:03AM +0530, Pratik Sampat wrote:
On 17/04/21 12:39 am, Roman Gushchin wrote:
On Sat, Apr 17, 2021 at 12:11:37AM +0530, Pratik Sampat wrote:
On 17/04/21 12:04 am, Roman Gushchin wrote:
On Fri, Apr 16, 2021 at 11:
Looks good to me and I like the cleanup.
For the series:
Reviewed-by: William Kucharski
> On Apr 16, 2021, at 5:15 PM, Matthew Wilcox (Oracle)
> wrote:
>
> [I'm told that patches 2-6 did not make it to the list; resending and
> cc'ing lkml this time]
>
> While working on various solutions t
'kasprintf()' can replace a kmalloc/strcpy/strcat sequence.
It is less verbose and avoid the use of a magic number (64).
Anyway, the underlying 'alloc_workqueue()' would only keep the 24 first
chars (i.e. sizeof(struct workqueue_struct->name) = WQ_NAME_LEN).
Signed-off-by: Christophe JAILLET
---
Hi,
'staging:' in mail subject is missing...
On Fri, Apr 16, 2021 at 05:20:41PM +0300, Andy Shevchenko wrote:
> The custom ->reset() repeats the generic one, replace it.
>
> Note, in newer kernels the context of the function is a sleeping one,
> it's fine to switch over to the sleeping functions
On Sat, Apr 17, 2021 at 06:44:40AM +0200, Eric Dumazet wrote:
> On Sat, Apr 17, 2021 at 2:31 AM David Ahern wrote:
> >
> > [ cc author of 648700f76b03b7e8149d13cc2bdb3355035258a9 ]
>
> I think this has been discussed already. There is no strategy that
> makes IP reassembly units immune to DDOS at
Issue was traffic problems after a while with increased ping times if
flow offload is active. It turns out that key_offset with cookie is
needed in rhashtable_params but was re-assigned to head_offset.
Fix the assignment.
Fixes: 502e84e2382d ("net: ethernet: mtk_eth_soc: add flow offloading suppor
randconfig-a003-20210417
x86_64 randconfig-a002-20210417
x86_64 randconfig-a005-20210417
x86_64 randconfig-a001-20210417
x86_64 randconfig-a006-20210417
x86_64 randconfig-a004-20210417
riscvnommu_k210_defconfig
Dear Friend,
Greetings!
How are you with your family today? I hope both of you are in good
health decently, I know that this message might meet you in utmost
surprise as we never know each other before. I am Mr. Dabire Basole a
banker by profession, I need your urgent assist in transferring the
s
On Sat, 17 Apr 2021 00:07:23 +0100
"Matthew Wilcox (Oracle)" wrote:
> 32-bit architectures which expect 8-byte alignment for 8-byte integers
> and need 64-bit DMA addresses (arc, arm, mips, ppc) had their struct
> page inadvertently expanded in 2019. When the dma_addr_t was added,
> it forced th
Tested on Bananapi-r2 (please see my mt7623 patch for supporting offloading)
with ~300 iperf3 iterations and uptime >6h
Tested-by: Frank Wunderlich
regards Frank
On Fri, Apr 16, 2021 at 2:00 PM Arend Van Spriel
wrote:
>
> On 4/15/2021 12:47 PM, Shawn Guo wrote:
> > With any regulatory domain requests coming from either user space or
> > 802.11 IE (Information Element), the country is coded in ISO3166
> > standard. It needs to be translated to firmware cou
On Sat, Apr 17, 2021 at 12:42:39AM -0700, Keyu Man wrote:
> How about at least allow the existing queue to finish? Currently a tiny new
> fragment would potentially invalid all previous fragments by letting them
> timeout without allowing the fragments to come in to finish the assembly.
Because th
With any regulatory domain requests coming from either user space or
802.11 IE (Information Element), the country is coded in ISO3166
standard. It needs to be translated to firmware country code and
revision with the mapping info in settings->country_codes table.
Support populate country_codes tab
commit a55749639dc1 ("ia64: drop marked broken DISCONTIGMEM and
VIRTUAL_MEM_MAP")
drop VIRTUAL_MEM_MAP, so there is no need HOLES_IN_ZONE on ia64.
Also move HOLES_IN_ZONE into mm/Kconfig, select it if architecture needs
this feature.
Signed-off-by: Kefeng Wang
---
arch/arm64/Kconfig | 4 +---
Hi David, Nico,
On 17/04/2021 06:24, David Gow wrote:
Hi Matt,
Like patch 1/6, I can apply it in MPTCP tree and send it later to
net-next with other patches.
Except if you guys prefer to apply it in KUnit tree and send it to
linux-next?
Given 1/6 is going to net-next, it makes sense to send
Le 16/04/2021 à 01:49, Alexei Starovoitov a écrit :
On Thu, Apr 15, 2021 at 8:41 AM Quentin Monnet wrote:
2021-04-15 16:37 UTC+0200 ~ Daniel Borkmann
On 4/15/21 11:32 AM, Jianlin Lv wrote:
For debugging JITs, dumping the JITed image to kernel log is discouraged,
"bpftool prog dump jited"
* Dario Binacchi [210414 20:40]:
> > Il 12/04/2021 09:41 Tero Kristo ha scritto:
> > The change on the DT itself would be pretty large, removing all clock
> > nodes and modifying any existing handles towards the clock nodes, and
> > this would impact all OMAP architectures.
> >
> > Anyways, it
On 2021/3/30 22:54, Marc Zyngier wrote:
+int kvm_arch_ptp_init(void)
+{
+ int ret;
+
+ ret = kvm_arm_hyp_service_available(ARM_SMCCC_KVM_FUNC_PTP);
+ if (ret <= 0)
kvm_arm_hyp_service_available() returns boolean. Maybe write as ?
bool ret;
ret = kvm_arm_hyp_s
On Sat, 2021-04-17 at 06:57 +0200, Daniel Lezcano wrote:
> On 14/04/2021 07:52, Matti Vaittinen wrote:
> > Thermal core contains a logic for safety shutdown. System is
> > attempted to
> > be powered off if temperature exceeds safety limits.
> >
> > Currently this can be also utilized by regulato
Hi Daniel,
Thank you for the review. Much appreciated!
On Sat, 2021-04-17 at 07:32 +0200, Daniel Lezcano wrote:
> On 14/04/2021 07:52, Matti Vaittinen wrote:
> > Thermal core contains a logic for safety shutdown. System is
> > attempted to
> > be powered off if temperature exceeds safety limits.
Hi David,
On 4/17/21 5:12 AM, David E. Box wrote:
> From: Gayatri Kammela
>
> Platforms that support low power modes (LPM) such as Tiger Lake maintain
> requirements for each sub-state that a readable in the PMC. However, unlike
> LPM status registers, requirement registers are not memory mapped
On 2021/3/30 22:54, Marc Zyngier wrote:
+PTP_KVM support for arm/arm64
+=
+
+PTP_KVM is used for high precision time sync between host and guests.
+It relies on transferring the wall clock and counter value from the
+host to the guest using a KVM-specific hypercall.
+
Hi,
On 4/17/21 5:12 AM, David E. Box wrote:
> From: Gayatri Kammela
>
> Platforms that support low power modes (LPM) such as Tiger Lake maintain
> requirements for each sub-state that a readable in the PMC. However, unlike
> LPM status registers, requirement registers are not memory mapped but a
On Sat, 17 Apr 2021 09:42:37 +0100,
Zenghui Yu wrote:
>
> On 2021/3/30 22:54, Marc Zyngier wrote:
> > +int kvm_arch_ptp_init(void)
> > +{
> > + int ret;
> > +
> > + ret = kvm_arm_hyp_service_available(ARM_SMCCC_KVM_FUNC_PTP);
> > + if (ret <= 0)
>
> kvm_arm_hyp_service_available() returns
From: Bharat Jauhari
Currently the user cannot interpret the PLL information based on index
as its exposed as an integer.
This commit exposes ASIC specific PLL indexes and maps it to a generic
FW compatible index.
Signed-off-by: Bharat Jauhari
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabb
On Sat, Apr 17, 2021 at 02:47:46PM +0800, kernel test robot wrote:
>kernel/sched/topology.c: In function 'sched_debug_setup':
> >> kernel/sched/topology.c:17:2: error: 'sched_debug_verbose' undeclared
> >> (first use in this function); did you mean 'sched_debug_setup'?
> 17 | sched_debu
From: Moti Haimovski
On PLDM, in case of NIC hangs, the ELBI reset to take much longer than
expected. As a result an increase in the ELBI reset timeout is required.
Signed-off-by: Moti Haimovski
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/common/pci/pci.c
From: Ohad Sharabi
Start the skeleton for the dynamic F/W load by marking current preboot
code path as legacy.
Signed-off-by: Ohad Sharabi
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/common/firmware_if.c | 79
drivers/misc/habanalabs/c
From: Alon Mizrahi
Use mmu cache range invalidation instead of entire cache invalidation
because it yields better performance.
In GOYA and GAUDI, always use entire cache invalidation because these
ASICs don't support range invalidation.
Signed-off-by: Alon Mizrahi
Reviewed-by: Oded Gabbay
Sig
From: Ohad Sharabi
This refactor is needed due to the dynamic FW load in which requesting
the FW file (and getting its attributes) is not immediately followed by
copying FW file content.
Signed-off-by: Ohad Sharabi
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/misc/habanala
Update the firmware files to the latest from the firmware team.
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/include/common/cpucp_if.h | 4 +++-
drivers/misc/habanalabs/include/common/hl_boot_if.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/hab
From: Ohad Sharabi
Replace multiple arguments to init device CPU function by passing
firmware loader managing structure that is initialized per ASIC with
the loader parameters.
In addition, the FW loader management structure is now part of the
habanalabs device, this way the loader parameters wi
On Sat, 17 Apr 2021 09:59:39 +0100,
Zenghui Yu wrote:
>
> On 2021/3/30 22:54, Marc Zyngier wrote:
> > +PTP_KVM support for arm/arm64
> > +=
> > +
> > +PTP_KVM is used for high precision time sync between host and guests.
> > +It relies on transferring the wall clock an
Thanks Nathan,
I have already a pending patch that fixes this issue:
https://lkml.org/lkml/2021/4/17/73
On Thu, Apr 15, 2021 at 5:17 PM Nathan Chancellor wrote:
>
> On Sun, Mar 21, 2021 at 10:11:29PM +0200, Oded Gabbay wrote:
> > From: Ohad Sharabi
> >
> > In order to use minimum of hard coded v
Hi,
On 4/17/21 5:12 AM, David E. Box wrote:
> - Patch 1 and 2 remove the use of the global struct pmc_dev
> - Patches 3-7 add support for reading low power mode sub-state
> requirements, latching sub-state status on different low power mode
> events, and displaying the sub-state residency in m
Patch adds initial json/events for POWER10.
Signed-off-by: Kajol Jain
---
.../perf/pmu-events/arch/powerpc/mapfile.csv | 1 +
.../arch/powerpc/power10/cache.json | 47 +++
.../arch/powerpc/power10/floating_point.json | 7 +
.../arch/powerpc/power10/frontend.json| 217 +++
If we read all FF from the boot status register, then something is
totally wrong and there is no point of reading specific errors.
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/common/firmware_if.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/misc
This error indicates a problem in the security initialization inside
the f/w so we need to stop the device loading because it won't be
usable.
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/common/firmware_if.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/dr
In case firmware has a bug and erroneously reports a status error
(e.g. device unusable) during boot, allow the user to tell the driver
to continue the boot regardless of the error status.
This will be done via kernel parameter which exposes a mask. The
user that loads the driver can decide exactl
Applied, thanks!
On 2021/3/30 22:54, Marc Zyngier wrote:
- u64 cycles;
- ktime_t real;
- ktime_t raw;
- unsigned intclock_was_set_seq;
- u8 cs_was_changed_seq;
+ u64 cycles;
+ ktime_t real;
+
On 4/17/21 5:05 AM, Muchun Song wrote:
> On Sat, Apr 17, 2021 at 12:08 AM Peter Enderborg
> wrote:
>> This adds a total used dma-buf memory. Details
>> can be found in debugfs, however it is not for everyone
>> and not always available. dma-buf are indirect allocated by
>> userspace. So with this
Hi Zhou,
Le sam. 17 avril 2021 à 0:13, 周琰杰 (Zhou Yanjie)
a écrit :
1.In the JZ4740 part, remove pointless "lcd-no-pins", use
"lcd-special"
and "lcd-generic" instead "lcd-18bit-tft". Currently, in the
mainline,
no other devicetree out there is using the "lcd-18bit-tft" ABI, so
we
shoul
We will use percpu-refcount to serialize against concurrent swapoff. This
patch adds the percpu_ref support for swap.
Signed-off-by: Miaohe Lin
---
include/linux/swap.h | 3 +++
mm/swapfile.c| 33 +
2 files changed, 32 insertions(+), 4 deletions(-)
diff
When I was investigating the swap code, I found the below possible race
window:
CPU 1 CPU 2
- -
do_swap_page
swap_readpage(skip swap cache case)
if (data_race(sis->flags & SWP_FS_OPS)) {
Use percpu_ref to serialize against concurrent swapoff. Also remove the
SWP_VALID flag because it's used together with RCU solution.
Signed-off-by: Miaohe Lin
---
include/linux/swap.h | 3 +--
mm/swapfile.c| 43 +--
2 files changed, 18 insertions(
Hi all,
When I was investigating the swap code, I found some possible race
windows. This series aims to fix all these races. But using current
get/put_swap_device() to guard against concurrent swapoff for
swap_readpage() looks terrible because swap_readpage() may take really
long time. And to reduc
While we released the pte lock, somebody else might faulted in this pte.
So we should check whether it's swap pte first to guard against such race
or swp_type would be unexpected. But the swap_entry isn't used in this
function and we will have enough checking when we really operate the PTE
entries
When I was investigating the swap code, I found the below possible race
window:
CPU 1 CPU 2
- -
shmem_swapin
swap_cluster_readahead
if (likely(si->flags & (SWP_BLKDEV | SWP_FS_OPS))) {
Hi Zhou,
Le sam. 17 avril 2021 à 0:14, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4730 SoC from Ingenic.
This driver is derived from Paul Boddie. It is worth to
noting that the JZ4730 SoC is special in having two control
registers (upper/lower), so
On 2021/3/30 22:54, Marc Zyngier wrote:
#define SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED 1
I think it'd be better to keep this definition together with other
wa Function IDs. It's only a cosmetic comment anyway.
Zenghui
Hi Zhou,
Le sam. 17 avril 2021 à 0:14, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4750 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Use "lcd-special" and "l
Dne 01. 03. 21 v 14:05 Ruslan Bilovol napsal(a):
> +static void u_audio_set_fback_frequency(enum usb_device_speed speed,
> + unsigned int freq, void *buf)
> +{
> + u32 ff = 0;
> +
> + if (speed == USB_SPEED_FULL) {
> + /*
> + * Fu
Hi Zhou,
Le sam. 17 avril 2021 à 0:14, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4755 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
Cheers,
-Paul
---
Notes:
v3:
New patc
Hi Zhou,
Le sam. 17 avril 2021 à 0:14, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
JZ4775 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
Reviewed-by: Paul Cercueil
Cheers,
-Paul
---
Notes:
v3:
New patc
Hi Zhou,
Le sam. 17 avril 2021 à 0:14, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the pinctrl-ingenic driver on the
X2000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Andy Shevchenko
---
Notes:
v3:
New patch.
v3->v4:
1.Split lcd pins into severa
On Sat, Apr 17 2021 at 01:02, Thomas Gleixner wrote:
> On Fri, Apr 16 2021 at 15:37, Kees Cook wrote:
>
>> On Fri, Apr 16, 2021 at 03:20:17PM -0700, Andy Lutomirski wrote:
>>> But obviously there is code that needs real function pointers. How
>>> about making this a first-class feature, or at leas
On 16.04.2021 16:35, Thomas Bogendoerfer wrote:
On Fri, Apr 16, 2021 at 12:29:46PM +0300, Sergei Shtylyov wrote:
On 16.04.2021 11:52, Thomas Bogendoerfer wrote:
Add device tree bindings for ethernet controller integrated into
IDT 79RC3243x SoCs.
Signed-off-by: Thomas Bogendoerfer
---
.../
Add maintainer for driver and documentation of HiSilicon PTT device.
Signed-off-by: Yicong Yang
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7fdc513..647f0bf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8084,6 +8084,13 @@ W: h
Add tune function for the HiSilicon Tune and Trace device. The interface
of tune is also exposed through debugfs.
Signed-off-by: Yicong Yang
---
drivers/hwtracing/hisilicon/hisi_ptt.c | 187 +
1 file changed, 187 insertions(+)
diff --git a/drivers/hwtracing/hisil
[RESEND with perf and coresight folks Cc'ed]
HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex
integrated Endpoint (RCiEP) device, providing the capability
to dynamically monitor and tune the PCIe traffic (tune),
and trace the TLP headers (trace).
PTT tune is designed for monitori
HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex
integrated Endpoint(RCiEP) device, providing the capability
to dynamically monitor and tune the PCIe traffic(tune),
and trace the TLP headers(trace).
Add the driver for the device to enable the trace function. The driver
will create
Document the introduction and usage of HiSilicon PTT device driver.
Signed-off-by: Yicong Yang
---
Documentation/trace/hisi-ptt.rst | 326 +++
1 file changed, 326 insertions(+)
create mode 100644 Documentation/trace/hisi-ptt.rst
diff --git a/Documentation/tr
On 2021/4/17 17:10, Marc Zyngier wrote:
On Sat, 17 Apr 2021 09:59:39 +0100,
Zenghui Yu wrote:
On 2021/3/30 22:54, Marc Zyngier wrote:
+PTP_KVM support for arm/arm64
+=
+
+PTP_KVM is used for high precision time sync between host and guests.
+It relies on transferri
On Fri, Apr 16, 2021 at 05:00:40PM +0200, Miquel Raynal wrote:
> Hi Dan,
>
> Dan Carpenter wrote on Wed, 14 Apr 2021
> 08:56:33 +0300:
>
> > We should return an error code if the timing mode is not acknowledged
> > by the NAND chip.
>
> This truly is questionable (and I am not yet decided wheth
First:
This patch comes from cocinelle warning.
Second:
BUG_ON uses unlikely in if(). Through disassembly, we can see that
brk #0x800 is compiled to the end of the function.
As you can see below:
..
ff8008660bec: d65f03c0ret
ff8008660bf0: d421brk #0x800
Usu
On Fri, Apr 16, 2021 at 5:27 PM Matthew Wilcox wrote:
> diff --git a/include/net/page_pool.h b/include/net/page_pool.h
> index b5b195305346..db7c7020746a 100644
> --- a/include/net/page_pool.h
> +++ b/include/net/page_pool.h
> @@ -198,7 +198,17 @@ static inline void page_pool_recycle_direct(struct
syzbot suspects this issue was fixed by commit:
commit 363eaa3a450abb4e63bd6e3ad79d1f7a0f717814
Author: Shuah Khan
Date: Tue Mar 30 01:36:51 2021 +
usbip: synchronize event handler with sysfs code paths
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=16c89e91d0
start
This adds a total used dma-buf memory. Details
can be found in debugfs, however it is not for everyone
and not always available. dma-buf are indirect allocated by
userspace. So with this value we can monitor and detect
userspace applications that have problems.
Signed-off-by: Peter Enderborg
---
On 4/16/21 7:58 PM, K, Narendra wrote:
-Original Message-
From: Niklas Schnelle
Sent: Thursday, April 15, 2021 12:55 PM
To: Bjorn Helgaas
Cc: K, Narendra; Viktor Mihajlovski; Stefan Raspl; Peter Oberparleiter; linux-
net...@vger.kernel.org; linux-...@vger.kernel.org; linux-
ker...@vge
On Wednesday 14 April 2021 16:20:51 bpe...@marvell.com wrote:
> From: Ben Peled
>
> In PCIE ISR routine caused by RST_LINK_DOWN
> we schedule work to handle the link-down procedure.
> Link-down procedure will:
> 1. Remove PCIe bus
> 2. Reset the MAC
> 3. Reconfigure link back up
> 4. Rescan PCIe
Hi,
This is better I think.
Muhammad Usama Anjum writes:
> @@ -894,6 +891,10 @@ int open_cached_dir(unsigned int xid, struct cifs_tcon
> *tcon,
>
> /* BB TBD check to see if oplock level check can be removed below */
> if (o_rsp->OplockLevel == SMB2_OPLOCK_LEVEL_LEASE) {
> +
From: Matthew Wilcox
> Sent: 16 April 2021 16:28
>
> On Thu, Apr 15, 2021 at 08:08:32PM +0200, Jesper Dangaard Brouer wrote:
> > See below patch. Where I swap32 the dma address to satisfy
> > page->compound having bit zero cleared. (It is the simplest fix I could
> > come up with).
>
> I think t
Am 17.04.21 um 12:40 schrieb Peter Enderborg:
This adds a total used dma-buf memory. Details
can be found in debugfs, however it is not for everyone
and not always available. dma-buf are indirect allocated by
userspace. So with this value we can monitor and detect
userspace applications that have
On Fri, Apr 16, 2021 at 9:28 PM Bartosz Golaszewski
wrote:
> On Wed, Apr 14, 2021 at 4:45 PM Srinivas Neeli wrote:
> > > From: Bartosz Golaszewski
> > > Sent: Tuesday, April 13, 2021 4:14 PM
> > > On Sat, Apr 10, 2021 at 12:08 AM Andy Shevchenko
> > > wrote:
...
> > > Yep, this has been like
From: Matteo Croce
> Sent: 16 April 2021 23:44
...
> > A more interesting change would be something that generated:
> > unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
> > for (i = 0; i < nr_frags; i++) {
> > since that will run faster for most loops.
> > But that is ~impossible
On Fri, Apr 16, 2021 at 07:08:29PM +0100, Matthew Wilcox wrote:
> On Fri, Apr 16, 2021 at 07:18:48PM +0200, Peter Zijlstra wrote:
> > On Fri, Apr 16, 2021 at 07:10:17PM +0200, Miguel Ojeda wrote:
> >
> > > Of course, UB is only a subset of errors, but it is a major one, and
> > > particularly crit
On 4/17/21 12:59 PM, Christian König wrote:
> Am 17.04.21 um 12:40 schrieb Peter Enderborg:
>> This adds a total used dma-buf memory. Details
>> can be found in debugfs, however it is not for everyone
>> and not always available. dma-buf are indirect allocated by
>> userspace. So with this value we
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
Changed
---
arch/arm/boot/dts/rk3066a.dtsi | 6 +++---
1 file changed, 3 in
Fix power-controller node names for dtbs_check.
Convert power domain documentation to json-schema.
Add a meaningful power domain name.
Support power domain function for RK3568 Soc.
Changed in V9:
[PATCH v9 13/15]:
Rename definitions to $defs
Restyle patternProperties
Changed in V8:
Add #pow
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3188.dtsi | 6 +++---
1 file changed, 3 insertions(+),
Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3066a.dtsi | 3 +++
arch/arm/boot/dts/rk3188.dtsi | 3 +++
arch/arm/boot/dts/rk3288.dtsi | 4
3 files changed, 10 insertions(+)
diff --git a/a
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 16
1 file change
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3288.dtsi | 8
1 file changed, 4 insertions(+)
Add #power-domain-cells to power domain nodes, because they
are required by power-domain.yaml
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 8
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 3 +++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 +
From: Elaine Zhang
Add the power domains names to the power domain info struct so we
have meaningful name for every power domain.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix TAB warning
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 221 +
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 6 +++---
1 file changed, 3 inse
From: Elaine Zhang
According to a description from TRM, add all the power domains
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
Acked-by: Rob Herring
---
include/dt-bindings/power/rk3568-power.h | 32
1 file chan
From: Elaine Zhang
Use more generic names (as recommended in the device tree specification
or the binding documentation)
Signed-off-by: Elaine Zhang
Reviewed-by: Enric Balletbo i Serra
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40 -
The compatible strings below are already in use in the Rockchip
dtsi files, but were somehow never added to a document, so add
"rockchip,px30-pmu", "syscon", "simple-mfd"
"rockchip,rk3288-pmu", "syscon", "simple-mfd"
"rockchip,rk3328-pmu", "syscon", "simple-mfd"
"rockchip,rk3399-pmu", "syscon", "s
From: Elaine Zhang
Add the compatible string for RK3568 SoC.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
Acked-by: Rob Herring
---
Changed V8:
Add pd-node ref schema
---
Documentation/devicetree/bindings/power/rockchip,power-controller.yaml | 2 ++
1 file changed, 2 insertions(
From: Elaine Zhang
Add power-domains found on rk3568 socs.
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Changed V7:
Fix alignment
---
drivers/soc/rockchip/pm_domains.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/soc/rockchip/pm
Current dts files with 'pmu' nodes are manually verified.
In order to automate this process pmu.txt
has to be converted to yaml.
Signed-off-by: Johan Jonker
Reviewed-by: Rob Herring
---
.../devicetree/bindings/arm/rockchip/pmu.txt | 16 ---
.../devicetree/bindings/arm/rockchip/pmu.yam
From: Enric Balletbo i Serra
Convert the soc/rockchip/power_domain.txt binding document to
json-schema and move to the power bindings directory.
Signed-off-by: Enric Balletbo i Serra
Signed-off-by: Elaine Zhang
Signed-off-by: Johan Jonker
---
Note for rob+dt:
A tag was not added on purpose, b
On Fri, Apr 16, 2021 at 01:38:38PM -0700, Sami Tolvanen wrote:
> From: Kees Cook
>
> Instead of using inline asm for the int3 selftest (which confuses the
> Clang's ThinLTO pass), this restores the C function but disables KASAN
> (and tracing for good measure) to keep the things simple and avoid
From: Maciej W. Rozycki
> Sent: 16 April 2021 11:49
>
> On Thu, 15 Apr 2021, Joe Perches wrote:
>
> > In patch 2, vscnprintf should probably be used to make sure it's
> > 0 terminated.
>
> Why? C99 has this[1]:
>
> "The vsnprintf function is equivalent to snprintf, with the variable
> argumen
The following commit has been merged into the sched/core branch of tip:
Commit-ID: 9406415f46f6127fd31bb66f0260f7a61a8d2786
Gitweb:
https://git.kernel.org/tip/9406415f46f6127fd31bb66f0260f7a61a8d2786
Author:Peter Zijlstra
AuthorDate:Thu, 15 Apr 2021 18:23:17 +02:00
Committ
Fix the build warning:
drivers/pci/quirks.c: In function ‘quirk_amd_nvme_fixup’:
drivers/pci/quirks.c:312:18: warning: unused variable ‘rdev’ [-Wunused-variable]
struct pci_dev *rdev;
^~~~
Fixes: 9597624ef606 ('nvme: put some AMD PCIE downstream NVME device to simple
suspend/
On Sat, Apr 17, 2021 at 01:17:21PM +0200, Peter Zijlstra wrote:
> Well, I think the rules actually make sense, at the point in the syntax
> tree where + happens, we have 'unsigned char' and 'int', so at that
> point we promote to 'int'. Subsequently 'int' gets shifted and bad
> things happen.
That
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