[tip:perf/urgent] uprobes: Fix uprobes on MIPS, allow for a cache flush after ixol breakpoint creation

Commit-ID: 297e765e390a2ac996000b5f7228cbd84d995174 Gitweb: http://git.kernel.org/tip/297e765e390a2ac996000b5f7228cbd84d995174 Author: Marcin Nowakowski AuthorDate: Tue, 13 Dec 2016 11:40:57 +0100 Committer: Ingo Molnar CommitDate: Sun,

[tip:perf/urgent] uprobes: Fix uprobes on MIPS, allow for a cache flush after ixol breakpoint creation

Commit-ID: 297e765e390a2ac996000b5f7228cbd84d995174 Gitweb: http://git.kernel.org/tip/297e765e390a2ac996000b5f7228cbd84d995174 Author: Marcin Nowakowski AuthorDate: Tue, 13 Dec 2016 11:40:57 +0100 Committer: Ingo Molnar CommitDate: Sun, 18 Dec 2016 09:42:11 +0100 uprobes: Fix uprobes

Re: [PATCH v4 1/5] pinctrl: aspeed: dt: Fix compatibles for the System Control Unit

On Tue, Dec 20, 2016 at 6:05 PM, Andrew Jeffery wrote: > Reference the SoC-specific compatible string in the examples as > required. > > Signed-off-by: Andrew Jeffery Acked-by: Joel Stanley > --- >

Re: [PATCH v4 1/5] pinctrl: aspeed: dt: Fix compatibles for the System Control Unit

On Tue, Dec 20, 2016 at 6:05 PM, Andrew Jeffery wrote: > Reference the SoC-specific compatible string in the examples as > required. > > Signed-off-by: Andrew Jeffery Acked-by: Joel Stanley > --- > Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 11 --- > 1 file

Re: [GIT PULL] MFD for v4.10

On Mon, 19 Dec 2016, Linus Torvalds wrote: > On Mon, Dec 19, 2016 at 3:47 AM, Lee Jones wrote: > > > > git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git HEAD > > Nothing there. > > I'm assuming you meant the "for-linus-4.10" tag. Yes. Brain malfunction trying

Re: [GIT PULL] MFD for v4.10

On Mon, 19 Dec 2016, Linus Torvalds wrote: > On Mon, Dec 19, 2016 at 3:47 AM, Lee Jones wrote: > > > > git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git HEAD > > Nothing there. > > I'm assuming you meant the "for-linus-4.10" tag. Yes. Brain malfunction trying to get the PR out too

[PATCH v4 3/5] pinctrl: aspeed-g4: Add mux configuration for all pins

The patch introducing the g4 pinctrl driver implemented a smattering of pins to flesh out the implementation of the core and provide bare-bones support for some OpenPOWER platforms. Now, update the bindings document to reflect the complete functionality and implement the necessary pin

[PATCH v4 3/5] pinctrl: aspeed-g4: Add mux configuration for all pins

The patch introducing the g4 pinctrl driver implemented a smattering of pins to flesh out the implementation of the core and provide bare-bones support for some OpenPOWER platforms. Now, update the bindings document to reflect the complete functionality and implement the necessary pin

[PATCH v4 2/5] pinctrl: aspeed: Read and write bits in LPC and GFX controllers

The System Control Unit IP block in the Aspeed SoCs is typically where the pinmux configuration is found, but not always. A number of pins depend on state in one of LPC Host Control (LHC) or SoC Display Controller (GFX) IP blocks, so the Aspeed pinmux drivers should have the means to adjust these

[PATCH v4 4/5] pinctrl: aspeed-g5: Add mux configuration for all pins

The patch introducing the g5 pinctrl driver implemented a smattering of pins to flesh out the implementation of the core and provide bare-bones support for some OpenPOWER platforms and the AST2500 evaluation board. Now, update the bindings document to reflect the complete functionality and

[PATCH v4 2/5] pinctrl: aspeed: Read and write bits in LPC and GFX controllers

The System Control Unit IP block in the Aspeed SoCs is typically where the pinmux configuration is found, but not always. A number of pins depend on state in one of LPC Host Control (LHC) or SoC Display Controller (GFX) IP blocks, so the Aspeed pinmux drivers should have the means to adjust these

[PATCH v4 4/5] pinctrl: aspeed-g5: Add mux configuration for all pins

The patch introducing the g5 pinctrl driver implemented a smattering of pins to flesh out the implementation of the core and provide bare-bones support for some OpenPOWER platforms and the AST2500 evaluation board. Now, update the bindings document to reflect the complete functionality and

[PATCH v4 5/5] pinctrl: aspeed: Fix kerneldoc return descriptions

Signed-off-by: Andrew Jeffery Acked-by: Joel Stanley --- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c

[PATCH v4 5/5] pinctrl: aspeed: Fix kerneldoc return descriptions

Signed-off-by: Andrew Jeffery Acked-by: Joel Stanley --- drivers/pinctrl/aspeed/pinctrl-aspeed.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index 782c5c97f853..76f62bd45f02

[PATCH v4 0/5] pinctrl: aspeed: Implement remaining pins

Hi Linus, This is v4 of the series implementing the remainder of the pinmux tables for the AST2400 and AST2500 SoCs. v3 of the series can be found here: https://lkml.org/lkml/2016/12/5/847 Cheers, Andrew Changes since v3: * Add a patch fixing the AST2400 SCU compatible strings in the

[PATCH v4 0/5] pinctrl: aspeed: Implement remaining pins

Hi Linus, This is v4 of the series implementing the remainder of the pinmux tables for the AST2400 and AST2500 SoCs. v3 of the series can be found here: https://lkml.org/lkml/2016/12/5/847 Cheers, Andrew Changes since v3: * Add a patch fixing the AST2400 SCU compatible strings in the

[PATCH v4 1/5] pinctrl: aspeed: dt: Fix compatibles for the System Control Unit

Reference the SoC-specific compatible string in the examples as required. Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git

[PATCH v4 1/5] pinctrl: aspeed: dt: Fix compatibles for the System Control Unit

Reference the SoC-specific compatible string in the examples as required. Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 20 December 2016 at 15:18, Lu Baolu wrote: > Hi, > > On 12/20/2016 02:46 PM, Baolin Wang wrote: >> On 20 December 2016 at 14:39, Lu Baolu wrote: >>> Hi, >>> >>> On 12/20/2016 02:06 PM, Baolin Wang wrote: Hi, On 20

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 20 December 2016 at 15:18, Lu Baolu wrote: > Hi, > > On 12/20/2016 02:46 PM, Baolin Wang wrote: >> On 20 December 2016 at 14:39, Lu Baolu wrote: >>> Hi, >>> >>> On 12/20/2016 02:06 PM, Baolin Wang wrote: Hi, On 20 December 2016 at 12:29, Lu Baolu wrote: > Hi Mathias,

Re: [PATCH 2/4] mmc: mmc: Add change to set controller to HS400 frequency in enhanced strobe

On 2016/12/20 13:53, Ritesh Harjani wrote: Currently mmc_select_hs400es is not setting the desired frequency before sending switch command. This makes CMD13 to timeout on some controllers. Thus add a change to set the desired HS400 frequency in mmc_select_hs400es when the timing is switched to

Re: [PATCH 2/4] mmc: mmc: Add change to set controller to HS400 frequency in enhanced strobe

On 2016/12/20 13:53, Ritesh Harjani wrote: Currently mmc_select_hs400es is not setting the desired frequency before sending switch command. This makes CMD13 to timeout on some controllers. Thus add a change to set the desired HS400 frequency in mmc_select_hs400es when the timing is switched to

Re: [PATCH v3 2/5] lib: Add Sed-opal library

> + u8 lr; > + size_t key_name_len; > + char key_name[36]; Who is going to use the key_name? I can't find another reference to it anywhere else in the code. The reason why this tripped me off was the hardcoded length so I was going to check on how access to it is bounds checked. >

Re: [PATCH v3 2/5] lib: Add Sed-opal library

> + u8 lr; > + size_t key_name_len; > + char key_name[36]; Who is going to use the key_name? I can't find another reference to it anywhere else in the code. The reason why this tripped me off was the hardcoded length so I was going to check on how access to it is bounds checked. >

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 12/20/2016 02:46 PM, Baolin Wang wrote: > On 20 December 2016 at 14:39, Lu Baolu wrote: >> Hi, >> >> On 12/20/2016 02:06 PM, Baolin Wang wrote: >>> Hi, >>> >>> On 20 December 2016 at 12:29, Lu Baolu wrote: Hi Mathias, On

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 12/20/2016 02:46 PM, Baolin Wang wrote: > On 20 December 2016 at 14:39, Lu Baolu wrote: >> Hi, >> >> On 12/20/2016 02:06 PM, Baolin Wang wrote: >>> Hi, >>> >>> On 20 December 2016 at 12:29, Lu Baolu wrote: Hi Mathias, On 12/19/2016 08:13 PM, Mathias Nyman wrote: > On

[PATCH v4 5/5] mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX)

The Aspeed SoC Display Controller is presented as a syscon device to arbitrate access by display and pinmux drivers. Video pinmux configuration on fifth generation SoCs depends on bits in both the System Control Unit and the Display Controller. Signed-off-by: Andrew Jeffery

[PATCH v4 4/5] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LHC)

The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends on bits in both the System Control Unit and the LPC Host Controller. The Aspeed LPC Host Controller is described as a child node of the LPC host-range syscon device for arbitration of access by the host controller and pinmux

[PATCH v4 5/5] mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX)

The Aspeed SoC Display Controller is presented as a syscon device to arbitrate access by display and pinmux drivers. Video pinmux configuration on fifth generation SoCs depends on bits in both the System Control Unit and the Display Controller. Signed-off-by: Andrew Jeffery Acked-by: Rob Herring

[PATCH v4 4/5] mfd: dt: Add bindings for the Aspeed LPC Host Controller (LHC)

The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends on bits in both the System Control Unit and the LPC Host Controller. The Aspeed LPC Host Controller is described as a child node of the LPC host-range syscon device for arbitration of access by the host controller and pinmux

[PATCH v4 1/5] mfd: dt: Fix "indicates" typo in mfd bindings document

Signed-off-by: Andrew Jeffery Acked-by: Linus Walleij Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/mfd.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH v4 2/5] mfd: dt: ranges, #address-cells and #size-cells as optional properties

Whilst describing a device and not a bus, simple-mfd is modelled on simple-bus where child nodes are iterated and registered as platform devices. Some complex devices, e.g. the Aspeed LPC controller, can benefit from address space mapping such that child nodes can use the regs property to describe

[PATCH v4 3/5] mfd: dt: Add Aspeed Low Pin Count Controller bindings

Signed-off-by: Andrew Jeffery Reviewed-by: Linus Walleij Reviewed-by: Joel Stanley Acked-by: Rob Herring --- .../devicetree/bindings/mfd/aspeed-lpc.txt | 111 + 1 file changed, 111

[PATCH v4 1/5] mfd: dt: Fix "indicates" typo in mfd bindings document

Signed-off-by: Andrew Jeffery Acked-by: Linus Walleij Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/mfd.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/mfd.txt b/Documentation/devicetree/bindings/mfd/mfd.txt index

[PATCH v4 2/5] mfd: dt: ranges, #address-cells and #size-cells as optional properties

Whilst describing a device and not a bus, simple-mfd is modelled on simple-bus where child nodes are iterated and registered as platform devices. Some complex devices, e.g. the Aspeed LPC controller, can benefit from address space mapping such that child nodes can use the regs property to describe

[PATCH v4 3/5] mfd: dt: Add Aspeed Low Pin Count Controller bindings

Signed-off-by: Andrew Jeffery Reviewed-by: Linus Walleij Reviewed-by: Joel Stanley Acked-by: Rob Herring --- .../devicetree/bindings/mfd/aspeed-lpc.txt | 111 + 1 file changed, 111 insertions(+) create mode 100644

[PATCH v4 0/5] mfd: dt: Add bindings for the Aspeed MFDs

Hi Lee, Here's v4 of the Aspeed LPC MFD devicetree bindings series. v3 can be found at: https://lkml.org/lkml/2016/12/5/835 Changes since v3: * Based on Arnd's argument[1], drop the addition of the mfd/syscon bindings directory as well as the the last patch in v3, which moved a number of

[PATCH v4 0/5] mfd: dt: Add bindings for the Aspeed MFDs

Hi Lee, Here's v4 of the Aspeed LPC MFD devicetree bindings series. v3 can be found at: https://lkml.org/lkml/2016/12/5/835 Changes since v3: * Based on Arnd's argument[1], drop the addition of the mfd/syscon bindings directory as well as the the last patch in v3, which moved a number of

Re: [PATCH] staging: lustre: ldlm: use designated initializers

On Mon, Dec 19, 2016 at 08:47:50AM -0800, Bruce Korb wrote: > On Mon, Dec 19, 2016 at 8:22 AM, James Simmons > >> --- a/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c > >> +++ b/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c > >> @@ -143,7 +143,7 @@ static int ldlm_process_flock_lock(struct

Re: [PATCH] staging: lustre: ldlm: use designated initializers

On Mon, Dec 19, 2016 at 08:47:50AM -0800, Bruce Korb wrote: > On Mon, Dec 19, 2016 at 8:22 AM, James Simmons > >> --- a/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c > >> +++ b/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c > >> @@ -143,7 +143,7 @@ static int ldlm_process_flock_lock(struct

Re: [tip:x86/urgent] x86/cpu: Probe CPUID leaf 6 even when cpuid_level == 6

On 12/19/16 02:56, tip-bot for Andy Lutomirski wrote: > Commit-ID: 3df8d9208569ef0b2313e516566222d745f3b94b > Gitweb: http://git.kernel.org/tip/3df8d9208569ef0b2313e516566222d745f3b94b > Author: Andy Lutomirski > AuthorDate: Thu, 15 Dec 2016 10:14:42 -0800 > Committer:

Re: [tip:x86/urgent] x86/cpu: Probe CPUID leaf 6 even when cpuid_level == 6

On 12/19/16 02:56, tip-bot for Andy Lutomirski wrote: > Commit-ID: 3df8d9208569ef0b2313e516566222d745f3b94b > Gitweb: http://git.kernel.org/tip/3df8d9208569ef0b2313e516566222d745f3b94b > Author: Andy Lutomirski > AuthorDate: Thu, 15 Dec 2016 10:14:42 -0800 > Committer: Thomas Gleixner

Re: [PATCH v18 0/4] Introduce usb charger framework to deal with the usb gadget power negotation

Hi Neil, On 3 November 2016 at 09:25, NeilBrown wrote: > On Tue, Nov 01 2016, Baolin Wang wrote: > > >>> So I won't be responding on this topic any further until I see a genuine >>> attempt to understand and resolve the inconsistencies with >>> usb_register_notifier(). >> >> Any

Re: [PATCH v18 0/4] Introduce usb charger framework to deal with the usb gadget power negotation

Hi Neil, On 3 November 2016 at 09:25, NeilBrown wrote: > On Tue, Nov 01 2016, Baolin Wang wrote: > > >>> So I won't be responding on this topic any further until I see a genuine >>> attempt to understand and resolve the inconsistencies with >>> usb_register_notifier(). >> >> Any better solution?

Klientskie bazy dannih! Uznaite podrobnee! Skype: prodawez390 Email: prodawez...@gmail.com tel +79139230330 (whatsapp\viber\telegram) Soberem dlja Vas po internet bazu dannyh potencial'nyh klientov d

Klientskie bazy dannih!!! Uznaite podrobnee po Skype: prodawez390 Email: prodawez...@gmail.com tel +79139230330 (whatsapp\viber\telegram) Soberem dlja Vas po internet bazu dannyh potencial'nyh klientov dlja Vashego Biznesa Mnogo! Bystro! Nedorogo! Uznajte podrobnee na kartinke

Klientskie bazy dannih! Uznaite podrobnee! Skype: prodawez390 Email: prodawez...@gmail.com tel +79139230330 (whatsapp\viber\telegram) Soberem dlja Vas po internet bazu dannyh potencial'nyh klientov d

Klientskie bazy dannih!!! Uznaite podrobnee po Skype: prodawez390 Email: prodawez...@gmail.com tel +79139230330 (whatsapp\viber\telegram) Soberem dlja Vas po internet bazu dannyh potencial'nyh klientov dlja Vashego Biznesa Mnogo! Bystro! Nedorogo! Uznajte podrobnee na kartinke

Re: [PATCH] drm/mediatek: Support UYVY and YUYV format for overlay

Hi Bibby, On Wed, 2016-12-14 at 13:14 +0800, Bibby Hsieh wrote: > MT8173 overlay can support UYVY and YUYV format, > we add the format in DRM driver. > > Signed-off-by: Bibby Hsieh > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 ++ >

Re: [PATCH] drm/mediatek: Support UYVY and YUYV format for overlay

Hi Bibby, On Wed, 2016-12-14 at 13:14 +0800, Bibby Hsieh wrote: > MT8173 overlay can support UYVY and YUYV format, > we add the format in DRM driver. > > Signed-off-by: Bibby Hsieh > --- > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 ++ > drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++ >

Re: [PATCH v3 2/5] lib: Add Sed-opal library

On Mon, Dec 19, 2016 at 12:35:46PM -0700, Scott Bauer wrote: > +int fdev_sed_ioctl(struct file *filep, unsigned int cmd, > +unsigned long arg) > +{ > + struct sed_key key; > + struct sed_context *sed_ctx; > + > + if (!capable(CAP_SYS_ADMIN)) > + return

Re: [PATCH v3 2/5] lib: Add Sed-opal library

On Mon, Dec 19, 2016 at 12:35:46PM -0700, Scott Bauer wrote: > +int fdev_sed_ioctl(struct file *filep, unsigned int cmd, > +unsigned long arg) > +{ > + struct sed_key key; > + struct sed_context *sed_ctx; > + > + if (!capable(CAP_SYS_ADMIN)) > + return

[PATCH] arm64/dts/ls2080a-rdb: remove disable status of pca9547

pca9547 won't probed since its status property is disabled. while there are devices connected to it, we need remove status property to let ds3232 and adt7461 probed correctly. Signed-off-by: Meng Yi --- arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 1 - 1 file changed, 1

[PATCH] arm64/dts/ls2080a-rdb: remove disable status of pca9547

pca9547 won't probed since its status property is disabled. while there are devices connected to it, we need remove status property to let ds3232 and adt7461 probed correctly. Signed-off-by: Meng Yi --- arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 1 - 1 file changed, 1 deletion(-) diff

Re: [PATCH v3 4/5] nvme: Implement resume_from_suspend and SED Allocation code.

> +void nvme_unlock_from_suspend(struct nvme_ctrl *ctrl) > +{ > + if (opal_unlock_from_suspend(>sed_ctx)) > + pr_warn("Failed to unlock one or more locking ranges!\n"); > +} > +EXPORT_SYMBOL_GPL(nvme_unlock_from_suspend); I don't think we even need this wrapper. Also for the

Re: [PATCH v3 4/5] nvme: Implement resume_from_suspend and SED Allocation code.

> +void nvme_unlock_from_suspend(struct nvme_ctrl *ctrl) > +{ > + if (opal_unlock_from_suspend(>sed_ctx)) > + pr_warn("Failed to unlock one or more locking ranges!\n"); > +} > +EXPORT_SYMBOL_GPL(nvme_unlock_from_suspend); I don't think we even need this wrapper. Also for the

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

On 20 December 2016 at 14:39, Lu Baolu wrote: > Hi, > > On 12/20/2016 02:06 PM, Baolin Wang wrote: >> Hi, >> >> On 20 December 2016 at 12:29, Lu Baolu wrote: >>> Hi Mathias, >>> >>> On 12/19/2016 08:13 PM, Mathias Nyman wrote: On

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

On 20 December 2016 at 14:39, Lu Baolu wrote: > Hi, > > On 12/20/2016 02:06 PM, Baolin Wang wrote: >> Hi, >> >> On 20 December 2016 at 12:29, Lu Baolu wrote: >>> Hi Mathias, >>> >>> On 12/19/2016 08:13 PM, Mathias Nyman wrote: On 19.12.2016 13:34, Baolin Wang wrote: > Hi Mathias, >

Re: [PATCH v3 1/5] include: Add definitions for sed

On Mon, Dec 19, 2016 at 12:35:45PM -0700, Scott Bauer wrote: > This patch adds the definitions and structures for the SED > Opal code. This seems to contain a few things: userspace ABIs, on the wire defintions, and prototypes for the code added in patch 2. The userspace ABIs should be a header

Re: [PATCH v3 1/5] include: Add definitions for sed

On Mon, Dec 19, 2016 at 12:35:45PM -0700, Scott Bauer wrote: > This patch adds the definitions and structures for the SED > Opal code. This seems to contain a few things: userspace ABIs, on the wire defintions, and prototypes for the code added in patch 2. The userspace ABIs should be a header

Re: [PATCH v2] fscrypt: Factor out bio specific functions

Hi, > On 19.12.2016, at 12:25, Richard Weinberger wrote: > > That way we can get rid of the direct dependency on CONFIG_BLOCK. > > Reported-by: Arnd Bergmann > Reported-by: Randy Dunlap > Suggested-by: Christoph Hellwig

Re: [PATCH v2] fscrypt: Factor out bio specific functions

Hi, > On 19.12.2016, at 12:25, Richard Weinberger wrote: > > That way we can get rid of the direct dependency on CONFIG_BLOCK. > > Reported-by: Arnd Bergmann > Reported-by: Randy Dunlap > Suggested-by: Christoph Hellwig > Fixes: d475a507457b ("ubifs: Add skeleton for fscrypto") >

[PATCH v3 4/6] powerpc/perf: Add event attribute and group to IMC pmus

Device tree IMC driver code parses the IMC units and their events. It passes the information to IMC pmu code which is placed in powerpc/perf as "imc-pmu.c". This patch creates only event attributes and attribute groups for the IMC pmus. Cc: Madhavan Srinivasan Cc:

[PATCH v3 3/6] powerpc/powernv: Detect supported IMC units and its events

Parse device tree to detect IMC units. Traverse through each IMC unit node to find supported events and corresponding unit/scale files (if any). Right now, only nest IMC units are supported. The nest IMC unit event node from device tree will contain the offset in the reserved memory region to get

[PATCH v3 4/6] powerpc/perf: Add event attribute and group to IMC pmus

Device tree IMC driver code parses the IMC units and their events. It passes the information to IMC pmu code which is placed in powerpc/perf as "imc-pmu.c". This patch creates only event attributes and attribute groups for the IMC pmus. Cc: Madhavan Srinivasan Cc: Michael Ellerman Cc: Benjamin

[PATCH v3 3/6] powerpc/powernv: Detect supported IMC units and its events

Parse device tree to detect IMC units. Traverse through each IMC unit node to find supported events and corresponding unit/scale files (if any). Right now, only nest IMC units are supported. The nest IMC unit event node from device tree will contain the offset in the reserved memory region to get

[PATCH v3 6/6] powerpc/perf: IMC pmu cpumask and cpu hotplug support

Adds cpumask attribute to be used by each IMC pmu. Only one cpu (any online CPU) from each chip for nest PMUs is designated to read counters. On CPU hotplug, dying CPU is checked to see whether it is one of the designated cpus, if yes, next online cpu from the same chip (for nest units) is

[PATCH v3 6/6] powerpc/perf: IMC pmu cpumask and cpu hotplug support

Adds cpumask attribute to be used by each IMC pmu. Only one cpu (any online CPU) from each chip for nest PMUs is designated to read counters. On CPU hotplug, dying CPU is checked to see whether it is one of the designated cpus, if yes, next online cpu from the same chip (for nest units) is

[PATCH v3 2/6] powerpc/powernv: Autoload IMC device driver module

This patch does three things : - Enables "opal.c" to create a platform device for the IMC interface according to the appropriate compatibility string. - Find the reserved-memory region details from the system device tree and get the base address of HOMER region address for each chip. - We

[PATCH v3 0/6] IMC Instrumentation Support

Power 9 has In-Memory-Collection (IMC) infrastructure which contains various Performance Monitoring Units (PMUs) at Nest level (these are on-chip but off-core). These Nest PMU counters are handled by a Nest IMC microcode. This microcode runs in the OCC (On-Chip Controller) complex and its purpose

[PATCH v3 1/6] powerpc/powernv: Data structure and macros definitions

Create new header file "imc-pmu.h" to add the data structures and macros needed for IMC pmu support. Cc: Madhavan Srinivasan Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton

[PATCH v3 5/6] powerpc/perf: Generic imc pmu event functions

Since, the IMC counters' data are periodically fed to a memory location, the functions to read/update, start/stop, add/del can be generic and can be used by all IMC PMU units. This patch adds a set of generic imc pmu related event functions to be used by each imc pmu unit. Add code to setup

[PATCH v3 1/6] powerpc/powernv: Data structure and macros definitions

Create new header file "imc-pmu.h" to add the data structures and macros needed for IMC pmu support. Cc: Madhavan Srinivasan Cc: Michael Ellerman Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Anton Blanchard Cc: Sukadev Bhattiprolu Cc: Michael Neuling Cc: Stewart Smith Cc: Daniel

[PATCH v3 5/6] powerpc/perf: Generic imc pmu event functions

Since, the IMC counters' data are periodically fed to a memory location, the functions to read/update, start/stop, add/del can be generic and can be used by all IMC PMU units. This patch adds a set of generic imc pmu related event functions to be used by each imc pmu unit. Add code to setup

[PATCH v3 2/6] powerpc/powernv: Autoload IMC device driver module

This patch does three things : - Enables "opal.c" to create a platform device for the IMC interface according to the appropriate compatibility string. - Find the reserved-memory region details from the system device tree and get the base address of HOMER region address for each chip. - We

[PATCH v3 0/6] IMC Instrumentation Support

Power 9 has In-Memory-Collection (IMC) infrastructure which contains various Performance Monitoring Units (PMUs) at Nest level (these are on-chip but off-core). These Nest PMU counters are handled by a Nest IMC microcode. This microcode runs in the OCC (On-Chip Controller) complex and its purpose

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 12/20/2016 02:06 PM, Baolin Wang wrote: > Hi, > > On 20 December 2016 at 12:29, Lu Baolu wrote: >> Hi Mathias, >> >> On 12/19/2016 08:13 PM, Mathias Nyman wrote: >>> On 19.12.2016 13:34, Baolin Wang wrote: Hi Mathias, On 19 December 2016 at 18:33,

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 12/20/2016 02:06 PM, Baolin Wang wrote: > Hi, > > On 20 December 2016 at 12:29, Lu Baolu wrote: >> Hi Mathias, >> >> On 12/19/2016 08:13 PM, Mathias Nyman wrote: >>> On 19.12.2016 13:34, Baolin Wang wrote: Hi Mathias, On 19 December 2016 at 18:33, Mathias Nyman wrote:

[PATCH v2] ipc/sem.c: fix incorrect sem_lock pairing

Based on the syzcaller test case from dvyukov: https://gist.githubusercontent.com/dvyukov/d0e5efefe4d7d6daed829f5c3ca26a40/raw/08d0a261fe3c987bed04fbf267e08ba04bd533ea/gistfile1.txt The slow (i.e.: failure to acquire) syscall exit from semtimedop() incorrectly assumed that the the same lock is

[PATCH v2] ipc/sem.c: fix incorrect sem_lock pairing

Based on the syzcaller test case from dvyukov: https://gist.githubusercontent.com/dvyukov/d0e5efefe4d7d6daed829f5c3ca26a40/raw/08d0a261fe3c987bed04fbf267e08ba04bd533ea/gistfile1.txt The slow (i.e.: failure to acquire) syscall exit from semtimedop() incorrectly assumed that the the same lock is

Re: [PATCH v3 3/5] fs: Wire up SED/Opal to ioctl

> @@ -853,6 +854,7 @@ struct file { > #ifdef CONFIG_SECURITY > void*f_security; > #endif > + struct sed_context *f_sedctx; Adding a new field to the global struct file for a block driver feature is not acceptable. And I don't really see why it would be

Re: [PATCH v3 3/5] fs: Wire up SED/Opal to ioctl

> @@ -853,6 +854,7 @@ struct file { > #ifdef CONFIG_SECURITY > void*f_security; > #endif > + struct sed_context *f_sedctx; Adding a new field to the global struct file for a block driver feature is not acceptable. And I don't really see why it would be

Re: [PATCH v3 4/5] nvme: Implement resume_from_suspend and SED Allocation code.

> +static int nvme_sec_send(void *ctrl_data, u16 spsp, u8 secp, > + void *buf, size_t len) > +{ > + return nvme_sec_submit(ctrl_data, spsp, secp, buf, len, > +nvme_admin_security_send); > +} > + > +static int nvme_sec_recv(void *ctrl_data, u16

Re: [PATCH v3 4/5] nvme: Implement resume_from_suspend and SED Allocation code.

> +static int nvme_sec_send(void *ctrl_data, u16 spsp, u8 secp, > + void *buf, size_t len) > +{ > + return nvme_sec_submit(ctrl_data, spsp, secp, buf, len, > +nvme_admin_security_send); > +} > + > +static int nvme_sec_recv(void *ctrl_data, u16

Re: [tpmdd-devel] [PATCH] tpm, tpm_crb: Handle 64-bit resource in crb_check_resource()

On 12/19/16 07:56, Jarkko Sakkinen wrote: > On Sun, Dec 18, 2016 at 10:20:53PM -0600, Jiandi An wrote: >> crb_check_resource() in TPM CRB driver calls >> acpi_dev_resource_memory() which only handles 32-bit resources. >> Adding a call to acpi_dev_resource_address_space() in TPM CRB >> driver which

Re: [tpmdd-devel] [PATCH] tpm, tpm_crb: Handle 64-bit resource in crb_check_resource()

On 12/19/16 07:56, Jarkko Sakkinen wrote: > On Sun, Dec 18, 2016 at 10:20:53PM -0600, Jiandi An wrote: >> crb_check_resource() in TPM CRB driver calls >> acpi_dev_resource_memory() which only handles 32-bit resources. >> Adding a call to acpi_dev_resource_address_space() in TPM CRB >> driver which

Re: [PATCH v3 4/5] nvme: Implement resume_from_suspend and SED Allocation code.

On Mon, Dec 19, 2016 at 03:23:12PM -0700, Scott Bauer wrote: > I went back and reviewed the spec 1.2.1: > > http://www.nvmexpress.org/wp-content/uploads/NVM_Express_1_2_1_Gold_20160603.pdf > Section 5.18 (page 140->141) > > Describes the security send command type and it doesn't have any

Re: [PATCH v3 4/5] nvme: Implement resume_from_suspend and SED Allocation code.

On Mon, Dec 19, 2016 at 03:23:12PM -0700, Scott Bauer wrote: > I went back and reviewed the spec 1.2.1: > > http://www.nvmexpress.org/wp-content/uploads/NVM_Express_1_2_1_Gold_20160603.pdf > Section 5.18 (page 140->141) > > Describes the security send command type and it doesn't have any

Re: [PATCH v3 2/5] lib: Add Sed-opal library

On Mon, Dec 19, 2016 at 04:34:15PM -0500, Keith Busch wrote: > This seems like an optional library that some environments may wish to > opt-out of building into the kernel. Any reason not to add an entry into > the Kconfig to turn this on/off? This needs to be a CONFIG_BLOCK_SED /

Re: [PATCH v3 2/5] lib: Add Sed-opal library

On Mon, Dec 19, 2016 at 04:34:15PM -0500, Keith Busch wrote: > This seems like an optional library that some environments may wish to > opt-out of building into the kernel. Any reason not to add an entry into > the Kconfig to turn this on/off? This needs to be a CONFIG_BLOCK_SED /

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 20 December 2016 at 12:29, Lu Baolu wrote: > Hi Mathias, > > On 12/19/2016 08:13 PM, Mathias Nyman wrote: >> On 19.12.2016 13:34, Baolin Wang wrote: >>> Hi Mathias, >>> >>> On 19 December 2016 at 18:33, Mathias Nyman >>> wrote:

Re: [PATCH 2/2] usb: host: xhci: Handle the right timeout command

Hi, On 20 December 2016 at 12:29, Lu Baolu wrote: > Hi Mathias, > > On 12/19/2016 08:13 PM, Mathias Nyman wrote: >> On 19.12.2016 13:34, Baolin Wang wrote: >>> Hi Mathias, >>> >>> On 19 December 2016 at 18:33, Mathias Nyman >>> wrote: On 13.12.2016 05:21, Baolin Wang wrote: > > Hi

BQ27xxx registers

Hi, I'm testing out the 4.9 kernel on a AM3359 board fitted with a BQ27510-G3 fuel gauge. The board previously worked on the 4.1 kernel, however on the 4.9 kernel the bq27xxx_battery.c driver is spitting out this error continuously: power_supply bq27510-0: driver failed to report

BQ27xxx registers

Hi, I'm testing out the 4.9 kernel on a AM3359 board fitted with a BQ27510-G3 fuel gauge. The board previously worked on the 4.1 kernel, however on the 4.9 kernel the bq27xxx_battery.c driver is spitting out this error continuously: power_supply bq27510-0: driver failed to report

[PATCH v2 2/2] usb: host: xhci: Handle the right timeout command

If a command event is found on the event ring during an interrupt, we need to stop the command timer with del_timer(). Since del_timer() can fail if the timer is running and waiting on the xHCI lock, then it maybe get the wrong timeout command in xhci_handle_command_timeout() if host fetched a new

[PATCH v2 2/2] usb: host: xhci: Handle the right timeout command

If a command event is found on the event ring during an interrupt, we need to stop the command timer with del_timer(). Since del_timer() can fail if the timer is running and waiting on the xHCI lock, then it maybe get the wrong timeout command in xhci_handle_command_timeout() if host fetched a new

Re: [RFC v2 4/5] rcu: Use for_each_leaf_node_cpu() in force_qs_rnp()

On Mon, Dec 19, 2016 at 09:09:13PM -0800, Paul E. McKenney wrote: > On Mon, Dec 19, 2016 at 11:15:15PM +0800, Boqun Feng wrote: > > On Thu, Dec 15, 2016 at 02:51:36PM +, Colin Ian King wrote: > > > On 15/12/16 14:42, Boqun Feng wrote: > > > > On Thu, Dec 15, 2016 at 12:04:59PM +, Mark

Re: [RFC v2 4/5] rcu: Use for_each_leaf_node_cpu() in force_qs_rnp()

On Mon, Dec 19, 2016 at 09:09:13PM -0800, Paul E. McKenney wrote: > On Mon, Dec 19, 2016 at 11:15:15PM +0800, Boqun Feng wrote: > > On Thu, Dec 15, 2016 at 02:51:36PM +, Colin Ian King wrote: > > > On 15/12/16 14:42, Boqun Feng wrote: > > > > On Thu, Dec 15, 2016 at 12:04:59PM +, Mark

Re: [PATCH v2] fscrypt: Factor out bio specific functions

Looks fine, Reviewed-by: Christoph Hellwig

Re: [PATCH v2] fscrypt: Factor out bio specific functions

Looks fine, Reviewed-by: Christoph Hellwig

[PATCH 4/4] mmc: sdhci-msm: provide enhanced_strobe mode feature support

This provide support for enhanced_strobe feature to sdhci-msm. Signed-off-by: Ritesh Harjani --- drivers/mmc/host/sdhci-msm.c | 32 +++- 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/drivers/mmc/host/sdhci-msm.c

[PATCH 2/4] mmc: mmc: Add change to set controller to HS400 frequency in enhanced strobe

Currently mmc_select_hs400es is not setting the desired frequency before sending switch command. This makes CMD13 to timeout on some controllers. Thus add a change to set the desired HS400 frequency in mmc_select_hs400es when the timing is switched to HS400. Signed-off-by: Ritesh Harjani

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