Seungwon,
On Mon, Apr 15, 2013 at 5:14 AM, Seungwon Jeon tgih@samsung.com wrote:
+ MMC_CAP_8_BIT_DATA | MMC_CAP_CMD23 | MMC_CAP_SDIO_IRQ,
+ MMC_CAP_CMD23 | MMC_CAP_SDIO_IRQ,
This line for [1]
+ MMC_CAP_CMD23 | MMC_CAP_SDIO_IRQ,
+ MMC_CAP_CMD23 | MMC_CAP_SDIO_IRQ,
From: Thomas Abraham thomas.abra...@linaro.org
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: Thomas Abraham thomas.abra...@linaro.org
Signed-off-by: Doug Anderson
Seungwon,
On Tue, Apr 16, 2013 at 2:30 AM, Seungwon Jeon tgih@samsung.com wrote:
If needed for specific channel, it can be got from dts as property.
if (of_find_property(np, cap-sdio-irq, NULL))
pdata-caps |= MMC_CAP_SDIO_IRQ;
Oh! I missed that these new properties had gone in.
on code that Simon Glass added to the i2c-s3c2410
driver in the Chrome OS kernel 3.4 tree. The current incarnation as a
mux driver is as suggested by Grant Likely. See
https://patchwork.kernel.org/patch/1877311/ for some history.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Simon
Now that we have i2c-arbitrator in place on bus 4 we can add the
sbs-battery driver. Future devices will be added onto bus 4 once
drivers are in good shape.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
-by: Doug Anderson diand...@chromium.org
---
Changes in v6: None
Changes in v5:
- Adjust bindings as per Wolfram Sang.
Changes in v4:
- Changed mux gpio syntax to work atop Thomas's ARM: dts: add pin
state information in client nodes for Exynos5 platforms; avoid
adding gpios property to i2c
Hi,
On Mon, Apr 8, 2013 at 12:22 AM, Kukjin Kim kgene@samsung.com wrote:
Mike Turquette wrote:
Quoting Tushar Behera (2013-04-02 01:20:40)
In legacy setup, sclk_mmc{0,1,2,3} used PRE_RATIO bit-field (8-bit wide)
instead of RATIO bit-field (4-bit wide) for dividing clock rate.
With
Lars,
On Fri, Apr 5, 2013 at 1:53 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Since we sleep inside the protected section we need to use a mutex.
Ah, good point.
It's not the timeout case I'm worried about, but the case where the transfer
is interrupted by the user. Even though it is
The display timing node was added:
7ed2077 ARM: dts: Add display timing node to exynos5250-smdk5250.dts
...and looks OK there. ...but it looks like we lost a }; in the
merge and it no longer compiles. Fix it.
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/exynos5250
]
(kernel_init_freeable+0x108/0x1d0)
[80633a8c] (kernel_init_freeable+0x108/0x1d0) from [8046d2f8]
(kernel_init+0x1c/0xf4)
[8046d2f8] (kernel_init+0x1c/0xf4) from [8000e358]
(ret_from_fork+0x14/0x20)
---[ end trace 4bcdc801c868d73f ]---
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts
Kukjin,
On Mon, Apr 8, 2013 at 11:23 AM, Kukjin Kim kgene@samsung.com wrote:
Thanks for your pointing out. But it should be fixed with re-sorting out the
branch.
No problem with however you want to solve it. ;) Seemed that the
patch was the easiest way to report the problem in any
Kukjin,
On Mon, Apr 8, 2013 at 11:29 AM, Kukjin Kim kgene@gmail.com wrote:
BTW, if any problems on current for-next, please kindly let me know.
I usually try to check linux-next at least once a week, but sometimes
it's more or less often. At the moment I'm trying to track something
weird
Tomasz,
On Mon, Apr 8, 2013 at 12:27 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Common Clock Framework by default automatically gates unused clocks, just
like regulator core does with unused regulators. Maybe this is the cause?
Yes, I'm nearly certain that's the case here. The reset code
Hi,
On Mon, Apr 8, 2013 at 3:17 PM, Stephen Warren swar...@wwwdotorg.org wrote:
Anyway, I've just pushed a splitup of that commit (carved in 3 pieces)
into vfs.git#pipe-splitup; could you check which part triggers that
hang? Should propagate in a few...
It looks like pipe: unify -release()
Seungwon,
On Mon, Apr 8, 2013 at 5:17 AM, Seungwon Jeon tgih@samsung.com wrote:
I guess Doug are debugging it with wifi, right?
Yes, we're debugging it on the Samsung ARM Chromebook on a part that
has an SDIO WiFi module by Marvell. Bing Zhao (CCed) has a unit in
hand that generates lots
Al,
On Mon, Apr 8, 2013 at 4:06 PM, Al Viro v...@zeniv.linux.org.uk wrote:
Folks, see if vfs.git#experimental works for you; the PITA had apparently
been caused by change of open() semantics for /proc/pid/fd/some_pipe -
it started to behave like a FIFO, i.e. wait for peer to show up. Normally
-by: Doug Anderson diand...@chromium.org
---
Changes in v5:
- Adjust bindings as per Wolfram Sang.
Changes in v4:
- Changed mux gpio syntax to work atop Thomas's ARM: dts: add pin
state information in client nodes for Exynos5 platforms; avoid
adding gpios property to i2c@12CA for the same
Now that we have i2c-arbitrator in place on bus 4 we can add the
sbs-battery driver. Future devices will be added onto bus 4 once
drivers are in good shape.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
on code that Simon Glass added to the i2c-s3c2410
driver in the Chrome OS kernel 3.4 tree. The current incarnation as a
mux driver is as suggested by Grant Likely. See
https://patchwork.kernel.org/patch/1877311/ for some history.
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Simon
-by: Doug Anderson diand...@chromium.org
---
Changes in v5:
- Adjust bindings as per Wolfram Sang.
Changes in v4:
- Changed mux gpio syntax to work atop Thomas's ARM: dts: add pin
state information in client nodes for Exynos5 platforms; avoid
adding gpios property to i2c@12CA for the same
Now that we have i2c-arbitrator in place on bus 4 we can add the
sbs-battery driver. Future devices will be added onto bus 4 once
drivers are in good shape.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
The mmc part in exynos supports SDIO interrupts and they work fine, so
turn the capability on. With this I see download speeds increase
about 10x. This is a port of a change present in the Chrome OS tree
that can be found at https://gerrit.chromium.org/gerrit/#/c/26729/.
Signed-off-by: Doug
Andrew,
On Thu, Apr 11, 2013 at 11:36 AM, Andrew Bresticker
abres...@chromium.org wrote:
+ if (pdata-probe) {
+ err = pdata-probe(pdata);
+ if (err) {
+ dev_err(dev, platform probe failed: %d\n, err);
It would probably be good not to
| 1 +
2 files changed, 7 insertions(+)
Reviewed-by: Doug Anderson diand...@chromium.org
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Please read
Lars,
On Sat, Mar 16, 2013 at 7:41 AM, Lars-Peter Clausen l...@metafoo.de wrote:
I think you still need the mutex for serialization, otherwise the requests
would just cancel each other out. Btw. what happens if you start a conversion
while another is still in progress? Is it possible to abort
Kukjin,
On Tue, Apr 2, 2013 at 7:16 PM, Kukjin Kim kgene@samsung.com wrote:
Applied with 1st one, BTW, do you want to send this for stable tree?
I don't have any need for it to be in stable tree. The ARM Chromebook
hasn't reached critical functionality on any released/upstram Linux
Without this change the exynos adc controller needed to have its phy
enabled in some out-of-driver C code. Add support for specifying the
phy enable register by listing it in the reg list.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2: None
.../devicetree/bindings/arm
The exynos ADC won't work without a regulator called vdd and a clock
called adc. Document this fact in the device tree bindings.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2: None
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt | 8
1 file changed
Add the device tree entry for the device-tree enabled ADC driver that
recently landed in the iio tree.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2: None
arch/arm/boot/dts/exynos5250.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts
Hook up the exynos5250-snow thermistors via the device tree now that
there's a driver available to use them.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Match 'uV' - 'uv' change in Naveen's bindings.
arch/arm/boot/dts/cros5250-common.dtsi | 4
arch/arm/boot/dts
exynos adc driver under iio framwork
298489f iio:common: Use spi_sync_transfer() in STMicroelectronics ...
1d9a4cb IIO ADC support for AD7923
9a282b0 iio: Add OF support
3d277fc3 staging:iio: Remove adt7410 driver
Changes in v2:
- Match 'uV' - 'uv' change in Naveen's bindings.
Doug Anderson (4
/class/hwmon/hwmon1/device/temp1_input:38393
/sys/class/hwmon/hwmon2/device/temp1_input:37148
/sys/class/hwmon/hwmon3/device/temp1_input:38059
Tested-by: Doug Anderson diand...@chromium.org
--
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the body of a message to majord
-Hartman gre...@linuxfoundation.org
CC: Doug Anderson diand...@chromium.org
---
v1 - v2:
- remove gpio_free call
- move reset logic after phy node search
Seems fine to me. I guess the earlier problem you wrote about was the
probe failure, then? I think that the reason I don't tend to get
Hi,
On Thu, Mar 14, 2013 at 7:58 AM, Thomas Abraham
thomas.abra...@linaro.org wrote:
I can see your point, but as I mentioned earlier there seems to be some
timing issue here. By simply doing the reset a few ms earlier (in the first
probe, before the driver detects that it needs to defer
The exynox4210-ehci and exynos4210-ohci nodes need a clock specified
using the common clock framework. Document it.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Documentation/devicetree/bindings/usb/exynos-usb.txt | 10 ++
1 file changed, 10 insertions(+)
diff --git
Vivek,
On Wed, Mar 13, 2013 at 11:22 PM, Vivek Gautam
gautamvivek1...@gmail.com wrote:
It will be nice if you can please update relevant information
alongwith this, in the bindings doc for exynos-usb.
Sure. It always feels like device tree additions ought to be separate
patches from bindings
The ehci_vbus_gpio is requested but never freed. This can cause
problems with deferred probes and would cause problems if
s5p_ehci_remove was ever called. Use devm to fix this.
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers/usb/host/ehci-s5p.c | 4 +++-
1 file changed, 3
The exynox4210-ehci and exynos4210-ohci nodes need a clock specified
using the common clock framework. Document it.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Fixed embarrassing typo adc=usb. Thanks Jingoo!
Documentation/devicetree/bindings/usb/exynos-usb.txt | 10
Jingoo,
On Thu, Mar 14, 2013 at 5:30 PM, Jingoo Han jg1@samsung.com wrote:
Would you replace other 'pdev-dev' with 'dev' in s5p_setup_vbus_gpio()
as below? It seems to be better for readability.
Yes, of course. That was silly of me not to add the dev local and
not update the other
The ehci_vbus_gpio is requested but never freed. This can cause
problems with deferred probes and would cause problems if
s5p_ehci_remove was ever called. Use devm to fix this.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- pdev-dev = dev elsewhere
Reported-by: Dan Carpenter dan.carpen...@oracle.com
Cc: Doug Anderson diand...@chromium.org
Cc: Lars-Peter Clausen l...@metafoo.de
---
Discussion thread for this patch can be found at
http://www.gossamer-threads.com/lists/linux/kernel/1693284?page=last
drivers/iio/adc/Kconfig |1 +
1
of the mci_readl(host, IDSTS) and saw 0xa000 in the case of the
above CRC error.
A proposed fix for this is to ignore (but still clear) the
EVENT_XFER_COMPLETE in STATE_DATA_ERROR in the tasklet.
Reported-by: Bing Zhao bz...@marvell.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
drivers
Although there are no known cases of this being a problem (and it may
be technically impossible for the hardware to report more errors once
already in the error state), it seems unwise for us to be clearing
error interrupts that we didn't actually read.
Signed-off-by: Doug Anderson diand
On Fri, Mar 15, 2013 at 2:53 PM, Lars-Peter Clausen l...@metafoo.de wrote:
What exactly is the spinlock protecting against here? Concurrent runs of
exynos_adc_isr? This is probably not issue in the first place.
What you want to protect against is that completion is completed between the
call
to make suspend/resume reliable on the ARM Chromebook
(exynos5250-snow).
A few more details:
- The first patch is not strictly needed but was a nice cleanup. Our
understanding was that EINT0 was originally turned on for exynos
evt0 silicon and not needed for evt1.
- The second patch is more
Kliegman kli...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
Reviewed-by: Doug Anderson diand...@chromium.org
---
arch/arm/mach-exynos/include/mach/pm-core.h | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/pm-core.h
b/arch/arm
From: Jonathan Kliegman kli...@chromium.org
For legacy reasons EINT_0 was being forced on for all
exynos systems as a wake interrupt. For boards that need
EINT_0 they should probably enable it with enable_irq_wake
Signed-off-by: Jonathan Kliegman kli...@chromium.org
Signed-off-by: Doug Anderson
/exynos_mct.c:558:1: error: expected ',' or ';' before
'static'
The error didn't show up till now because there was an extra semicolon
at end of the CLOCKSOURCE_OF_DECLARE definition that was removed by
Arnd Bergmann in clocksource: make CLOCKSOURCE_OF_DECLARE type safe
Signed-off-by: Doug Anderson
Jaehoon,
On Mon, Mar 18, 2013 at 3:21 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Doug,
Great..i have found the problem like this.
I will check your patch..and share the result.
Did you have any time to check this patch?
Thanks!
-Doug
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Grant,
Thanks for posting! See below...
On Tue, Mar 26, 2013 at 3:50 PM, Grant Grundler grund...@chromium.org wrote:
Last year Seungwon Jeon (Samsung) fixed a bug in CLKDIV computation.
But when debugging a related issue (http://crbug.com/221828) I found
the code unreadable. This rewrite
Naveen,
On Wed, Mar 27, 2013 at 11:37 AM, Naveen Krishna Ch
naveenkrishna...@gmail.com wrote:
On 13 March 2013 13:40, Doug Anderson diand...@chromium.org wrote:
Without this change the exynos adc controller needed to have its phy
enabled in some out-of-driver C code. Add support
Hi,
On Wed, Mar 27, 2013 at 11:40 AM, Lars-Peter Clausen l...@metafoo.de wrote:
On 03/27/2013 07:35 PM, Naveen Krishna Ch wrote:
On 13 March 2013 13:39, Doug Anderson diand...@chromium.org wrote:
The exynos ADC won't work without a regulator called vdd and a clock
called adc. Document
Wolfram,
On Fri, Feb 15, 2013 at 11:46 AM, Doug Anderson diand...@chromium.org wrote:
The i2c-arbitrator-cros-ec driver implements the arbitration scheme
that the Embedded Controller (EC) on the ARM Chromebook expects to use
for bus multimastering. This i2c-arbitrator-cros-ec driver could
Naveen,
On Sun, Mar 10, 2013 at 7:09 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
@@ -317,7 +346,7 @@ static int ntc_thermistor_get_ohm(struct ntc_data *data)
return data-pdata-read_ohm(data-pdev);
if (data-pdata-read_uV) {
- read_uV =
Naveen,
On Wed, Mar 6, 2013 at 7:09 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
- unsigned intversion;
+ unsigned intversion;
Given that you've changed exynos_adc_get_version() to return an int,
shouldn't this be an int too (not unsigned)?
Hook up the exynos5250-snow thermistors via the device tree now that
there's a driver available to use them.
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/cros5250-common.dtsi | 4
arch/arm/boot/dts/exynos5250-snow.dts | 31 +++
2
Without this change the exynos adc controller needed to have its phy
enabled in some out-of-driver C code. Add support for specifying the
phy enable register by listing it in the reg list.
Signed-off-by: Doug Anderson diand...@chromium.org
---
.../devicetree/bindings/arm/samsung/exynos-adc.txt
Add the device tree entry for the device-tree enabled ADC driver that
recently landed in the iio tree.
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/exynos5250.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b
The exynos ADC won't work without a regulator called vdd and a clock
called adc. Document this fact in the device tree bindings.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt | 8
1 file changed, 8 insertions
Naveen's recent ADC cleanup and NTC thermistor patch.
Doug Anderson (4):
iio: adc: Document the regulator/clocks for exynos-adc
iio: adc: Add dt support for turning on the phy in exynos-adc
ARM: dts: Add adc to exynos5250 device tree file
ARM: dts: Add adc and thermistors for exynos5250-snow
Hi,
On Tue, Mar 12, 2013 at 6:45 AM, Guenter Roeck li...@roeck-us.net wrote:
On Tue, Mar 12, 2013 at 02:09:26PM +0530, Naveen Krishna Chatradhi wrote:
This patch adds DT support to NTC driver to parse the
platform data.
Also adds the support to work as an iio device.
During the probe ntc
Kukjin,
On Wed, Mar 13, 2013 at 12:30 AM, Kukjin Kim kgene@samsung.com wrote:
BTW, Doug, I think, this should be re-worked to use pinctrl. Can you?
Yes, I've already got this locally. I hadn't sent it up yet since I
wasn't sure whether pinctrl would land before or after this. I'll
send it
Now that we have i2c-arbitrator in place on bus 4 we can add the
sbs-battery driver. Future devices will be added onto bus 4 once
drivers are in good shape.
Signed-off-by: Doug Anderson diand...@chromium.org
Tested-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Changes in v4: None
-by: Doug Anderson diand...@chromium.org
Tested-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Changes in v4:
- Changed mux gpio syntax to work atop Thomas's ARM: dts: add pin
state information in client nodes for Exynos5 platforms; avoid
adding gpios property to i2c@12CA for the same
-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Stephen Warren swar...@nvidia.com
Tested-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
---
Changes in v4: None
Changes in v3
Stephen,
On Wed, Mar 13, 2013 at 9:53 AM, Stephen Warren swar...@wwwdotorg.org wrote:
Changes in v4: None
Isn't this 'PATCH V3 REPOST' then?
In this case part 2 in the patch series changes but not parts 1 and 3.
I could have just reposted part 2 with a higher version, but that
makes it a
This is a fixup to two device tree nodes that have already landed but
without clock nodes since the transition to common clock happened at
the same time.
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/exynos5250.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff
This is a fixup to two device tree nodes that have already landed but
without clock nodes since the transition to common clock happened at
the same time.
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/exynos5250.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff
Argh...
On Wed, Mar 13, 2013 at 10:17 AM, Doug Anderson diand...@chromium.org wrote:
This is a fixup to two device tree nodes that have already landed but
without clock nodes since the transition to common clock happened at
the same time.
Signed-off-by: Doug Anderson diand...@chromium.org
Alexander,
On Tue, Mar 12, 2013 at 6:09 PM, Alexander Graf ag...@suse.de wrote:
- err = gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, ehci_vbus_gpio);
- if (err)
+ /* reset pulls the line down, then up again */
+ err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW,
Alexander,
On Wed, Mar 13, 2013 at 10:45 AM, Alexander Graf ag...@suse.de wrote:
+ gpio_free(gpio);
Freeing the gpio is a little on the iffy side since you actually care
about keeping the value. Perhaps you can change this to
devm_gpio_request_one() and avoid the free? I was about
Naveen,
On Tue, Mar 12, 2013 at 9:48 PM, Naveen Krishna Chatradhi
ch.nav...@samsung.com wrote:
Doug, There was a comment from Lars regarding the match not
being NULL, if driver depends on CONFIG_OF. So, i've removed
the NULL check in v2 of this patch.
a bit to hold queue_lock to protect the 'busy' flag,
then release it to call unprepare_transfer_hardware().
Signed-off-by: Bryan Freed bfr...@chromium.org
Reviewed-by: Doug Anderson diand...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Linus Walleij linus.wall
Lars,
On Wed, Mar 13, 2013 at 11:11 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Agreed. Adding the dependency on OF in Kconfig should be all that is needed.
I think changing the timeout from 'unsigned long' to 'long' is also
legit (to match the actual type returned) and a good idea.
-Doug
--
Lars,
On Wed, Mar 13, 2013 at 11:40 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Yes, but that's a different issue and to be honest I didn't even realize
that the patch was trying to fix this as well. In my opinion it's best to
split this up into two patches one which fixes the OF dependency.
disable-wp
because the lack of a wp-gpios property means to use the special
purpose write protect line. On some other mmc devices the lack of
wp-gpios means that write protect should be disabled.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- New for this version
-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- Totally removed wp-gpios handling from exynos code.
Changes in v2: None
drivers/mmc/host/dw_mmc-exynos.c | 10 --
1 files changed, 0 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc
Seungwon,
On Wed, Nov 28, 2012 at 11:46 PM, Seungwon Jeon tgih@samsung.com wrote:
Hi Doug,
On Thursday, November 29, 2012, Doug Anderson wrote:
Seungwon,
Thanks for the review. See below for comments. If you'd like me to
respin then please let me know. Otherwise I look forward
-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3: None
Changes in v2:
- Fixed return type from u32 to int
- Return -EINVAL instead of -1
drivers/mmc/host/dw_mmc.c | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host
The next change will remove the code from the dw_mmc-exynos that added
the DW_MCI_QUIRK_NO_WRITE_PROTECT. Keep existing functionality of
having no write protect pin on smdk5250 by adding the disable-wp
property.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- New
{
i2c0 = i2c_0;
i2c1 = i2c_1;
};
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3:
- Addressed Wolfram's feedback; rebased atop idr-cleanup series.
Changes in v2: None
drivers/i2c/i2c-core.c | 54 +-
1 file changed, 40
The commit: i2c-core: dt: Pick i2c bus number from i2c alias if
present adds support for automatically picking the bus number based
on the alias ID. Remove the now unnecessary code from i2c-pxa that
did the same thing.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v3: None
Wolfram,
Thanks for the review. New patch was just sent. :)
On Sun, Feb 10, 2013 at 4:19 AM, Wolfram Sang w.s...@pengutronix.de wrote:
+static int i2c_get_number_from_dt(struct i2c_adapter *adap)
i2c_get_id_from_dt()?
Done.
+ if (!dev-of_node)
+ return -1;
with
dynamically (or automatically) allocated IDs.
- Use dev_name(dev-dev) to register for the IRQ; this matches what
the i2c-s3c2410.c does and handles dynamically allocated IDs.
- This change was only compile-tested (corgi_defconfig), since I don't
have access to a board that uses this driver.
Doug
Now that we have i2c-arbitrator in place on bus 4 we can add the
sbs-battery driver. Future devices will be added onto bus 4 once
drivers are in good shape.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v1: None
arch/arm/boot/dts/exynos5250-snow.dts | 6 ++
1 file
-by: Doug Anderson diand...@chromium.org
---
Changes in v1: None
arch/arm/boot/dts/cros5250-common.dtsi | 5 -
arch/arm/boot/dts/exynos5250-snow.dts | 24
2 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/cros5250-common.dtsi
b/arch/arm
(i2c_arbitrator_init);
+
+static void __exit i2c_arbitrator_exit(void)
+{
+ platform_driver_unregister(i2c_arbitrator_driver);
+}
+module_exit(i2c_arbitrator_exit);
+
+MODULE_DESCRIPTION(GPIO-based I2C arbitrator driver);
+MODULE_AUTHOR(Doug Anderson diand...@chromium.org);
+MODULE_LICENSE(GPL);
+MODULE_ALIAS
. That means extra logic in
i2c_add_mux_adapter().
Fix i2c_add_mux_adapter() to use -1 and update all mux drivers
accordingly.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Notes:
- If there's a good reason that force_nr uses 0 for auto then feel
free to drop this patch. I've place
.
Reported-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rob Herring rob.herr...@calxeda.com
Cc: Kukjin Kim kgene@samsung.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Thomas Gleixner t...@linutronix.de
Cc: linux-samsung-...@vger.kernel.org
---
I thought there may be other
Wolfram,
On Mon, Feb 11, 2013 at 4:48 PM, Doug Anderson diand...@chromium.org wrote:
This was suggested by Mark Brown in response to a patch for adding
this functionality only for the s3c2410 bus:
https://lkml.org/lkml/2012/11/20/681
I have also modified the i2c-pxa driver to use this new
Wolfram,
On Thu, Feb 28, 2013 at 3:25 PM, Wolfram Sang w...@the-dreams.de wrote:
Regarding patch 1, I was waiting for the idr changes to hit mainline.
They are mainline now, but since the removal of MAX_IDR_MASK your patch
doesn't apply anymore :( Can you rebase and retest, please? I'd like
The commit: i2c-core: dt: Pick i2c bus number from i2c alias if
present adds support for automatically picking the bus number based
on the alias ID. Remove the now unnecessary code from i2c-pxa that
did the same thing.
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v4: None
don't
have access to a board that uses this driver.
Doug Anderson (2):
i2c-core: dt: Pick i2c bus number from i2c alias if present
i2c: pxa: Use i2c-core to get bus number now
drivers/i2c/busses/i2c-pxa.c | 20 --
drivers/i2c/i2c-core.c | 49
{
i2c0 = i2c_0;
i2c1 = i2c_1;
};
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes in v4:
- Rebased atop the removal of MAX_IDR_MASK.
Changes in v3:
- Addressed Wolfram's feedback; rebased atop idr-cleanup series.
Changes in v2: None
drivers/i2c/i2c-core.c | 49
-off-by: Doug Anderson diand...@chromium.org
---
Note: The commit in question is only on linux-next.
arch/arm/vfp/vfphw.S | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index 20c8dd7..8d10dc8 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
Lars,
Thank you for your comments / thoughts...
On Thu, Jan 24, 2013 at 1:54 AM, Lars-Peter Clausen l...@metafoo.de wrote:
adc: adc@12D1 {
#io-channel-cells = 1;
io-channel-output-names = adc1, adc2, ...;
ncp15wb473@0 {
compatible =
...@chromium.org
Signed-off-by: Benson Leung ble...@chromium.org
Tested-by: Doug Anderson diand...@chromium.org
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Lars,
On Wed, Jan 23, 2013 at 4:52 AM, Lars-Peter Clausen l...@metafoo.de wrote:
Few doubts regarding the mappings and child device handling.
Kindly, suggest me better methods.
The patch looks mostly good now. As for the mappings, the problem is that we
currently do not have any device tree
Stephen,
On Wed, Feb 13, 2013 at 1:04 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 02/13/2013 11:02 AM, Doug Anderson wrote:
We need to use the i2c-arbitrator to talk to any of the devices on i2c
bus 4 on exynos5250-snow so that we don't confuse the embedded
controller (EC). Add
-by: Doug Anderson diand...@chromium.org
---
Changes in v2:
- Use new device tree property names / compatible string.
- Include that the GPIOs for arbitration are active low.
arch/arm/boot/dts/cros5250-common.dtsi | 5 -
arch/arm/boot/dts/exynos5250-snow.dts | 25 +
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