family. They will also be the location for the pinmux
configuration at the SoC level.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-7020.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-7040.dtsi | 2 +-
arch/arm64/boot/dts/marvell/
family. They will also be the location for the pinmux
configuration at the SoC level.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-7020.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-7040.dtsi | 2 +-
arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 53
ed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f7d568b8f133..42befcdec846 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1496,6 +1496,7 @@ F:arch/arm/boot/dts/armada*
F:
There was no entry for the mvebu pinctrl drivers. As they are tightly
linked to the SoCs and there is a lot of common code to support the
various pinctrl of each SoCs, then add a new entry for the mvebu
maintainers.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
MAINTAINERS
the support of the legacy compatible string with a big
warning in the kernel about updating the device tree.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 20
+++-
drive
the support of the legacy compatible string with a big
warning in the kernel about updating the device tree.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 20
+++-
drivers/clk/mvebu/ap806-system-controller.c
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com&g
-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 4
drivers/clk/mvebu/ap806-system-controller.c
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 19 +++
1 file
-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | 4
drivers/clk/mvebu/ap806-system-controller.c | 46
--
2 files changed, 24 insertions
Instead of using >dev all over the place, introduce a pointer
variable for it.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/clk/mvebu/ap806-system-controller.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/
The clock-output-names of the ap806-system-controller node are not used
anymore, so remove them.
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
), even if there is
some change in the device tree binding we paid attention to the
backward compatibility, and the driver can still work with the old
device tree.
Thanks,
Gregory
Gregory CLEMENT (5):
clk: mvebu: ap806: cosmetic improvement
clk: mvebu: ap806: do not depend anymore of the *-clock
Instead of using >dev all over the place, introduce a pointer
variable for it.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/ap806-system-controller.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/mvebu/ap806-system-controller.c
The clock-output-names of the ap806-system-controller node are not used
anymore, so remove them.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell
), even if there is
some change in the device tree binding we paid attention to the
backward compatibility, and the driver can still work with the old
device tree.
Thanks,
Gregory
Gregory CLEMENT (5):
clk: mvebu: ap806: cosmetic improvement
clk: mvebu: ap806: do not depend anymore of the *-clock
rvell.com>
[gregory.clem...@free-electrons.com:
- use sdio instead of emmc to name the clock
- update binding documentation]
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
---
Documentation/devicetree/bi
sdio instead of emmc to name the clock
- update binding documentation]
Signed-off-by: Gregory CLEMENT
Reviewed-by: Thomas Petazzoni
---
Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt |
1 +
drivers/clk/mvebu/cp110-system-controller.c|
28
of the legacy compatible string with a big
warning in the kernel about updating the device tree.
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Documentation/devicetree/bindings/arm/marvell/
The *-clock-output-names of the cp110-system-controller0 node are not
used anymore, so remove them.
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-cp110
of the legacy compatible string with a big
warning in the kernel about updating the device tree.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/marvell/cp110-system-controller0.txt |
18 ++
drivers/clk/mvebu/cp110-system
The *-clock-output-names of the cp110-system-controller0 node are not
used anymore, so remove them.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 13 +-
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
The new binding for the system controller on cp110 moved the clock
controller into a subnode. This preliminary step will allow to add gpio
and pinctrl subnodes.
Reviewed-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-elec
future conflict.
In this series, even if there is some change in the device tree
binding, we paid attention to the backward compatibility, and the
driver can still work with the old device tree.
Thanks,
Gregory
Gregory CLEMENT (6):
clk: mvebu: cp110 fix name of the GOP gate clock
clk: mvebu
The new binding for the system controller on cp110 moved the clock
controller into a subnode. This preliminary step will allow to add gpio
and pinctrl subnodes.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 41
future conflict.
In this series, even if there is some change in the device tree
binding, we paid attention to the backward compatibility, and the
driver can still work with the old device tree.
Thanks,
Gregory
Gregory CLEMENT (6):
clk: mvebu: cp110 fix name of the GOP gate clock
clk: mvebu
Actually the GOP clock (bit 18) is not at all used for emmc but only
for GOP: let's fix the name.
Changing the name in the device tree is not an issue because the name
itself is not used to reference the clock. Thanks to this the ABI remains
backward compatible.
Signed-off-by: Gregory CLEMENT
Actually the GOP clock (bit 18) is not at all used for emmc but only
for GOP: let's fix the name.
Changing the name in the device tree is not an issue because the name
itself is not used to reference the clock. Thanks to this the ABI remains
backward compatible.
Signed-off-by: Gregory CLEMENT
com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/clk/mvebu/cp110-system-controller.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/mvebu/cp110-system-controller.c
b/drivers/clk/mvebu/cp110-system-
the compatibility.
The name of each clock is now created by using its physical address as a
prefix (as it was done for the platform device names). Thanks to this we
have an automatic way to compute a unique name.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Documen
In preparation to the addition of a new clock, rename the goto labels
used to handle the failure cases using a name related to the failure
cause. This will allow to insert additional failing cases without
renaming all the labels.
Reviewed-by: Thomas Petazzoni
Signed-off-by: Gregory CLEMENT
the compatibility.
The name of each clock is now created by using its physical address as a
prefix (as it was done for the platform device names). Thanks to this we
have an automatic way to compute a unique name.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/arm/marvell
.12 [1]. So for completeness it be nice to have the dts(i) and
> defconfig changes in as well.
Unfortunately it was too late to applied and to push it to arm-soc when
the gpio part was applied.
So I will apply when 4.12-rc1 will be released and it will be
included in the 4.13 release.
G
12-rc1 will be released and it will be
included in the 4.13 release.
Gregory
>
> Thanks
> Ralph
>
> [1] https://lkml.org/lkml/2017/5/4/82
>
>>
>> Yours,
>> Linus Walleij
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
of the kernel it's too late to modify it.
>
> Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
Acked-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Thanks,
Gregory
> ---
> Documentation/admin-guide/kernel-parameters.txt | 2 +-
> 1 file chan
o late to modify it.
>
> Signed-off-by: Andre Przywara
Acked-by: Gregory CLEMENT
Thanks,
Gregory
> ---
> Documentation/admin-guide/kernel-parameters.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt
controller. But we do not take advantage of this and use
the chained irq with all of them.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 229 +-
1 file changed, 229 insertions(+)
diff --git a/drive
controller. But we do not take advantage of this and use
the chained irq with all of them.
Signed-off-by: Gregory CLEMENT
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 229 +-
1 file changed, 229 insertions(+)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
b/drive
h 4)
- Convert the driver to use GPIOLIB_IRQCHIP (patch 5)
- Add a critical section when accessing the hardware registers (patch 5)
- Use the gpio subnode (patch 5)
Thanks,
Gregory
Gregory CLEMENT (1):
pinctrl: armada-37xx: Add irqchip support
drivers/pinctrl/mvebu/pinctrl-arma
h 4)
- Convert the driver to use GPIOLIB_IRQCHIP (patch 5)
- Add a critical section when accessing the hardware registers (patch 5)
- Use the gpio subnode (patch 5)
Thanks,
Gregory
Gregory CLEMENT (1):
pinctrl: armada-37xx: Add irqchip support
drivers/pinctrl/mvebu/pinctrl-arma
Hi Linus,
On mer., avril 26 2017, Linus Walleij <linus.wall...@linaro.org> wrote:
> On Wed, Apr 26, 2017 at 11:23 AM, Gregory CLEMENT
> <gregory.clem...@free-electrons.com> wrote:
>> On lun., avril 24 2017, Linus Walleij <linu
Hi Linus,
On mer., avril 26 2017, Linus Walleij wrote:
> On Wed, Apr 26, 2017 at 11:23 AM, Gregory CLEMENT
> wrote:
>> On lun., avril 24 2017, Linus Walleij wrote:
>
>>>> + spin_lock_irqsave(>irq_lock, flags);
>>>> +
Hi,
On mer., avril 05 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Add the nodes for the two pin controller present in the Armada 37xx SoCs.
>
> Initially the node was named gpio1 using the same name that for the
> register range in the datasheet
Hi,
On mer., avril 05 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> Start to populate the device tree of the Armada 37xx with the pincontrol
> configuration used on the board providing a dts.
>
> Signed-off-by: Gregory CLEMENT <gregory.clem.
Hi,
On mer., avril 05 2017, Gregory CLEMENT
wrote:
> Add the nodes for the two pin controller present in the Armada 37xx SoCs.
>
> Initially the node was named gpio1 using the same name that for the
> register range in the datasheet. However renaming it pinctr_nb (nb for
&g
Hi,
On mer., avril 05 2017, Gregory CLEMENT
wrote:
> Start to populate the device tree of the Armada 37xx with the pincontrol
> configuration used on the board providing a dts.
>
> Signed-off-by: Gregory CLEMENT
Applied on mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm6
Hi,
On mer., avril 05 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> This commit makes sure the driver for the Armada 37xx pin controller is
> enabled.
>
> Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
Applied on mvebu
Hi,
On mer., avril 05 2017, Gregory CLEMENT
wrote:
> This commit makes sure the driver for the Armada 37xx pin controller is
> enabled.
>
> Signed-off-by: Gregory CLEMENT
Applied on mvebu/arm64
Thanks,
Gregory
> ---
> arch/arm64/Kconfig.platforms | 5 +
&g
Hi Linus,
On lun., avril 24 2017, Linus Walleij <linus.wall...@linaro.org> wrote:
> On Wed, Apr 5, 2017 at 5:18 PM, Gregory CLEMENT
> <gregory.clem...@free-electrons.com> wrote:
>
>> The Armada 37xx SoCs can handle interrupt through GPIO. However it can
&
Hi Linus,
On lun., avril 24 2017, Linus Walleij wrote:
> On Wed, Apr 5, 2017 at 5:18 PM, Gregory CLEMENT
> wrote:
>
>> The Armada 37xx SoCs can handle interrupt through GPIO. However it can
>> only manage the edge ones.
>>
>> The way the interrupt are ma
um--;
> dev_warn(>dev,
> - "eMMC clock mising: update the device tree!\n");
> + "eMMC clock missing: update the device tree!\n");
> } else {
> ap806_clks[4] = clk_register_fixed_factor(NU
g: update the device tree!\n");
> + "eMMC clock missing: update the device tree!\n");
> } else {
> ap806_clks[4] = clk_register_fixed_factor(NULL, name,
> fixedclk_name,
> --
>
h
> should have been taken care of now)
>
> ---
>
> Changes v4->v5:
> All
> * add Tested-by: Andrew Lunn <and...@lunn.ch>, thanks
> Patch 2/4 mvebu: xp: Add PWM properties to .dtsi files
> * keep the old compatible stings, we don't have to drop th
n taken care of now)
>
> ---
>
> Changes v4->v5:
> All
> * add Tested-by: Andrew Lunn , thanks
> Patch 2/4 mvebu: xp: Add PWM properties to .dtsi files
> * keep the old compatible stings, we don't have to drop them,
> therefore keep them (suggested by Gregory
gt; @@ -598,7 +598,7 @@
> status = "disabled";
> };
>
> - usb3@f8000 {
> + usb3_1: usb3@f8000 {
> compatible = "marvell,armada-380-xhci";
> reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
> interrupts = ;
> --
> 2.10.2
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
status = "disabled";
> };
>
> - usb3@f8000 {
> + usb3_1: usb3@f8000 {
> compatible = "marvell,armada-380-xhci";
> reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
> interrupts = ;
> --
> 2.10.2
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
64/configs/defconfig
> @@@ -402,7 -401,7 +402,8 @@@ CONFIG_MMC_DW_EXYNOS=
> CONFIG_MMC_DW_K3=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_MMC_SUNXI=y
> +CONFIG_MMC_BCM2835=y
> + CONFIG_MMC_SDHCI_XENON=y
> CONFIG_NEW_LEDS=y
> CONFIG_LEDS_CLASS=y
> CONFIG_LEDS_GPIO=y
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
-402,7 -401,7 +402,8 @@@ CONFIG_MMC_DW_EXYNOS=
> CONFIG_MMC_DW_K3=y
> CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_MMC_SUNXI=y
> +CONFIG_MMC_BCM2835=y
> + CONFIG_MMC_SDHCI_XENON=y
> CONFIG_NEW_LEDS=y
> CONFIG_LEDS_CLASS=y
> CONFIG_LEDS_GPIO=y
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
Hi Linus,
On lun., avril 10 2017, Rob Herring <r...@kernel.org> wrote:
> On Wed, Apr 05, 2017 at 05:18:02PM +0200, Gregory CLEMENT wrote:
>> +Example:
>> +pinctrl_sb: pinctrl-sb@18800 {
>
> Just pinctrl@...
>
>> +compatible = "marvell,arma
Hi Linus,
On lun., avril 10 2017, Rob Herring wrote:
> On Wed, Apr 05, 2017 at 05:18:02PM +0200, Gregory CLEMENT wrote:
>> +Example:
>> +pinctrl_sb: pinctrl-sb@18800 {
>
> Just pinctrl@...
>
>> +compatible = "marvell,armada3710-sb-pinctrl", "
Hi Ulf,
On lun., avril 10 2017, Ulf Hansson <ulf.hans...@linaro.org> wrote:
> On 30 March 2017 at 17:22, Gregory CLEMENT
> <gregory.clem...@free-electrons.com> wrote:
>> Hello,
>>
>> This the seventh version of the series adding support for the SDHCI
>
Hi Ulf,
On lun., avril 10 2017, Ulf Hansson wrote:
> On 30 March 2017 at 17:22, Gregory CLEMENT
> wrote:
>> Hello,
>>
>> This the seventh version of the series adding support for the SDHCI
>> Xenon controller. It can be currently found on the Armad
Argh, I sill have the typo in the title of this patch! :(
If you are going to apply it could you fix it, else it will be fixed in
the next version.
Sorry,
Gregory
On mer., avril 05 2017, Gregory CLEMENT <gregory.clem...@free-electrons.com>
wrote:
> The Armada 37xx SoCs c
Argh, I sill have the typo in the title of this patch! :(
If you are going to apply it could you fix it, else it will be fixed in
the next version.
Sorry,
Gregory
On mer., avril 05 2017, Gregory CLEMENT
wrote:
> The Armada 37xx SoCs can handle interrupt through GPIO. However it
status = "okay";
> };
>
> Is this clear? Is CON5 a USB 3 host, but has a USB 2 PHY connected to
> it? CON7 is the only true USB 3 port? I think some comments written in
I can answer it: CON5 is indeed an USB3 host with a USB2 PHY connected
to it so we can use it only as an USB2. And indeed CON7 is the only true
USB3 port.
> schwiizerdütsch would be clearre.:-)
Actually all your assumption were correct so maybe it is not as
confusing as it looks! :) But I can add a comment if needed.
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ot;okay";
> };
>
> Is this clear? Is CON5 a USB 3 host, but has a USB 2 PHY connected to
> it? CON7 is the only true USB 3 port? I think some comments written in
I can answer it: CON5 is indeed an USB3 host with a USB2 PHY connected
to it so we can use it only as an USB2. And indeed CON7 is the only true
USB3 port.
> schwiizerdütsch would be clearre.:-)
Actually all your assumption were correct so maybe it is not as
confusing as it looks! :) But I can add a comment if needed.
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
d-by: Andrew Lunn <and...@lunn.ch>
Applied on mvebu/dt
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
; armada-385-linksys.dtsi which effectively enables the definition for
>> the WRT1900ACS (Shelby) as well as for future boards.
>>
>> Signed-off-by: Ralph Sennhauser
>
> Centralising this makes sense.
>
> Reviewed-by: Andrew Lunn
Applied on mvebu/dt
Thanks,
Gregor
5)
- Use the gpio subnode (patch 5)
Thanks,
Gregory
Gregory CLEMENT (7):
pinctrl: dt-bindings: Add documentation for Armada 37xx pin controllers
arm64: marvell: enable the Armada 37xx pinctrl driver
pinctrl: armada-37xx: Add pin controller support for Armada 37xx
pinctrl: armada-37xx:
5)
- Use the gpio subnode (patch 5)
Thanks,
Gregory
Gregory CLEMENT (7):
pinctrl: dt-bindings: Add documentation for Armada 37xx pin controllers
arm64: marvell: enable the Armada 37xx pinctrl driver
pinctrl: armada-37xx: Add pin controller support for Armada 37xx
pinctrl: armada-37xx:
Document the device tree binding for the pin controllers found on the
Armada 37xx SoCs.
Update the binding documention of the xtal clk which is a subnode of this
syscon node.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
Documentation/devicetree/bindings
Document the device tree binding for the pin controllers found on the
Armada 37xx SoCs.
Update the binding documention of the xtal clk which is a subnode of this
syscon node.
Signed-off-by: Gregory CLEMENT
---
Documentation/devicetree/bindings/clock/armada3700-xtal-clock.txt |
7
This commit makes sure the driver for the Armada 37xx pin controller is
enabled.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/Kconfig.platforms | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch
This commit makes sure the driver for the Armada 37xx pin controller is
enabled.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/Kconfig.platforms | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 129cc5ae4091..9aa71a3f3f50
Start to populate the device tree of the Armada 37xx with the pincontrol
configuration used on the board providing a dts.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 8 +-
arch/arm64/boot/dts/marvell/
Start to populate the device tree of the Armada 37xx with the pincontrol
configuration used on the board providing a dts.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-3720-db.dts | 8 +-
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 31 +++-
2
Add the nodes for the two pin controller present in the Armada 37xx SoCs.
Initially the node was named gpio1 using the same name that for the
register range in the datasheet. However renaming it pinctr_nb (nb for
North Bridge) makes more sens.
Signed-off-by: Gregory CLEMENT <gregory.clem...@f
Add the nodes for the two pin controller present in the Armada 37xx SoCs.
Initially the node was named gpio1 using the same name that for the
register range in the datasheet. However renaming it pinctr_nb (nb for
North Bridge) makes more sens.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot
controller. But we do not take advantage of this and use
the chained irq with all of them.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 221 +-
1 file changed, 221 insertions(+)
diff --git a/drive
controller. But we do not take advantage of this and use
the chained irq with all of them.
Signed-off-by: Gregory CLEMENT
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 221 +-
1 file changed, 221 insertions(+)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
b/drive
related functions are implemented.
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
drivers/pinctrl/Makefile| 2 +-
drivers/pinctrl/mvebu/Kconfig | 7 +-
drivers/pinctrl/mvebu/Makefile | 3 +-
drivers/pinctrl
related functions are implemented.
Signed-off-by: Gregory CLEMENT
---
drivers/pinctrl/Makefile| 2 +-
drivers/pinctrl/mvebu/Kconfig | 7 +-
drivers/pinctrl/mvebu/Makefile | 3 +-
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 648
GPIO management is pretty simple and is part of the same IP than the pin
controller for the Armada 37xx SoCs. This patch adds the GPIO support to
the pinctrl-armada-37xx.c file, it also allows sharing common functions
between the gpiolib and the pinctrl drivers.
Signed-off-by: Gregory CLEMENT
GPIO management is pretty simple and is part of the same IP than the pin
controller for the Armada 37xx SoCs. This patch adds the GPIO support to
the pinctrl-armada-37xx.c file, it also allows sharing common functions
between the gpiolib and the pinctrl drivers.
Signed-off-by: Gregory CLEMENT
ng this, but if your driver needs it, all others
> may need to be fixed too.
>
> Can you put a print in irq_of_parse_and_map() and see what happens?
So if I don't call it explicitly in my driver, then this function is
never called for the gpio.
Gregory
--
Gregory Clement, Free Elect
l others
> may need to be fixed too.
>
> Can you put a print in irq_of_parse_and_map() and see what happens?
So if I don't call it explicitly in my driver, then this function is
never called for the gpio.
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
---
>> +
>> +see Documentation/devicetree/bindings/clock/armada3700-xtal-clock.txt
>> +
>> +
>> +Example:
>> +pinctrl_sb: pinctrl-sb@18800 {
>
> pinctrl@
OK
>
>> +compatible = "marvell,armada3710-sb-pinctrl", "sysco
t;> +
>> +see Documentation/devicetree/bindings/clock/armada3700-xtal-clock.txt
>> +
>> +
>> +Example:
>> +pinctrl_sb: pinctrl-sb@18800 {
>
> pinctrl@
OK
>
>> +compatible = "marvell,armada3710-sb-pinctrl", "syscon", "simple-
gt; arch/arm/boot/dts/armada-xp-mv78460.dtsi | 16 +-
> arch/arm/configs/mvebu_v7_defconfig| 2 +
> drivers/gpio/gpio-mvebu.c | 324
> -
> 9 files changed, 394 insertions(+), 36 deletions(-)
>
> --
> 2
mv78460.dtsi | 16 +-
> arch/arm/configs/mvebu_v7_defconfig| 2 +
> drivers/gpio/gpio-mvebu.c | 324
> -
> 9 files changed, 394 insertions(+), 36 deletions(-)
>
> --
> 2.10.2
>
--
Gregory Clemen
4500 1>;
> + compatible = "pwm-fan";
> + pwms = < 24 4000>;
> };
>
> dsa {
> --
> 2.10.2
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
0V4--C99 */
> - compatible = "gpio-fan";
> - gpios = < 24 0>;
>
> - gpio-fan,speed-map = <00
> - 4500 1>;
> + compatible = "pwm-fan";
> +
interrupts = <82>, <83>, <84>, <85>;
> + clocks = < 0>;
> };
>
> gpio1: gpio@18140 {
> - compatible = "marvell,orion-gpio";
> -
};
>
> gpio1: gpio@18140 {
> - compatible = "marvell,orion-gpio";
> - reg = <0x18140 0x40>;
> + compatible = "marvell,armada-370-xp-gpio";
Same here and for all the others...
Thanks,
Gregory
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ion_ge00_switch_init(struct dsa_chip_data
> *d)
>
> mdiobus_register_board_info(_ge00_switch_board_info, 1);
> }
> +#endif
>
>
> /*
> * I2C
> --
> 2.9.0
>
--
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
ONFIG_PHYLIB))
> + return;
> +
> for (i = 0; i < ARRAY_SIZE(d->port_names); i++)
> if (!strcmp(d->port_names[i], "cpu"))
> break;
> @@ -493,6 +497,7 @@ void __init orion_ge00_switch_init(struct dsa_chip_data
From: Hu Ziji <huz...@marvell.com>
Export sdhci_start_signal_voltage_switch() from sdhci.c.
Thus vendor sdhci driver can implement its own signal voltage
switch routine.
Signed-off-by: Hu Ziji <huz...@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-elect
lt;han...@marvell.com>
[fixed up conflicts, added error handling --rmk]
Signed-off-by: Russell King <rmk+ker...@armlinux.org.uk>
Acked-by: Stephen Boyd <sb...@codeaurora.org>
Signed-off-by: Gregory CLEMENT <gregory.clem...@free-electrons.com>
---
arch/arm64/boot/dts/marvell/arm
From: Hu Ziji
Export sdhci_start_signal_voltage_switch() from sdhci.c.
Thus vendor sdhci driver can implement its own signal voltage
switch routine.
Signed-off-by: Hu Ziji
Signed-off-by: Gregory CLEMENT
Acked-by: Adrian Hunter
---
drivers/mmc/host/sdhci.c | 5 +++--
drivers/mmc/host/sdhci.h
Acked-by: Stephen Boyd
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 3 ++-
drivers/clk/mvebu/ap806-system-controller.c | 15 ++-
2 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
b
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