clock name as
an index so it has a linear search time.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/samsung/clk.c | 6 ++
drivers/clk/samsung/clk.h | 3 +++
2 files changed, 9 insertions(+)
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 9e1f88c04fd4..3b
ine: pl330: Add runtime Power Management
support v12")
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/samsung/clk-exynos5420.c | 26 --
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c
b/drivers/clk/sams
Hello Chanwoo,
Thanks a lot for your feedback.
On 03/30/2015 04:04 AM, Chanwoo Choi wrote:
>
> I faced on the similiar issue. If some clock was disabled,
> Exynos SoC could not enter the suspend mode
>
> But, I think it is not prpper method to resolve this issue.
> about that that specific cloc
Hello Tomasz,
On 03/30/2015 06:02 PM, Tomasz Figa wrote:
> Hi Javier,
>
> 2015-03-31 0:53 GMT+09:00 Javier Martinez Canillas
> :
>> The Samsung helpers functions to register clocks, add the clock instance
>> returned by the common clock framework to a lookup table that is
Hello Tomasz,
Thanks a lot for your feedback.
On 03/30/2015 06:07 PM, Tomasz Figa wrote:
> Hi Javier,
>
> Please see my comments inline.
>
> 2015-03-31 0:53 GMT+09:00 Javier Martinez Canillas
> :
> [snip]
>> diff --git a/drivers/clk/samsung/clk-exynos5420.c
&
mu CLK_RTC>, <&s2mps14_osc 0>;
>> + clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>;
>> clock-names = "rtc", "rtc_src";
>> status = "okay";
>> };
>>
>
> Looks good to me.
>
> Reviewed-by: Chanwoo Choi
>
Reviewed-by: Javier Martinez Canillas
Best regards,
Javier
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Please read the FAQ at http://www.tux.org/lkml/
683 100644
>> --- a/arch/arm/boot/dts/exynos4415.dtsi
>> +++ b/arch/arm/boot/dts/exynos4415.dtsi
>> @@ -177,7 +177,7 @@
>> };
>>
>> rtc: rtc@1007 {
>> - compatible = "samsung,exynos3250-rtc";
>
owski
>
> Acked-by: Alexandre Belloni
>
Reviewed-by: Javier Martinez Canillas
Best regards,
Javier
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r, does it in the exynos5420 platform PM callbacks:
https://lkml.org/lkml/2015/3/27/770
I was asked to do it in the exynos5420 clk driver instead but maybe you
have a different opinion on that.
Best regards,
Javier
[0]:
>From c118df83da8cac65cc218ae944362259f5d0 Mon Sep 17 00:00:00
Hello Abhilash,
On 03/31/2015 04:38 PM, Abhilash Kesavan wrote:
> javier.marti...@collabora.co.uk> wrote:
>> On 03/30/2015 06:07 PM, Tomasz Figa wrote:
>> >
>> > If look-up speed is important here, maybe all the relevant clocks
>> > could be looked up once at initialization time and just prepared
Hello Mike,
On 04/01/2015 03:29 AM, Michael Turquette wrote:
> Quoting Javier Martinez Canillas (2015-03-31 01:59:39)
>> +Tomeu who I forgot to add to the cc list.
>>
>> Hello Mike,
>>
>> Thanks a lot for your feedback.
>>
>> On 03/31/2015 03:4
Hello Sylwester,
On 04/01/2015 01:03 PM, Sylwester Nawrocki wrote:
>
> On 31/03/15 22:00, Javier Martinez Canillas wrote:
>> On 03/31/2015 04:38 PM, Abhilash Kesavan wrote:
>>> javier.marti...@collabora.co.uk> wrote:
>
>>>> Unfortunately I don't
Hello Sylwester,
On 04/01/2015 07:31 PM, Sylwester Nawrocki wrote:
> On 01/04/15 13:44, Javier Martinez Canillas wrote:
>> On 04/01/2015 01:03 PM, Sylwester Nawrocki wrote:
>>> It's not clear what subsystems affect state of the CG_STATUSx registers, it
>>> wo
On 04/07/2015 12:59 PM, Javier Martinez Canillas wrote:
>
> So IIUC the CG_STATUS0 bits were a red herring and the real problem
> is that the aclk266_g2d needs to be enabled during suspend (although
> we still don't know why).
>
> It seems were are at a dead end now. Wi
Management property to the SDIO/MMC
node so the mwifiex suspend handler doesn't fail and the system is able
to enter into a suspend state.
Signed-off-by: Javier Martinez Canillas
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 1 +
arch/arm/boot/dts/exynos5800-peach-pi.dts | 1 +
2 files chang
Hello Tomasz,
On 04/07/2015 02:46 PM, Tomasz Figa wrote:
> 2015-04-07 13:56 GMT+02:00 Javier Martinez Canillas
> :
>> So I disabled the sss clock before trying a S2R:
>>
>> # devmem 0x10018800 32 0xFFFB
>> (CLK_SSS in CLK_GATE_IP_G2D is gated)
>>
>
Hello Abhilash,
On 04/07/2015 04:11 PM, Abhilash Kesavan wrote:
>
> Yes, though it increasingly looks like aclk266_g2d needs to stay ON
> and we should use your patch that keeps it enabled prior to suspend.
>
Indeed, could you please give me some feedback on the latest RFC patch
I shared [0] on
Hello Abhilash,
On 04/07/2015 04:38 PM, Abhilash Kesavan wrote:
>>
>> [0]
>> From 78aa551ebcb9a4a7ae9d5581c33e0c0f19fe5ad6 Mon Sep 17 00:00:00 2001
>> From: Javier Martinez Canillas
>> Date: Tue, 7 Apr 2015 15:53:27 +0200
>> Subject: [RFC PATCH] clk: exynos5
that this was the issue.
Fixes: ae43b32 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power Management
support v12")
Signed-off-by: Javier Martinez Canillas
Tested-by: Kevin Hilman
Tested-by: Abhilash Kesavan
Acked-by: Tomasz Figa
---
drivers/clk/samsung/clk-exynos5420.c | 1 +
1 file
Hello Tomasz,
On 04/07/2015 11:28 PM, Tomasz Figa wrote:
>
> Looks good to me. You can consider this Acked-by, as long as Sylwester
> is not opposed to this approach.
>
Thanks a lot, I've posted it as a proper patch now.
> Best regards,
> Tomasz
>
Best regards,
Javier
--
To unsubscribe from
Hello Sylwester,
On 04/08/2015 11:06 AM, Sylwester Nawrocki wrote:
>>
>> diff --git a/drivers/clk/samsung/clk-exynos5420.c
>> b/drivers/clk/samsung/clk-exynos5420.c
>> index 07d666cc6a29..bea4a173eef5 100644
>> --- a/drivers/clk/samsung/clk-exynos5420.c
>> +++ b/drivers/clk/samsung/clk-exynos542
Hello Kukjin,
On 04/16/2015 09:40 AM, Javier Martinez Canillas wrote:
>
> On 04/12/2015 10:30 PM, Javier Martinez Canillas wrote:
>> Commit ea08de16eb1b ("ARM: dts: Add DISP1 power domain for exynos5420")
>> added a device node for the Exynos5420 DISP1 power domai
Hello,
On 04/29/2015 09:45 PM, Sjoerd Simons wrote:
> On Wed, 2015-04-29 at 10:40 -0700, Kevin Hilman wrote:
>> Javier Martinez Canillas writes:
>
>> Tested-by: Kevin Hilman
>>
>> FWIW, this patch fixes the boot panics when using MMC rootfs on
>> exynos5
Hello Kukjin,
On 04/15/2015 10:07 AM, Javier Martinez Canillas wrote:
>
> On 04/07/2015 05:09 PM, Doug Anderson wrote:
>> Javier,
>>
>> On Tue, Apr 7, 2015 at 6:03 AM, Javier Martinez Canillas
>> wrote:
>>> The Marvell mwifiex driver prevents the system t
Hello Kevin,
On 04/30/2015 04:59 PM, Kevin Hilman wrote:
> Javier Martinez Canillas writes:
>>
>> The regression on Exynos5420/5422/5800 that has been for a while is fixed
>> by "ARM: dts: Make DP a consumer of DISP1 power domain on Exynos5420" [0]
>>
Hello Olof,
On 04/30/2015 05:57 PM, Olof Johansson wrote:
> On Thu, Apr 30, 2015 at 8:44 AM, Kevin Hilman wrote:
>> Krzysztof Kozlowski writes:
>
> This should fix issue reported by Javier [1][2].
>
> Tested on Chromebook Snow (Exynos 5250). More testing would be great,
> esp
Hello Pavel,
On Thu, Apr 9, 2015 at 2:31 PM, Pavel Machek wrote:
> Fix includes according to Sebastian.
>
> Signed-off-by: Pavel Machek
>
> ---
>
> On Thu 2015-04-09 14:19:14, Sebastian Reichel wrote:
>> On Thu, Apr 09, 2015 at 01:29:43PM +0200, Pavel Machek wrote:
>> > On Thu 2015-04-09 11:10:1
eb1b ("ARM: dts: Add DISP1 power domain for exynos5420")
Signed-off-by: Javier Martinez Canillas
---
Hello,
This latent bug was not exposed before since drivers for other devices
marked as DISP1 power domain consumers were probed before exynos-dp so
the PD was already on which made possi
Hello Pali,
On Thu, Apr 9, 2015 at 2:59 PM, Pali Rohár wrote:
> On Thursday 09 April 2015 14:43:59 Javier Martinez Canillas wrote:
>>
>> Please re-spin your previous patch and submit it properly.
>>
>> Best regards,
>> Javier
>
> Hi all! What about sto
uot;)
Signed-off-by: Javier Martinez Canillas
---
drivers/mmc/core/pwrseq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/core/pwrseq.c b/drivers/mmc/core/pwrseq.c
index ab2129781161..4c1d1757dbf9 100644
--- a/drivers/mmc/core/pwrseq.c
+++ b/drivers/mmc/core/p
Hello Lee,
On 05/27/2015 10:36 AM, Lee Jones wrote:
>> ---
>> drivers/i2c/busses/i2c-cros-ec-tunnel.c| 45 ++---
>> drivers/input/keyboard/cros_ec_keyb.c | 29 --
>> drivers/mfd/cros_ec.c | 28 --
>> drivers/mfd/cros_ec_i2c.c | 4 +-
Hello Lee,
On 05/27/2015 10:53 AM, Lee Jones wrote:
> On Fri, 22 May 2015, Javier Martinez Canillas wrote:
>
>> From: Stephen Barber
>>
>> Add proto v3 support to the SPI, I2C, and LPC.
>>
>> Signed-off-by: Stephen Barber
>> Signed-off-by: Jav
Hello Olof,
On 05/20/2015 10:39 AM, Javier Martinez Canillas wrote:
>
>
> This series contain a fix and a cleanup for the cros_ec_lpc driver and
> a small fix for cros_ec_dev driver. The first two patches were posted
> as a part of the "mfd: cros_ec: Add multi EC and
Hello Lee,
Thanks a lot for your feedback.
On 05/27/2015 11:11 AM, Lee Jones wrote:
> On Fri, 22 May 2015, Javier Martinez Canillas wrote:
>
>> From: Gwendal Grignou
>>
>> Chromebooks can have more than one Embedded Controller so the
>> cros_ec device id has
Hello Lee,
[...]
On 05/28/2015 04:26 PM, Lee Jones wrote:
>> >>
>> >> + if (ec_dev->max_passthru) {
>> >> + /*
>> >> + * Register a PD device as well on top of this device.
>> >> + * We make the following assumptions:
>> >> + * - behind an EC, we have a pd
>>
Hello Heiko,
On 06/11/2015 01:50 PM, Heiko Stübner wrote:
> Am Dienstag, 9. Juni 2015, 13:04:41 schrieb Javier Martinez Canillas:
>> Hello,
>>
>> This is a v7 of a series that adds support for multiple EC in a system
>> and also for the protocol version 3 that is use
Hello Krzysztof,
On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
wrote:
> W dniu 11.06.2015 o 17:26, Krzysztof Kozlowski pisze:
>> Add proper gate clock for the Analog to Digital Converter (ADC) on
>> Exynos4x12.
>>
>> Signed-off-by: Krzysztof Kozlowski
>> ---
>> drivers/clk/samsung/clk-e
Hello Krzysztof,
On Thu, Jun 11, 2015 at 2:40 PM, Krzysztof Kozlowski
wrote:
> W dniu 11.06.2015 o 21:15, Javier Martinez Canillas pisze:
>> Hello Krzysztof,
>>
>> On Thu, Jun 11, 2015 at 12:43 PM, Krzysztof Kozlowski
>> wrote:
>>> W dniu 11.06.2015 o 17:26,
enable set register for each combiner group and
restore it after resume to make sure that the interrupts are enabled.
Signed-off-by: Javier Martinez Canillas
---
Hello,
I noticed this issue because after a S2R, IRQs for some devices didn't
trigger anymore but others continued working and a
aw data for
> exynos4x12")
> Link: https://lkml.org/lkml/2015/6/11/85
>
> ---
>
> Changes since v1:
> 1. After discussion on LKML this solution was chosen because it smaller,
>simpler, self-contained (one patch to fix issue) and maintains backward
>compatibility.
Hello Sudeep,
Thanks a lot for the feedback.
On 06/12/2015 12:10 PM, Sudeep Holla wrote:
>
>
> On 12/06/15 06:43, Javier Martinez Canillas wrote:
>> The Exynos interrupt combiner IP loses its state when the SoC enters
>> into a low power state during a Suspend-to-RAM.
Hello Sudeep,
On 06/12/2015 01:54 PM, Sudeep Holla wrote:
>
>
> On 12/06/15 12:27, Javier Martinez Canillas wrote:
>> Hello Sudeep,
>>
>> Thanks a lot for the feedback.
>>
>> On 06/12/2015 12:10 PM, Sudeep Holla wrote:
>>>
>>>
>&g
Hello Sudeep,
On 06/12/2015 02:57 PM, Javier Martinez Canillas wrote:
> On 06/12/2015 01:54 PM, Sudeep Holla wrote:
[snip]
>
>> registers are lost assuming the combiner was powered down, even the
>> status register will be lost and you will not know exactly the wake
Hello Doug,
Thanks a lot for your comments.
On 06/12/2015 10:17 PM, Doug Anderson wrote:
> Hi,
>
> On Fri, Jun 12, 2015 at 12:36 PM, Javier Martinez Canillas
> wrote:
>>>> registers are lost assuming the combiner was powered down, even the
>>>> status re
Hello Sudeep,
On 06/15/2015 11:01 AM, Sudeep Holla wrote:
>
>
> On 15/06/15 08:46, Javier Martinez Canillas wrote:
> [...]
>
>>
>> Sudeep, so we may need something like $subject after all from Doug's
>> explanations since the combiner chip state is los
Hello Sudeep,
On 06/15/2015 05:08 PM, Sudeep Holla wrote:
> On 15/06/15 16:00, Javier Martinez Canillas wrote:
>> On 06/15/2015 11:01 AM, Sudeep Holla wrote:
>>> On 15/06/15 08:46, Javier Martinez Canillas wrote:
[...]
>>>
>>> Agreed. But I would sug
quot;cros-ec-ctl",
> .platform_data = &pd_p,
> .pdata_size = sizeof(pd_p),
>
These two should in fact be static const since mfd_add_devices()
expects a const struct mfd_cell * as third argument. I forgot on
my patch, sorry about that.
With these changes:
Acked-by: Jav
Hello Krzysztof,
On 06/16/2015 01:57 AM, Krzysztof Kozlowski wrote:
> On 16.06.2015 00:23, Javier Martinez Canillas wrote: (...)
>>>> To do a more intrusive change, I should better understand the
>>>> interactions between the Exynos pinctrl / GPIO, interrupt
>>&
On 05/28/2015 11:10 AM, Javier Martinez Canillas wrote:
> Hello Olof,
>
> On 05/20/2015 10:39 AM, Javier Martinez Canillas wrote:
>>
>>
>> This series contain a fix and a cleanup for the cros_ec_lpc driver and
>> a small fix for cros_ec_dev driver. The first two
Hello Lee and Viresh,
On Tue, Jun 23, 2015 at 10:38 AM, Lee Jones wrote:
> On Tue, 23 Jun 2015, Viresh Kumar wrote:
>> On 23-06-15, 08:06, Lee Jones wrote:
>> >
>> > > Over that, this patch should have been present before any other
>> > > patches using these bindings.
>> >
>> > I've never heard t
On 06/24/2015 04:21 PM, Heiko Stübner wrote:
> Am Mittwoch, 24. Juni 2015, 15:17:50 schrieb Lee Jones:
>> On Sun, 21 Jun 2015, Javier Martinez Canillas wrote:
>> > Hello Paul,
>> >
>> > On 06/21/2015 02:01 AM, Paul Gortmaker wrote:
>> > > In commi
Hello Lee,
On Wed, Jun 24, 2015 at 3:59 PM, Lee Jones wrote:
> Signed-off-by: Lee Jones
> ---
> arch/arm/configs/multi_v7_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/configs/multi_v7_defconfig
> b/arch/arm/configs/multi_v7_defconfig
> index f632af0..973 1006
depends on || COMPILE_TEST
but is more future proof to remove the dependency and let the drivers
be built in all architectures if possible to have more build coverage.
Signed-off-by: Javier Martinez Canillas
---
drivers/platform/chrome/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a
n why the option can
not be selected on other architectures. So now the above warning will not
happen and the MFD_CROS_EC dependency can be removed since is not needed.
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mfd/Kc
ing about unmet dependencies but I think the correct fix
is to remove unneded dependencies. So that is what this series do and are
composed of the following patches:
Javier Martinez Canillas (3):
platform/chrome: Don't make CHROME_PLATFORMS depends on X86 || ARM
mfd: Remove MFD_CROS_EC depends
has
a dependency on OF so in practice can't be selected without CONFIG_OF.
Signed-off-by: Javier Martinez Canillas
---
drivers/mfd/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 653815950aa2..3f68dd251ce8 10
Hello Paul,
On Thu, Jun 25, 2015 at 2:00 AM, Paul Gortmaker
wrote:
> [Re: [PATCH v7 00/14] crypto: add a new driver for Marvell's CESA] On
> 22/06/2015 (Mon 15:59) Herbert Xu wrote:
>
>> On Mon, Jun 22, 2015 at 09:23:36AM +0200, Boris Brezillon wrote:
>> > Hi Herbert,
>> >
>> > On Sun, 21 Jun 20
Hello Lee,
On 06/25/2015 10:38 AM, Lee Jones wrote:
> On Thu, 25 Jun 2015, Javier Martinez Canillas wrote:
>
>> A dependency on X86 || ARM for MFD_CROS_EC was added to fix the warning:
>>
>> (MFD_CROS_EC) selects CHROME_PLATFORMS which has unmet direct dependencies
>
Hello Lee,
On Thu, Jun 25, 2015 at 10:42 AM, Lee Jones wrote:
> On Wed, 24 Jun 2015, Javier Martinez Canillas wrote:
[...]
>> > diff --git a/arch/arm/configs/multi_v7_defconfig
>> > b/arch/arm/configs/multi_v7_defconfig
>> > index f632af0..973 1006
Hello Lee,
On 06/05/2015 12:17 PM, Lee Jones wrote:
> On Thu, 04 Jun 2015, Javier Martinez Canillas wrote:
>
>> From: Gwendal Grignou
>>
>> Chromebooks can have more than one Embedded Controller so the
>> cros_ec device id has to be incremented for each E
Hello Lee,
On 06/05/2015 12:38 PM, Lee Jones wrote:
[...]
>>
>> -err = mfd_add_devices(dev, 0, cros_devs,
>> - ARRAY_SIZE(cros_devs),
>> +err = mfd_add_devices(ec_dev->dev, PLATFORM_DEVID_AUTO, &ec_cell, 1,
>>NULL, ec_dev->irq, NULL)
Hello,
On Mon, Jun 8, 2015 at 7:14 AM, Krzysztof Kozlowski
wrote:
[...]
>
> To summarize my point of view:
> 1. Unless Vivek's says otherwise, please give him the credits with
> proper "from" field.
> 2. Issues mentioned in previous mail should be addressed (missing
> IS_ERR(), how disabling th
lator defined at
> device tree")
> Cc:
>
Reviewed-by: Javier Martinez Canillas
> ---
>
> I am not entirely convinced that this should go to stable. Leaving a
> regulator enabled in case of probe failure (no exynos TMU device) or
> after deferred probe (regulator won't
Hello Krzysztof,
On Mon, Jun 8, 2015 at 8:52 AM, Krzysztof Kozlowski
wrote:
> 2015-06-08 15:42 GMT+09:00 Javier Martinez Canillas :
>> Hello,
>>
>> On Mon, Jun 8, 2015 at 7:14 AM, Krzysztof Kozlowski
>> wrote:
>>
>> [...]
>>
>>>
>>
+ mmc-pwrseq = <&sdhci0_pwrseq>;
> };
>
> /* SD card */
I'm neither familiar with this board nor have a schematic but the
patch looks good to me.
Reviewed-by: Javier Martinez Canillas
Best regards,
Javier
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Hello Heiko,
On 06/02/2015 11:15 PM, Heiko Stübner wrote:
> Am Dienstag, 2. Juni 2015, 10:11:03 schrieb Javier Martinez Canillas:
>> Hello,
>>
>> Newer Chromebooks have more than one Embedded Controller (EC) in the
>> system. These additional ECs are connected through
Hello Lee,
Thanks a lot for your feedback.
On 06/03/2015 10:53 AM, Lee Jones wrote:
> On Tue, 02 Jun 2015, Javier Martinez Canillas wrote:
>
>> From: Gwendal Grignou
>>
>> Chromebooks can have more than one Embedded Controller so the
>> cros_ec device id has
Hello Lee,
On 06/03/2015 01:27 PM, Lee Jones wrote:
> On Wed, 03 Jun 2015, Javier Martinez Canillas wrote:
[snip]
>> >>
>> >> - err = mfd_add_devices(dev, 0, cros_devs,
>> >> - ARRAY_SIZE(cros_devs),
>> &
spi: Add a DT property to delay asserting the CS
mfd: cros_ec: spi: Add delay for asserting CS
Gwendal Grignou (2):
mfd: cros_ec: Add DT property to define ChromeOS EC name
mfd: cros_ec: Support multiple EC in a system
Javier Martinez Canillas (2):
mfd: cros_ec: Use a zero-length array for c
l cause a delay equal to the value passed to it to
be inserted at the beginning of a transaction.
Signed-off-by: Alexandru M Stan
Reviewed-by: Doug Anderson
Signed-off-by: Chris Zhong
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v4:
the EC has already woken up.
Signed-off-by: Alexandru M Stan
Reviewed-by: Doug Anderson
Signed-off-by: Chris Zhong
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v4: None.
Changes since v3:
- New patch, split DT binding and driver impl
sysfs inferface for cros_pd.
Also reduce number of allocated objects, make chromeos sysfs
class object a static and add refcounting to prevent object
deletion while command is in progress.
Signed-off-by: Gwendal Grignou
Reviewed-by: Dmitry Torokhov
Signed-off-by: Javier Martinez Canillas
Tested
From: Stephen Barber
Add proto v3 support to the SPI, I2C, and LPC.
Signed-off-by: Stephen Barber
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Reviewed-by: Gwendal Grignou
Tested-by: Gwendal Grignou
Acked-by: Lee Jones
---
Changes since v4: None
Changes since v3
other
protocols are supported in the future. So move the communication protocol
helpers to its own driver as drivers/platform/chrome/cros_ec_proto.c.
Suggested-by: Lee Jones
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v4: None
Changes
.
Signed-off-by: Stephen Barber
Signed-off-by: Javier Martinez Canillas
Reviewed-by: Gwendal Grignou
Tested-by: Gwendal Grignou
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v4: None
Changes since v3:
- Added tested-by from Heiko Stuebner.
- Added acked-by tag from Lee
er is used for both output and input data
so the maximum of these values should be used to allocate it.
Suggested-by: Gwendal Grignou
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v4: None
Changes since v3:
- Added acked-by tag from
character device name and the
sysfs entries.
Add a "google,cros-ec-name" DT property to the ChromeOS EC
binding document to change the EC name based on its function.
Signed-off-by: Gwendal Grignou
Reviewed-by: Doug Anderson
Signed-off-by: Javier Martinez Canillas
---
Changes since v4: None,
From: Stephen Barber
Update cros_ec_commands.h to the latest version in the EC
firmware sources and add power domain and passthru commands.
Also, update lightbar to use new command names.
Signed-off-by: Stephen Barber
Reviewed-by: Randall Spangler
Signed-off-by: Javier Martinez Canillas
Hello Lee,
On 06/03/2015 03:49 PM, Lee Jones wrote:
[...]
>>
>> int cros_ec_register(struct cros_ec_device *ec_dev)
>> @@ -52,14 +68,39 @@ int cros_ec_register(struct cros_ec_device *ec_dev)
>>
>> cros_ec_query_all(ec_dev);
>>
>> -err = mfd_add_devices(dev, 0, cros_devs,
>> -
o-bcm-kona.c |2 +-
> drivers/gpio/gpio-dwapb.c |2 +-
> drivers/gpio/gpio-mvebu.c |2 +-
> drivers/gpio/gpio-mxc.c|6 +++---
> drivers/gpio/gpio-mxs.c|2 +-
> drivers/gpio/gpio-omap.c |2 +-
For gpio-omap:
Acked-by: Javier Mart
x.c|2 +-
> drivers/gpio/gpio-msic.c |2 +-
> drivers/gpio/gpio-msm-v2.c |2 +-
> drivers/gpio/gpio-mvebu.c |2 +-
> drivers/gpio/gpio-mxc.c|4 ++--
> drivers/gpio/gpio-mxs.c|2 +-
> drivers/gpio/gpio-omap.c |2 +-
Hello Michal,
On Wed, Jun 3, 2015 at 11:26 PM, Michal Suchanek wrote:
> Although there is only one choice of chipselect it is necessary to
> specify it. The driver cannot claim the gpio otherwise.
>
> Signed-off-by: Michal Suchanek
> ---
> arch/arm/boot/dts/exynos5250-snow.dts | 3 ++-
> 1 file
a DT property to delay asserting the CS
mfd: cros_ec: spi: Add delay for asserting CS
Gwendal Grignou (1):
mfd: cros_ec: Support multiple EC in a system
Javier Martinez Canillas (2):
mfd: cros_ec: Use a zero-length array for command data
mfd: cros_ec: Move protocol helpers out of the MFD d
er is used for both output and input data
so the maximum of these values should be used to allocate it.
Suggested-by: Gwendal Grignou
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v5: None
Changes since v4: None
Changes since v3:
- A
other
protocols are supported in the future. So move the communication protocol
helpers to its own driver as drivers/platform/chrome/cros_ec_proto.c.
Suggested-by: Lee Jones
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v5: None
Changes
.
Signed-off-by: Stephen Barber
Signed-off-by: Javier Martinez Canillas
Reviewed-by: Gwendal Grignou
Tested-by: Gwendal Grignou
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v5: None
Changes since v4: None
Changes since v3:
- Added tested-by from Heiko Stuebner.
- Added
From: Stephen Barber
Add proto v3 support to the SPI, I2C, and LPC.
Signed-off-by: Stephen Barber
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Reviewed-by: Gwendal Grignou
Tested-by: Gwendal Grignou
Acked-by: Lee Jones
---
Changes since v5: None
Changes since v4
From: Stephen Barber
Update cros_ec_commands.h to the latest version in the EC
firmware sources and add power domain and passthru commands.
Also, update lightbar to use new command names.
Signed-off-by: Stephen Barber
Reviewed-by: Randall Spangler
Signed-off-by: Javier Martinez Canillas
sysfs inferface for cros_pd.
Also reduce number of allocated objects, make chromeos sysfs
class object a static and add refcounting to prevent object
deletion while command is in progress.
Signed-off-by: Gwendal Grignou
Reviewed-by: Dmitry Torokhov
Signed-off-by: Javier Martinez Canillas
Tested
l cause a delay equal to the value passed to it to
be inserted at the beginning of a transaction.
Signed-off-by: Alexandru M Stan
Reviewed-by: Doug Anderson
Signed-off-by: Chris Zhong
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v5:
n, to make sure that the EC has
already woken up, if the property has been defined in the DTS.
Signed-off-by: Alexandru M Stan
Reviewed-by: Doug Anderson
Signed-off-by: Chris Zhong
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v5: None
Hello Anand,
On Fri, May 29, 2015 at 3:34 PM, Anand Moon wrote:
> Enable regulator for usbdrd3_0 and usbdrd3_1.
> Looking at the schematic pin diagram for MAX77802
> USB3_0 and USB3_1 is regulated by LDO9 and LD011.
>
> Fix the boot message of failed.
> [3.503539] exynos-dwc3 usb@1200: Lo
-off-by tag should be before
Krzysztof's Tested-by since first you posted the patch and then he
tested it.
> -Anand Moon
>
Best regards,
Javier
> On 29 May 2015 at 19:19, Javier Martinez Canillas wrote:
>> Hello Anand,
>>
>> On Fri, May 29, 2015 at 3:34 PM, Anand
spi: Add a DT property to delay asserting the CS
mfd: cros_ec: spi: Add delay for asserting CS
Gwendal Grignou (1):
mfd: cros_ec: Support multiple EC in a system
Javier Martinez Canillas (2):
mfd: cros_ec: Use a zero-length array for command data
mfd: cros_ec: Move protocol helpers out of t
other
protocols are supported in the future. So move the communication protocol
helpers to its own driver as drivers/platform/chrome/cros_ec_proto.c.
Suggested-by: Lee Jones
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v3:
- Added tested
From: Stephen Barber
Update cros_ec_commands.h to the latest version in the EC
firmware sources and add power domain and passthru commands.
Also, update lightbar to use new command names.
Signed-off-by: Stephen Barber
Reviewed-by: Randall Spangler
Signed-off-by: Javier Martinez Canillas
From: Stephen Barber
Add proto v3 support to the SPI, I2C, and LPC.
Signed-off-by: Stephen Barber
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Reviewed-by: Gwendal Grignou
Tested-by: Gwendal Grignou
Acked-by: Lee Jones
---
Changes since v3:
- Added acked-by tag from
er is used for both output and input data
so the maximum of these values should be used to allocate it.
Suggested-by: Gwendal Grignou
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v3:
- Added acked-by tag from Lee Jones.
Changes since
the EC has already woken up.
Signed-off-by: Alexandru M Stan
Reviewed-by: Doug Anderson
Signed-off-by: Chris Zhong
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v3:
- New patch, split DT binding and driver implementation as suggested
l cause a delay equal to the value passed to it to
be inserted at the beginning of a transaction.
Signed-off-by: Alexandru M Stan
Reviewed-by: Doug Anderson
Signed-off-by: Chris Zhong
Signed-off-by: Javier Martinez Canillas
Tested-by: Heiko Stuebner
Acked-by: Lee Jones
---
Changes since v3:
- S
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