Add i2s_clkout property, which enables output clock to chip outside,
this is generally for audio codec outside.
Also add it to example.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 5 +++--
1 file changed, 3 insertions(+), 2
): generate for i2s controller inside of chip
Jianqun Xu (2):
ASoC: rockchip-i2s: dt: add i2s_clkout to list of clocks
ASoC: rockchip: i2s: add support for grabbing output clock to codec
Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 5 +++--
sound/soc/rockchip/rockchip_i2s.c
...@chromium.org
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
sound/soc/rockchip/rockchip_i2s.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/sound/soc/rockchip/rockchip_i2s.c
b/sound/soc/rockchip/rockchip_i2s.c
index c74ba37..2820ade 100644
--- a/sound/soc/rockchip
Add an property i2s_clk_out, which enables to output clock to outside
of rockchip SoCs. Let's make it optional since not each board needs it.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
changes since v1:
- make i2s_clk_out optional, suggested by Sonny
Documentation/devicetree/bindings
Patch is from Sonny Rao sonny...@chromium.org
We need to claim the clock which is driving the codec so that when we enable
clock gating, we continue to clock the codec when needed. I make this an
optional clock since there might be some applications where we don't need it
but can still use the
TXFIFO1 if CSR=01
TXFIFO2 if CSR=10
TXFIFO3 if CSR=11)
is equal to or below this field value.
Different to receive data level, transmit data level does not need
to -1.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
sound/soc/rockchip/rockchip_i2s.h | 2 +-
1 file changed, 1 insertion(+), 1
To make Bus DMA works more efficiency, DMA may work in burst mode,
we set the watermark of transmit and receive reach to 16 bits.
Jianqun Xu (2):
ASoC: rockchip: i2s: fix error defination of transmit data level
ASoC: rockchip: i2s: set TDL and RDL to 16 bits
sound/soc/rockchip
Set Transmit Data Level(TDL) and Receive Data Level(RDL) to 16 bits.
Without this setting, the TDL is default to be 0x00 (means 1 bit),
and the RDL is default to be 0x1f (means 16 bits).
This patch is helpful to fix pop sound, tested on rk3288 board.
Signed-off-by: Jianqun Xu jay...@rock
Set Transmit Data Level(TDL) and Receive Data Level(RDL) to 16 samples.
Without this setting, the TDL is default to be 0x00 (means 0 sample),
and the RDL is default to be 0x1f (means 32 samples).
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
changes since v1:
- modify commit message bit
To make Bus DMA works more efficiency, DMA may work in burst mode,
we set the watermark of transmit and receive reach to 16 bits.
Jianqun Xu (3):
ASoC: rockchip: i2s: fix error defination of transmit data level
ASoC: rockchip: i2s: set TDL and RDL to 16 samples
ASoC: rockchip: i2s: fix
TXFIFO1 if CSR=01
TXFIFO2 if CSR=10
TXFIFO3 if CSR=11)
is equal to or below this field value.
Different to receive data level, transmit data level does not need
to -1.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
changes since v1:
- none
sound/soc/rockchip/rockchip_i2s.h | 2 +-
1 file
Since RK3288 DMAC's burst length only support max to 4, here
set maxburst of playback and capture dma data to 4.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
changes since v1:
- new patch since v1
sound/soc/rockchip/rockchip_i2s.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
The clock output from rockchip SoCs' CRU to chip outside is from the same source
as hclk which is for i2s controller. We make it optional because some audio
codec outside not need the master clock from SoC but from other clock source.
Jianqun Xu (2):
ASoC: rockchip-i2s: dt: add an optional
Add an property i2s_clk_out, which enables to output clock to outside
of rockchip SoCs. Let's make it optional since not each board needs it.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 8 ++--
1 file changed, 6 insertions
From: Sonny Rao sonny...@chromium.org
We need to claim the clock which is driving the codec so that when we enable
clock gating, we continue to clock the codec when needed. I make this an
optional clock since there might be some applications where we don't need it
but can still use the I2S
Add an property i2s_clk_out, which enables to output clock to outside
of rockchip SoCs. Let's make it optional since not each board needs it.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Documentation/devicetree/bindings/sound/rockchip
based on rk3288 with max98090 codec.
Jianqun Xu (1):
ASoC: dt-bindings: rockchip-i2s: add an optional property
i2s_clk_out
Sonny Rao (1):
ASoC: rockchip: i2s: add support for grabbing output clock to codec
Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 8 ++--
sound/soc
.
Signed-off-by: Sonny Rao sonny...@chromium.org
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
sound/soc/rockchip/rockchip_i2s.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/sound/soc/rockchip/rockchip_i2s.c
b/sound/soc/rockchip/rockchip_i2s.c
index c74ba37..fd144ac
.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
.../devicetree/bindings/fuse/rockchip,rk3288-efuse.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644
Documentation/devicetree/bindings/fuse/rockchip,rk3288-efuse.txt
diff --git a/Documentation/devicetree/bindings
Add driver for efuse found on rk3288 board based on rk3288 SoC.
Driver will read fuse information of chip at the boot stage of
kernel, this information new is for further usage.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
arch/arm/mach-rockchip/efuse.c | 165
In RK3288, there are two eFuse. One is organized as 32bits by 8 one-time
programmable electrical fuses with random access interface, and the other
is organized as 32bits by 32 one-time programmable electrical fuses.
Jianqun Xu (2):
rockchip: efuse: add documentation for rk3288 efuse driver
burst length to 1 in the i2s driver.
This fix would always work as long as we're sending a multiple of 4 bytes
(which so far seems to be the case)
This patch can make the length of dma buffer is aligned to a multiple of burst
size
and burst length.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
This patch applys rate symmetry for rockchip i2s DAI.
Signed-off-by: Jianqun Xu jay...@rock-chips.com
---
sound/soc/rockchip/rockchip_i2s.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/rockchip/rockchip_i2s.c
b/sound/soc/rockchip/rockchip_i2s.c
index 59aeec4..abd7cdd 100644
e?
Agree with Lars, it's better to fix on DMA driver side since issue
caused by dma-controller instead of i2s controller
- Lars
--
Jianqun Xu | Software engineer | 18750760928
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to ma
Hi heiko
I can see the patches on your clk branch for next
thanks
在 03/12/2015 07:31, Heiko Stübner 写道:
Hi Jianqun,
Am Mittwoch, 2. Dezember 2015, 21:22:31 schrieb jianqun.xu:
From: Jianqun xu <jay...@rock-chips.com>
Add aclk_bus and aclk_peri to the list of rk3368 critical clocks,
Hi David:
It's better to add a cover-letter, and add changes note for new version,
such as:
changes since v0:
- split patch to two patches or more, one patch for one new feature (Heiko)
and NOT to have two same signed-off-by
在 11/12/2015 22:33, David Wu 写道:
The calc_divs of new version is
Hi Heiko:
在 05/01/2016 15:02, Heiko Stuebner 写道:
Hi Jianqun,
Am Dienstag, 5. Januar 2016, 11:02:18 schrieb jianqun.xu:
From: Xu Jianqun
There is a requirement from pmic device, which is on the i2c bus,
that the pmic needs to be called earlier then devices powered by
Hi Rob
在 24/02/2016 06:15, Rob Herring 写道:
On Tue, Feb 23, 2016 at 03:01:01PM +0800, jianqun.xu wrote:
From: Jianqun Xu <jay...@rock-chips.com>
Add devicetree bindings for Rockchip grf which found on
Rockchip SoCs.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes
he dts.
Signed-off-by: Xing Zheng <zhengx...@rock-chips.com>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
looks ok so far, do you have an estimate when the revised clk driver will be
sent? Before committing to support this binding header forever I'd like to
take a look over the
There is the new SoCs from Rockchip which named rk3399, the
patches are added to support them.
Jianqun Xu (1):
ARM64: dts: rockchip: add core dtsi file for rk3399
Xing Zheng (2):
dt-bindings: add bindings for rk3399 clock controller
clk: rockchip: add dt-binding header for rk3399
.
Separate pmu nodes should be added for the A72 and A53 PMUs, and more
nodes should be added later.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v2:
- add "rockchip,grf = <>" for pmucru node (xing)
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 950
From: Xing Zheng <zhengx...@rock-chips.com>
Add the dt-bindings header for the rk3399, that gets shared between
the clock controller and the clock references in the dts.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Xing Zheng <zhengx...@rock-chips.com>
Signed-off-b
From: Xing Zheng <zhengx...@rock-chips.com>
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Xing Zheng <zhengx...@rock-chips.com>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
-
Hi Mark
在 23/01/2016 01:18, Mark Brown 写道:
On Fri, Jan 15, 2016 at 01:48:04PM -0800, Sonny Rao wrote:
On Fri, Jan 15, 2016 at 9:46 AM, Mark Brown wrote:
If the I2S block is providing a clock to the CODEC then that's what the
software should do so that the CODEC can gate
Hi Heiko
在 16/02/2016 22:37, Heiko Stuebner 写道:
Am Dienstag, 16. Februar 2016, 13:22:23 schrieb Mark Brown:
On Tue, Feb 16, 2016 at 05:22:18PM +0800, jianqun.xu wrote:
Documentation/devicetree/bindings/spi/spi-rockchip.txt | 1 +
1 file changed, 1 insertion(+)
I'd expect this to be added
在 17/02/2016 14:47, Heiko Stuebner 写道:
Hi Jianqun,
Am Mittwoch, 17. Februar 2016, 09:53:10 schrieb jianqun.xu:
From: Xu Jianqun
Add devicetree bindings for pinctrl found on rk3399
processors from rockchip.
Signed-off-by: Xu Jianqun
---
Hi Mark
在 17/02/2016 19:46, Mark Rutland 写道:
On Wed, Feb 17, 2016 at 10:01:16AM +0800, jianqun.xu wrote:
From: Xu Jianqun
Add dtsi file for Rockchip rk3399 SoCs, which includes some
general nodes such as cpu, pmu, cru, gic, amba and so on.
Change-Id:
在 17/02/2016 15:00, Heiko Stuebner 写道:
Hi Jianqun,
Am Mittwoch, 17. Februar 2016, 10:01:16 schrieb jianqun.xu:
From: Xu Jianqun
Add dtsi file for Rockchip rk3399 SoCs, which includes some
general nodes such as cpu, pmu, cru, gic, amba and so on.
Change-Id:
Hi Heiko
Thank you for you kindly explain, now I got your comments.
在 18/02/2016 17:47, Heiko Stuebner 写道:
From: Xu Jianqun <jay...@rock-chips.com>
Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.
Signed-off-by: Jianqun Xu <jay...@rock-chips.co
Hi Rob
在 18/02/2016 22:36, Rob Herring 写道:
On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote:
From: Xing Zheng
Add the devicetree binding for the cru on the rk3399 which quite
similar structured as previous clock controllers.
Signed-off-by: Xing Zheng
Hi Heiko
在 19/02/2016 08:53, Heiko Stuebner 写道:
Am Freitag, 19. Februar 2016, 08:48:15 schrieb Jianqun Xu:
Hi Rob
在 18/02/2016 22:36, Rob Herring 写道:
On Wed, Feb 17, 2016 at 09:54:49AM +0800, jianqun.xu wrote:
From: Xing Zheng <zhengx...@rock-chips.com>
Add the devicetree b
Hi Mark
在 18/02/2016 21:57, Mark Brown 写道:
On Thu, Feb 18, 2016 at 05:57:49PM +0800, Jianqun Xu wrote:
I'm a little confuse, I have upstreamed rockchip-i2s, and the i2s driver set
the compatible like:
- compatible: should be one of the followings
- "rockchip,rk3066-i2s":
Hi Heiko
在 19/02/2016 14:31, Heiko Stuebner 写道:
Hi Jianqun,
Am Freitag, 19. Februar 2016, 09:56:15 schrieb jianqun.xu:
From: Jianqun Xu <jay...@rock-chips.com>
Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.
Signed-off-by: Jianqun Xu <ja
From: Xing Zheng <zhengx...@rock-chips.com>
Add the dt-bindings header for the rk3399, that gets shared between
the clock controller and the clock references in the dts.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Xing Zheng <zhengx...@rock-chips.com>
Signed-off-b
There is the new SoCs from Rockchip which named rk3399, the
patches are added to support them.
Jianqun Xu (1):
ARM64: dts: rockchip: add core dtsi file for rk3399
Xing Zheng (2):
dt-bindings: add bindings for rk3399 clock controller
clk: rockchip: add dt-binding header for rk3399
.
Separate pmu nodes should be added for the A72 and A53 PMUs, and more
nodes should be added later.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v3:
- modify SCLK_SPI3 to SCLK_SPI3_PMU, and same change to uart4
- add blank line before includes head files
arch/arm64/boot/dts/ro
From: Xing Zheng <zhengx...@rock-chips.com>
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Xing Zheng <zhengx...@rock-chips.com>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
-
"emmc_sample", "clk_sdmmc", RK3399_SDMMC_CON1,
1),
Can you and Jianqun Xu please coordinate? Though I don't have a TRM
for rk3399 and I haven't looked through this whole patch, I know for
sure there's a problem when I pick the latest patch series from both
of you it doesn't compile.
From: Shawn Lin
Add "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk3399 platform.
Change-Id: Ieefafab5f0e9650271e823659e2bec1556c4a9bc
Signed-off-by: Shawn Lin
---
This patch add rk3399-evb.dts for RK3399 evaluation board.
Tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v2:
- remove rk808 since without i2c, which will upstream independently
- remove es8316 since without i2c, which will upstream independently
/182
and on the following branch:
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git
irq/percpu-partition
That will to be tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v2:
- remove arm-pmu at first. (Marc, Heiko, Mark)
- remove rga
Add dtsi file for RK3399 SoCs, and evb dts file for RK3399 evb.
To make patch more easily to be reviewed, some nodes have been removed
temporarily, after this base file been applied, more patches will be
upstreamed independently.
Jianqun Xu (3):
ARM64: dts: rockchip: add core dtsi file
/182
and on the following branch:
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git
irq/percpu-partition
That will to be tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v2:
- remove arm-pmu at first. (Marc, Heiko, Mark)
- remove rga
Add dtsi file for RK3399 SoCs, and evb dts file for RK3399 evb.
To make patch more easily to be reviewed, some nodes have been removed
temporarily, after this base file been applied, more patches will be
upstreamed independently.
Jianqun Xu (3):
ARM64: dts: rockchip: add core dtsi file
This patch add rk3399-evb.dts for RK3399 evaluation board.
Tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v2:
- remove rk808 since without i2c, which will upstream independently
- remove es8316 since without i2c, which will upstream independently
The RK3399 evaluation board is designed with pmic
rk808 on top board.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v2:
- new add patch
Documentation/devicetree/bindings/arm/rockchip.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Documen
From: Shawn Lin
Add "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk3399 platform.
Change-Id: Ieefafab5f0e9650271e823659e2bec1556c4a9bc
Signed-off-by: Shawn Lin
---
changes in v2:
- new add patch
The RK3399 evaluation board is designed with pmic
rk808 on top board.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v2:
- remove rk808 since without i2c, which will upstream independently
- remove es8316 since without i2c, which will upstream independently
Documen
This patch add rk3399-evb.dts for RK3399 evaluation board.
Tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v4:
- add google,rk3399evb-rev2 compatible (Doug, Heiko)
changes in v3:
- add more compatible (Doug)
- add modle
arch/arm64/boot/dts/ro
From: Shawn Lin <shawn@rock-chips.com>
Add "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk3399 platform.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Shawn Lin <shawn....@rock-chips.com>
Signed-off-by: Jianqun Xu <
/182
and on the following branch:
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git
irq/percpu-partition
And it has been tested on RK3399 evb and works well.
Tested-by: Brian Norris <briannor...@chromium.org>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
c
Use "rockchip,rk3399-evb" compatible string for Rockchip RK3399
evaluation board.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v4:
- none
changes in v3:
- modify title (Rob)
Documentation/devicetree/binding
Add dtsi file for RK3399 SoCs, and evb dts file for RK3399 evb.
To make patch more easily to be reviewed, some nodes have been removed
temporarily, after this base file been applied, more patches will be
upstreamed independently.
Jianqun Xu (3):
ARM64: dts: rockchip: add core dtsi file
From: Shawn Lin <shawn@rock-chips.com>
Add "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk3399 platform.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Shawn Lin <shawn....@rock-chips.com>
Signed-off-by: Jianqun Xu <
This patch add rk3399-evb.dts for RK3399 evaluation board.
Tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v3:
- add more compatible (Doug)
- add modle
arch/arm64/boot/dts/rockchip/Makefile | 1 +
arch/arm64/boot/dts/rockchip/rk3399-evb.dts
/182
and on the following branch:
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git
irq/percpu-partition
And it has been tested on RK3399 evb and works well.
Tested-by: Brian Norris <briannor...@chromium.org>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
c
Add dtsi file for RK3399 SoCs, and evb dts file for RK3399 evb.
To make patch more easily to be reviewed, some nodes have been removed
temporarily, after this base file been applied, more patches will be
upstreamed independently.
Jianqun Xu (3):
ARM64: dts: rockchip: add core dtsi file
Use "rockchip,rk3399-evb" compatible string for Rockchip RK3399
evaluation board.
Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes in v3:
- modify title (Rob)
Documentation/devicetree/bindings/arm/rockchip.txt | 6 +++
This patch adds core dtsi file for rk3399 found on Rockchip
rk3399 SoCs, tested on rk3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1744 ++
1 file changed, 1744 insertions(+)
create mode 100644 arch
This patch adds rk3399.dtsi for rk3399 found on Rockchip
RK3399 SoCs, also add rk3399-evb.dts for Rockchip RK3399
Evaluation Board.
Patch is tested on RK3399 evb.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/Makefile |1 +
arch/arm64/bo
Fix RK3368_* to RK3399_* for rk3399 clk_test clock.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3399.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3399.c
b/drivers/clk/rockchip/clk-rk3399.c
index 2
Fix RK3368_CLKSEL_CON to RK3399_CLKSEL_CON for rk3399 clock
driver.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3399.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3399.c
b/drivers/clk/rockchip/clk-
ean Paul <seanp...@chromium.org>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
b/drivers/gpu/drm/bridge/analogix/anal
np...@chromium.org>
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
b/drivers/gpu/drm/bridge/analogix/analogix_dp_r
:
- pclk_ddr_mon
- clk_dfimon0_timer
- clk_dfimon1_timer
- aclk_dcf
- pclk_dcf
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3399.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3399.c
b/drive
Fix aclk_emmcgrf to aclk_emmc_grf, and fix aclk_emmccore to be
aclk_emmc_core.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3399.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/rockchip/clk-rk3399.c
b/drivers/clk/ro
core0~3
cpu_l | cpu0 |
cpu_l | cpu1 | clust0
cpu_l | cpu2 |
cpu_l | cpu3 |
--
cpu_b | cpu4 |
cpu_b | cpu5 | clust1
cpu_b | cpu6 |
cpu_b | cpu7 |
It makes no other change, just keep same with other SoCs definations.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
Add more nodes to RK3368 core dts file for RK3368 SoCs, and disable mailbox
in core dts file.
Jianqun Xu (4):
ASoC: rockchip: add bindings for rk3368 i2s
arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
arm64: dts: rockchip: add amba node support for RK3368 SoCs
arm64: dts
Add devicetree bindings for i2s controller found on rk3368
processors from rockchip.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
Documentation/devicetree/bindings/sound/rockchip-i2s.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/sound/ro
There are two dmacs found on RK3368 SoCs, peripher dmac and bus dmac,
and the dmacs are same as previous SoCs' dmac.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff
I2S of RK3368 SoCs keep same as RK3066 SoCs found on Rockchip,
add nodes to support them.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 38
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/bo
Default to disable mailbox in rk3368 core dts file.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
There are two dmacs found on RK3368 SoCs, peripher dmac and bus dmac,
and the dmacs are same as previous SoCs' dmac.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes since v1:
- none
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 31 +++
1 file chang
These patches add dmac, i2s nodes, and disable mailbox.
Jianqun Xu (3):
arm64: dts: rockchip: add amba node support for RK3368 SoCs
arm64: dts: rockchip: add i2s nodes support for RK3368 SoCs
arm64: dts: rockchip: disable mailbox of RK3368 SoCs defaultly
arch/arm64/boot/dts/rockchip
I2S of RK3368 SoCs keep same as RK3066 SoCs found on Rockchip,
add nodes to support them.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes since v1:
- fix compile error caused by dumplicate label 'i2s1'
arch/arm64/boot/dts/rockchip/rk3368.dts
Default to disable mailbox in rk3368 core dts file.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
changes since v1:
- none
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
b/arch/arm64/bo
Add opp tables for cpu cluster0 and cluster1 by including
rk3399-opp.dtsi.
Signed-off-by: Jianqun Xu <jay...@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm6
This patch makes the rockchip i2s pcm configurable by adding
rockchip pcm config for devm_snd_dmaengine_pcm_register.
Signed-off-by: Jianqun Xu
---
sound/soc/rockchip/Makefile | 3 ++-
sound/soc/rockchip/rockchip_i2s.c | 3 ++-
sound/soc/rockchip/rockchip_pcm.c | 45
Add opp tables for cpu cluster0 and cluster1 by including
rk3399-opp.dtsi.
Signed-off-by: Jianqun Xu
---
arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-firefly.dts
b/arch/arm64/boot/dts/rockchip/rk3399
Make pinctrl-rockchip driver to be tristate module, support to build as
a module, this is useful for GKI.
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/Kconfig| 2 +-
drivers/pinctrl/pinctrl-rockchip.c | 13 +
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git
Make pinctrl-rockchip driver to be tristate module, support to build as
a module, this is useful for GKI.
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/Kconfig| 2 +-
drivers/pinctrl/pinctrl-rockchip.c | 18 ++
2 files changed, 19 insertions(+), 1 deletion(-)
diff
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/pinctrl-rockchip.c | 28
1 file changed, 12 insertions(+), 16 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c
b/drivers/pinctrl/pinctrl-rockchip.c
index 58fd4d822591..c98bd352f831 100644
--- a/drivers/pinctrl/p
From: Heiko Stuebner
The Rockchip pinctrl driver needs to handle information from Devicetree
so only makes sense getting compiled on systems with CONFIG_OF enabled.
This also fixes a problem found by the "kernel-test-robot" when compiling
the driver on test-builds that do not have CONFIG_OF
There need to enable pclk_gpio when do irq_create_mapping, since it will
do access to gpio controller.
Reviewed-by: Heiko Stuebner
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/pinctrl-rockchip.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c
b
These patches will fix some issues and modify for GKI.
Heiko Stuebner (1):
pinctrl: rockchip: depend on OF
Jianqun Xu (4):
pinctrl: rockchip: make driver be tristate module
pinctrl: rockchip: enable gpio pclk for rockchip_gpio_to_irq
pinctrl: rockchip: create irq mapping in gpio_to_irq
Remove totally irq mappings create in probe, the gpio irq mapping will
be created when do
gpio_to_irq ->
rockchip_gpio_to_irq ->
irq_create_mapping
This patch can speed up system boot on, also abandon many unused irq
mappings' create.
Signed-off-by: Jian
Fix rockchip pinctrl driver for GKI
Jianqun Xu (6):
pinctrl: rockchip: make driver be tristate module
pinctrl: rockchip: enable gpio pclk for rockchip_gpio_to_irq
pinctrl: rockchip: create irq mapping in gpio_to_irq
pinctrl: rockchip: do not set gpio if bank invalid
pinctrl: rockchip
There need to enable pclk_gpio when do irq_create_mapping, since it will
do access to gpio controller.
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/pinctrl-rockchip.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c
b/drivers/pinctrl/pinctrl-rockchip.c
Make pinctrl-rockchip driver to be tristate module, support to build as
a module, this is useful for GKI.
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/Kconfig| 2 +-
drivers/pinctrl/pinctrl-rockchip.c | 7 +++
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git
Add valid check for gpio bank.
Change-Id: Ib03e2910a7316bd61df18236151e371c4d04077a
Signed-off-by: Jianqun Xu
---
drivers/pinctrl/pinctrl-rockchip.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c
b/drivers/pinctrl/pinctrl-rockchip.c
index
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