to `clk_get_parent'
Reported-by: kernel test robot
Signed-off-by: Krzysztof Kozlowski
---
arch/mips/ralink/clk.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
index 2f9d5acb38ea..8387177a47ef 100644
--- a/arch/mips/ralink/clk.c
On 16/03/2021 17:14, Dmitry Osipenko wrote:
> 16.03.2021 18:51, Krzysztof Kozlowski пишет:
>>>>
>>>> But if COMMON_CLK is disabled, then include/linux/clk.h provides a stub
>>>> for clk_get_parent(), meaning that MIPS has its own COMMON_CLK, no?
>>
On Tue, 16 Mar 2021 at 16:47, Krzysztof Kozlowski
wrote:
>
> On Tue, 16 Mar 2021 at 16:43, Dmitry Osipenko wrote:
> >
> > 16.03.2021 10:55, Krzysztof Kozlowski пишет:
> > > From: Krzysztof Kozlowski
> > >
> > > The Tegra USB PHY driver uses Common
On Tue, 16 Mar 2021 at 16:43, Dmitry Osipenko wrote:
>
> 16.03.2021 10:55, Krzysztof Kozlowski пишет:
> > From: Krzysztof Kozlowski
> >
> > The Tegra USB PHY driver uses Common Clock Framework thus it cannot be
> > built on platforms without it (e.g. co
The following commit has been merged into the irq/core branch of tip:
Commit-ID: 5c982c58752118b6c1f295024d3fda5ff22d3c52
Gitweb:
https://git.kernel.org/tip/5c982c58752118b6c1f295024d3fda5ff22d3c52
Author:Krzysztof Kozlowski
AuthorDate:Tue, 16 Mar 2021 11:02:05 +01:00
On 28/10/2020 23:29, Krzysztof Kozlowski wrote:
> Use PLATFORM_DEVID_NONE define instead of "-1" value because:
> - it brings some meaning,
> - it might point attention why auto device ID was not used.
>
> Signed-off-by: Krzysztof Kozlowski
> Acked-by: Char
From: Krzysztof Kozlowski
The driver was using subsys_initcall() because in old times deferred
probe was not supported everywhere and specific ordering was needed.
Since probe deferral works fine and specific ordering is discouraged
(hides dependencies between drivers and couples their boot
On 16/03/2021 10:56, Johan Hovold wrote:
> On Tue, Mar 16, 2021 at 10:47:53AM +0100, Krzysztof Kozlowski wrote:
>> On 16/03/2021 10:02, Johan Hovold wrote:
>>> On Mon, Mar 15, 2021 at 07:12:12PM +0100, Krzysztof Kozlowski wrote:
>>>> Since interrupt handler is called
Fix some language typos and misspellings in comments. No functional
changes.
Signed-off-by: Krzysztof Kozlowski
---
kernel/irq/chip.c | 6 +++---
kernel/irq/ipi.c | 2 +-
kernel/irq/manage.c| 6 +++---
kernel/irq/matrix.c| 2 +-
kernel/irq/migration.c | 2 +-
kernel/irq
On 16/03/2021 10:02, Johan Hovold wrote:
> On Mon, Mar 15, 2021 at 07:12:12PM +0100, Krzysztof Kozlowski wrote:
>> Since interrupt handler is called with disabled local interrupts, there
>> is no need to use the spinlock primitives disabling interrupts as well.
>
> This isn
From: Krzysztof Kozlowski
Milo Kim's email in TI bounces with permanent error (550: Invalid
recipient). Last email from him on LKML was in 2017. Move Milo Kim to
credits and remove the separate driver entries for:
- TI LP855x backlight driver,
- TI LP8727 charger driver,
- TI LP8788 MFD
From: Krzysztof Kozlowski
COMMON_CLK is a user-selectable option with its own dependencies. The
most important dependency is !HAVE_LEGACY_CLK. User-selectable drivers
should not select COMMON_CLK because they will create a dependency cycle
and build failures.
Signed-off-by: Krzysztof
From: Krzysztof Kozlowski
The Tegra USB PHY driver uses Common Clock Framework thus it cannot be
built on platforms without it (e.g. compile test on MIPS with RALINK and
SOC_RT305X):
/usr/bin/mips-linux-gnu-ld: drivers/usb/phy/phy-tegra-usb.o: in function
`tegra_usb_phy_init':
phy
Since interrupt handler is called with disabled local interrupts, there
is no need to use the spinlock primitives disabling interrupts as well.
Suggested-by: Andy Shevchenko
Signed-off-by: Krzysztof Kozlowski
---
drivers/tty/serial/samsung_tty.c | 15 ++-
1 file changed, 6
On 15/03/2021 14:08, Xiaofeng Cao wrote:
> change 'freqency' to 'frequency'
> change 'accoriding' to 'according'
> change 'untile' to 'until'
> change 'souce' to 'source'
> change 'divier' to 'divider'
>
> Signed-off-by: Xiaofeng Cao
> ---
> drivers/cpufreq/s5pv210-cpufreq.c | 10 +-
>
Add vendor prefix for Siliconfile Technologies lnc.
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Documentation/devicetree/bindings
Add vendor prefix for YIC System Co., Ltd (http://www.yicsystem.com).
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Documentation
Add vendor prefix for AESOP Embedded Forum (http://www.aesop.or.kr).
Signed-off-by: Krzysztof Kozlowski
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b/Documentation
Fixups some white-space issues. Checkpatch reported:
WARNING: Block comments should align the * on each line
WARNING: please, no spaces at the start of a line
ERROR: code indent should use tabs where possible
Signed-off-by: Krzysztof Kozlowski
---
.../boot/dts/exynos4412-odroid
Fixup white-space issue:
WARNING: please, no spaces at the start of a line
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
b
The compatibles with "ntc" vendor prefix become deprecated and "murata"
should be used.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/boot/dts/exynos3250-monk.dts | 4 ++--
arch/arm/boot/dts/exynos3250-rinato.dts | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-
-cast]
Fixes: b7cec13f082f ("clk: socfpga: Look for the GPIO_DB_CLK by its offset")
Signed-off-by: Krzysztof Kozlowski
Acked-by: Dinh Nguyen
---
Changes since v1:
1. Add Fixes and Ack.
2. Use uintptr_t (Stephen Boyd).
---
drivers/clk/socfpga/clk-gate.c | 2 +-
1 file changed, 1 inser
On 13/03/2021 22:10, Stephen Boyd wrote:
> Quoting Krzysztof Kozlowski (2021-03-11 06:48:33)
>> Pointers should be cast to unsigned long instead of integer. This fixes
>> warning when compile testing on ARM64:
>>
>> drivers/clk/socfpga/clk-gate.c: In functi
On 12/03/2021 15:55, Sebastian Andrzej Siewior wrote:
> On 2021-03-12 15:53:53 [+0100], Krzysztof Kozlowski wrote:
>> Yeah, it missed the merge window...
>
> Could you please send it for -rc3?
I meant, the pull missed the merge window. Chanwoo already confirmed he
will be sen
On 12/03/2021 15:53, Sebastian Andrzej Siewior wrote:
> On 2021-03-12 15:45:48 [+0100], Krzysztof Kozlowski wrote:
>> Did you base your work on next?
>
> no, -rc2.
Yeah, it missed the merge window...
Best regards,
Krzysztof
On Fri, 12 Mar 2021 at 15:10, Sebastian Andrzej Siewior
wrote:
>
> CHARGER_MAX8997 fails to compile without CONFIG_EXTCON. There are stubs
> already present for *extcon_*_notifier() but are missing for the _all()
> variant.
>
> Add *extcon_*_notifier_all() stubs for !CONFIG_EXTCON.
>
> Fixes:
On 12/03/2021 13:08, Bhaskar Chowdhury wrote:
>
> s/untile/until/
> s/souce/source/
> s/divier/divider/
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> drivers/cpufreq/s5pv210-cpufreq.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git
On 11/03/2021 19:26, Tom Rix wrote:
>
> On 3/11/21 7:25 AM, Krzysztof Kozlowski wrote:
>> Hi,
>>
>> All three Intel arm64 SoCFPGA architectures (Agilex, N5X and Stratix 10)
>> are basically flavors/platforms of the same architecture. At least from
>> the
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them. After conversion of all
drivers to use the new ARCH_INTEL_SOCFPGA, the remaining ARM option can
be removed.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/configs/multi_v7_defconfig | 2 +-
arch/arm
ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the
32-bit ARM drivers to rely on new symbol.
Signed-off-by: Krzysztof Kozlowski
---
drivers/fpga/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index
ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the
32-bit ARM drivers to rely on new symbol.
Signed-off-by: Krzysztof Kozlowski
---
drivers/reset/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index
ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the
32-bit ARM drivers to rely on new symbol.
The side effect is that the I2C_ALTERA will now be available for both
32-bit and 64-bit Intel SoCFPGA, even though it is used only for 32-bit.
Signed-off-by: Krzysztof Kozlowski
ARCH_SOCFPGA is being renamed to ARCH_INTEL_SOCFPGA so adjust the
32-bit ARM drivers to rely on new symbol.
Signed-off-by: Krzysztof Kozlowski
---
drivers/dma/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 0c2827fd8c19
for building 32-bit clock
driverss, similar to one for 64-bit. This allows enabling compile
testing.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/socfpga/Kconfig | 6 +-
drivers/clk/socfpga/Makefile | 4 ++--
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/clk
The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
or COMMON_CLK so they should be compile testable on most of the
platforms.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/Makefile| 2 +-
drivers/clk/socfpga/Kconfig | 15 ---
2 files changed, 13
be available for
both 32-bit and 64-bit Intel SoCFPGA, even though it is used only for
32-bit.
Signed-off-by: Krzysztof Kozlowski
---
drivers/mfd/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index a03de3f7a8ed..8af8c3196f1d
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them. This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/Kconfig
on ARCH_AGILEX but this was not
modeled in Kconfig. In current stage the ARCH_N5X is simply
unbootable.
Add a separate Kconfig entry for clocks used by both ARCH_N5X and
ARCH_AGILEX so the necessary objects will be built if either of them is
selected.
Signed-off-by: Krzysztof Kozlowski
---
drivers
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them. This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.
Signed-off-by: Krzysztof Kozlowski
---
drivers/edac/Kconfig
days on the lists).
I compare the generated autoconf.h and found no issues. Testing on real
hardware would be appreciated.
Best regards,
Krzysztof
Krzysztof Kozlowski (15):
clk: socfpga: allow building N5X clocks with ARCH_N5X
ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA
mfd: altera
this by merging all three architectures into
ARCH_INTEL_SOCFPGA and dropping the other ARCH* arm64 Kconfig entries.
The side effect is that the INTEL_STRATIX10_SERVICE will now be
available for both 32-bit and 64-bit Intel SoCFPGA, even though it is
used only for 64-bit.
Signed-off-by: Krzysztof Kozlowski
removed duplicated line in the Makefile (selecting
common part of clocks per platform).
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/socfpga/Kconfig | 6 +++---
drivers/clk/socfpga/Makefile | 7 +++
2 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/socfpga/Kconfig
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them. This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/Makefile
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them. This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.
Signed-off-by: Krzysztof Kozlowski
---
drivers/net/ethernet
On 11/03/2021 10:14, Arnd Bergmann wrote:
> On Thu, Mar 11, 2021 at 8:08 AM Krzysztof Kozlowski
> wrote:
>> On 10/03/2021 17:42, Arnd Bergmann wrote:
>>> On Wed, Mar 10, 2021 at 4:54 PM Krzysztof Kozlowski
>>> wrote:
>>>> On 10/03/2021 16:47, Krzyszt
-to-int-cast]
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/socfpga/clk-gate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c
index 43ecd507bf83..c876523d5d51 100644
--- a/drivers/clk/socfpga/clk-gate.c
+++ b
On 10/03/2021 17:48, Arnd Bergmann wrote:
> On Wed, Mar 10, 2021 at 9:38 AM Krzysztof Kozlowski
> wrote:
>> --- a/drivers/clk/socfpga/Kconfig
>> +++ b/drivers/clk/socfpga/Kconfig
>> @@ -1,6 +1,17 @@
>> # SPDX-License-Identifier: GPL-2.0
>> +config COMMO
On 10/03/2021 17:42, Arnd Bergmann wrote:
> On Wed, Mar 10, 2021 at 4:54 PM Krzysztof Kozlowski
> wrote:
>> On 10/03/2021 16:47, Krzysztof Kozlowski wrote:
>>> This edac Altera driver is very weird... it uses the same compatible
>>> differently depending whether
On 10/03/2021 16:47, Krzysztof Kozlowski wrote:
> On 10/03/2021 16:39, Arnd Bergmann wrote:
>> On Wed, Mar 10, 2021 at 4:06 PM Krzysztof Kozlowski
>> wrote:
>>> On 10/03/2021 15:45, Tom Rix wrote:
>>>> On 3/10/21 1:45 AM, Lee Jones wrote:
>>>
>>&
On 10/03/2021 16:39, Arnd Bergmann wrote:
> On Wed, Mar 10, 2021 at 4:06 PM Krzysztof Kozlowski
> wrote:
>> On 10/03/2021 15:45, Tom Rix wrote:
>>> On 3/10/21 1:45 AM, Lee Jones wrote:
>>
>> Many other architectures do not have vendor prefix (TEGRA, EXY
On 10/03/2021 15:45, Tom Rix wrote:
>
> On 3/10/21 1:45 AM, Lee Jones wrote:
>> On Wed, 10 Mar 2021, Krzysztof Kozlowski wrote:
>>
>>> Prepare for merging Stratix 10, Agilex and N5X into one arm64
>>> architecture by first renaming the ARCH_STRATIX10 into
The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
or COMMON_CLK so they should be compile testable on most of the
platforms.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/Makefile| 5 +
drivers/clk/socfpga/Kconfig | 17 ++---
2 files changed
-by: Krzysztof Kozlowski
---
arch/arm64/Kconfig.platforms| 7 ---
arch/arm64/boot/dts/altera/Makefile | 2 +-
arch/arm64/configs/defconfig| 2 +-
drivers/clk/Makefile| 2 +-
drivers/clk/socfpga/Kconfig | 4 ++--
drivers
this by merging all three architectures into
ARCH_SOCFPGA64.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/Kconfig.platforms | 10 --
arch/arm64/boot/dts/intel/Makefile | 6 +++---
arch/arm64/configs/defconfig | 1 -
drivers/clk/socfpga/Kconfig| 4 ++--
drivers/firmware
removed duplicated line in the Makefile (selecting
common part of clocks per platform).
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/socfpga/Kconfig | 8
drivers/clk/socfpga/Makefile | 7 +++
2 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/socfpga
on ARCH_AGILEX but this was not
modeled in Kconfig. In current stage the ARCH_N5X is simply
unbootable.
Add a separate Kconfig entry for clocks used by both ARCH_N5X and
ARCH_AGILEX so the necessary objects will be built if either of them is
selected.
Signed-off-by: Krzysztof Kozlowski
---
drivers
(with ARCH_STRATIX10
and COMPILE_TEST but without selecting some of the clocks).
I tested compile builds on few configurations, so I hope kbuild 0-day
will check more options (please give it few days on the lists).
Best regards,
Krzysztof
Krzysztof Kozlowski (5):
clk: socfpga: allow building N5X clocks
On 09/03/2021 14:42, Martin Kepplinger wrote:
> this reverts commit ce58459d8c7f4174e7b8a8ea903dd949631334a3 for imx8mq.
>
> this is most likely not the real fix but works around the problem I have
> (with v5.12-rc2) I want to report:
>
> [0.766925] SoC revision 0x21
> [0.770286]
On 08/03/2021 20:07, Dinh Nguyen wrote:
> Hi Krzysztof,
>
> On 3/8/21 11:48 AM, Krzysztof Kozlowski wrote:
>> From: Krzysztof Kozlowski
>>
>> Enable in defconfig two Intel ARM64 architectures: the eASIC N5X SoCFPGA
>> and Keem Bay SoC. This allows compi
On 09/03/2021 09:49, Krzysztof Kozlowski wrote:
> On 08/03/2021 19:23, Krzysztof Kozlowski wrote:
>> The Stratix 10 / Agilex / N5X clocks do not use anything other
>> than OF or COMMON_CLK so they should be compile testable on most of
>> the platforms.
>>
>> S
On 08/03/2021 19:23, Krzysztof Kozlowski wrote:
> The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
> or COMMON_CLK so they should be compile testable on most of the
> platforms.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/clk
The Stratix 10 / Agilex / N5X clocks do not use anything other than OF
or COMMON_CLK so they should be compile testable on most of the
platforms.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/Makefile| 5 +
drivers/clk/socfpga/Kconfig | 22 --
2 files
on ARCH_AGILEX but this was not
modeled in Kconfig. In current stage the ARCH_N5X is simply
unbootable.
Add a separate Kconfig entry for clocks used by both ARCH_N5X and
ARCH_AGILEX so the necessary objects will be built if either of them is
selected.
Signed-off-by: Krzysztof Kozlowski
---
drivers
Three clock drivers are used by Stratix 10, Agilex and N5X, so use
separate dedicated Kconfig entry to get rid of duplicated Makefile
lines. This will also allow later compile testing.
Signed-off-by: Krzysztof Kozlowski
---
drivers/clk/socfpga/Kconfig | 7 +++
drivers/clk/socfpga/Makefile
,
Krzysztof
Krzysztof Kozlowski (3):
clk: socfpga: allow building N5X clocks with ARCH_N5X
clk: socfpga: drop duplicated lines in Makefile
clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 4 +---
drivers
From: Krzysztof Kozlowski
Enable in defconfig two Intel ARM64 architectures: the eASIC N5X SoCFPGA
and Keem Bay SoC. This allows compile coverage when building default
config.
For the N5X (and Agilex) enable also DesignWare SPI controller in MMIO.
Signed-off-by: Krzysztof Kozlowski
---
Hi
From: Krzysztof Kozlowski
The usual usb-nop-xceiv USB phy node should be under root node, to fix
dtc warning:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:472.21-476.5:
Warning (simple_bus_reg): /soc/usbphy@0: missing or empty reg/ranges
property
Signed-off-by: Krzysztof
From: Krzysztof Kozlowski
Align the LED node names with dtschema to silence dtbs_check warnings
like:
leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes:
'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/boot/dts/intel
From: Krzysztof Kozlowski
Align the NAND, GIC and UART node names with dtschema to silence
dtbs_check warnings like:
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml:
intc@fffc1000: $nodename:0: 'intc@fffc1000' does not match
'^interrupt-controller(@[0-9a-f,]+)*$'
arch
From: Krzysztof Kozlowski
Align the LED node names with dtschema to silence dtbs_check warnings
like:
leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes:
'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/boot/dts/intel
From: Krzysztof Kozlowski
The ARM architected timer is part of ARM CPU design therefore by
convention it should not be inside the soc node. This also fixes dtc
warning like:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:410.9-416.5:
Warning (simple_bus_reg): /soc/timer: missing
From: Krzysztof Kozlowski
Use human-readable defines for GIC interrupt type and flag, instead of
hard-coding the numbers. It makes review easier. No functional change.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 137 +++---
1 file
From: Krzysztof Kozlowski
New nodes are okay by default.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index
From: Krzysztof Kozlowski
Using full paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand
From: Krzysztof Kozlowski
Hi Dinh, Arnd and Olof,
This is just a resend of previous patch.
Best regards,
Krzysztof
Krzysztof Kozlowski (10):
dt-bindings: arm: intel,keembay: limit the dtschema to root node
arm64: dts: intel: socfpga: override clocks by label
arm64: dts: intel
From: Krzysztof Kozlowski
The clocks are usually not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node fixes dtc warning:
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:111.10-137.5:
Warning (simple_bus_reg): /soc/clocks: missing or empty
From: Krzysztof Kozlowski
The check for the board compatible should be limited only to the root
node. Any other nodes with such compatible are not part of this schema
and should not match.
Signed-off-by: Krzysztof Kozlowski
Acked-by: Daniele Alessandrelli
---
Documentation/devicetree
On Mon, Mar 08, 2021 at 05:22:18PM +0100, Krzysztof Kozlowski wrote:
> Hi Arnd and Olof,
>
> This is just a resend of previous patch. Since I did not get replies
> from Intel maintainers, I assume this could go via soc tree directly.
Actually it is my bad because I think I skipped
On Mon, 8 Mar 2021 at 17:02, Arnd Bergmann wrote:
>
> On Mon, Mar 8, 2021 at 4:33 PM Krzysztof Kozlowski wrote:
> >
> > On 08/03/2021 16:29, Arnd Bergmann wrote:
> > > From: Arnd Bergmann
> > >
> > > Some of the extcon interfaces have a fallback impl
On 08/03/2021 16:29, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Some of the extcon interfaces have a fallback implementation that can
> be used when EXTCON is disabled, but some others do not, causing a
> build failure:
>
> drivers/power/supply/max8997_charger.c:261:9: error: implicit
On Mon, Sep 21, 2020 at 11:42:40AM +0200, Marek Szyprowski wrote:
> Hi Krzysztof,
>
> On 11.09.2020 16:54, Krzysztof Kozlowski wrote:
> > On Sun, Sep 06, 2020 at 04:21:45PM +0200, Krzysztof Kozlowski wrote:
> >> Commit 68605101460e ("ARM: dts: exynos: Ad
On Thu, 4 Mar 2021 08:57:51 +0100, Krzysztof Kozlowski wrote:
> Since I plan to use my Canonical address for reviews and other
> maintenance activities, reflect this in MAINTAINERS to avoid any
> confusion.
Applied, thanks!
[1/1] MAINTAINERS: use Krzysztof Kozlowski's Canonica
On 07/03/2021 17:01, Arnd Bergmann wrote:
> On Sun, Mar 7, 2021 at 12:34 PM Krzysztof Kozlowski
> wrote:
>> On 05/03/2021 17:29, Hector Martin wrote:
>>> On 06/03/2021 01.20, Andy Shevchenko wrote:
>>>>> I am just splitting an
>>>>> e
On 05/03/2021 21:41, Rob Herring wrote:
> On Mon, Feb 15, 2021 at 10:29:15AM +0100, Krzysztof Kozlowski wrote:
>> On Mon, Feb 15, 2021 at 10:01:48AM +0100, Marek Szyprowski wrote:
>>> Hi Krzysztof,
>>>
>>> On 12.02.2021 17:38, Krzysztof Kozlowski wrote:
On 05/03/2021 21:49, Rob Herring wrote:
> On Fri, Feb 12, 2021 at 05:39:05PM +0100, Krzysztof Kozlowski wrote:
>> Include the generic serial.yaml dtschema so the child node like
>> "bluetooh" will be properly matched:
>>
>> arch/arm/boot/dts/exynos4210-
On 05/03/2021 18:04, Hector Martin wrote:
> On 06/03/2021 00.28, Andy Shevchenko wrote:
>>> + case TYPE_APPLE_S5L:
>>> + WARN_ON(1); // No DMA
>>
>> Oh, no, please use the ONCE variant.
>
> Thanks, changing this for v4.
>
>>
>> ...
>>
>>> + /* Apple types use these bits
On 05/03/2021 17:29, Hector Martin wrote:
> On 06/03/2021 01.20, Andy Shevchenko wrote:
>>> I am just splitting an
>>> existing function into two, where one takes the lock and the other does
>>> the work. Do you mean using a different locking function? I'm not
>>> entirely sure what you're
On 06/03/2021 18:22, Christophe JAILLET wrote:
> Le 06/03/2021 à 17:16, Krzysztof Kozlowski a écrit :
>> On 06/03/2021 15:21, Christophe JAILLET wrote:
>>> Some 'clk_prepare_enable()' and 'clk_get()' must be undone in the error
>>> handling path of the probe function, as
On 06/03/2021 15:21, Christophe JAILLET wrote:
> Some 'clk_prepare_enable()' and 'clk_get()' must be undone in the error
> handling path of the probe function, as already done in the remove
> function.
>
> Fixes: 3fc154b6b813 ("USB Gadget driver for Samsung s3c2410 ARM SoC")
> Signed-off-by:
On 06/03/2021 15:21, Christophe JAILLET wrote:
> Since commit 188db4435ac6 ("usb: gadget: s3c: use platform resources"),
> 'request_mem_region()' and 'ioremap()' are no more used, so they don't need
> to be undone in the error handling path of the probe and in the removre
You ignored my comment
On 05/03/2021 12:14, Hector Martin wrote:
> On 05/03/2021 20.03, Krzysztof Kozlowski wrote:
>>> + memory@8 {
>>> + device_type = "memory";
>>> + reg = <0x8 0 0x2 0>; /* To be filled by loader */
>>
>> Shouldn'
On 04/03/2021 04:41, Brad Larson wrote:
> This GPIO driver is for the Pensando Elba SoC which
> provides control of four chip selects on two SPI busses.
>
> Signed-off-by: Brad Larson
> ---
> drivers/gpio/Kconfig | 6 ++
> drivers/gpio/Makefile | 1 +
>
On 04/03/2021 04:41, Brad Larson wrote:
> Add Pensando common and Elba SoC specific device nodes
> and corresponding binding documentation.
>
> Signed-off-by: Brad Larson
> ---
> .../bindings/gpio/pensando,elba-spics.txt | 24 ++
> .../devicetree/bindings/mmc/cdns,sdhci.yaml | 2 +-
>
On 04/03/2021 22:39, Hector Martin wrote:
> This currently supports:
>
> * SMP (via spin-tables)
> * AIC IRQs
> * Serial (with earlycon)
> * Framebuffer
>
> A number of properties are dynamic, and based on system firmware
> decisions that vary from version to version. These are expected
> to be
+--
> include/linux/serial_s3c.h | 16 +++
> 3 files changed, 247 insertions(+), 9 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski
Tested-by: Krzysztof Kozlowski
Best regards,
Krzysztof
> drivers/tty/serial/samsung_tty.c | 17 +
> 1 file changed, 17 insertions(+)
>
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
drivers already do it this way, anyway.
>
> Signed-off-by: Hector Martin
> ---
> drivers/tty/serial/samsung_tty.c | 25 +++--
> 1 file changed, 3 insertions(+), 22 deletions(-)
Reviewed-by: Krzysztof Kozlowski
Tested-by: Krzysztof Kozlowski
Best regards,
Krzysztof
drivers/tty/serial/samsung_tty.c | 34 +++-
> 1 file changed, 20 insertions(+), 14 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski
Tested-by: Krzysztof Kozlowski
Best regards,
Krzysztof
/serial/samsung_tty.c | 112 +++
> 1 file changed, 70 insertions(+), 42 deletions(-)
>
Reviewed-by: Krzysztof Kozlowski
Tested-by: Krzysztof Kozlowski
Best regards,
Krzysztof
PORT_S3C2440)
> - ucon_mask |= S3C2440_UCON0_DIVMASK;
> -
> - ucon &= ucon_mask;
> - wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
> + ucon &= (info->clksel_mask | info->ucon_mask);
> + wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
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