[PATCH 1/8] x86/platform/uv: Save OEM_ID from ACPI MADT probe

Save the OEM_ID and OEM_TABLE_ID passed to the apic driver probe function for later use. Also, convert the char list arg passed from the kernel to a true null-terminated string. Signed-off-by: Mike Travis Reviewed-by: Steve Wahl Reviewed-by: Dimitri Sivanich --- arch/x86/kernel/apic

[PATCH 2/8] x86/platform/uv: Return UV Hubless System Type

Return the type of UV hubless system for UV specific code that depends on that. Use a define to indicate the change in arg type for this function in uv.h. Add a function to convert UV system type to bit pattern needed for is_uv_hubless(). Signed-off-by: Mike Travis Reviewed-by: Steve Wahl

[PATCH 6/8] x86/platform/uv: Decode UVsystab Info

Decode the hubless UVsystab passed from BIOS to the kernel saving pertinent info in a similar manner that hubbed UVsystabs are decoded. Signed-off-by: Mike Travis Reviewed-by: Steve Wahl Reviewed-by: Dimitri Sivanich --- arch/x86/kernel/apic/x2apic_uv_x.c | 16 ++-- 1 file

[PATCH 8/8] x86/platform/uv: Account for UV Hubless in is_uvX_hub Ops

The references in the is_uvX_hub() function uses the hub_info pointer which will be NULL when the system is hubless. This change avoids that NULL dereference. It is also an optimization in performance. Signed-off-by: Mike Travis Reviewed-by: Steve Wahl Reviewed-by: Dimitri Sivanich --- arch

[PATCH 7/8] x86/platform/uv: Check EFI Boot to set reboot type

Change to checking for EFI Boot type from previous check on if this is a KDUMP kernel. This allows for KDUMP kernels that can handle EFI reboots. Signed-off-by: Mike Travis Reviewed-by: Steve Wahl Reviewed-by: Dimitri Sivanich --- arch/x86/kernel/apic/x2apic_uv_x.c | 18

Re: [PATCH v3 8/9] x86/mm/tlb: Remove UV special case

PM, Nadav Amit wrote: SGI UV support is outdated and not maintained, and it is not clear how it performs relatively to non-UV. Remove the code to simplify the code. Cc: Peter Zijlstra Cc: Dave Hansen Acked-by: Mike Travis Suggested-by: Andy Lutomirski Signed-off-by: Nadav Amit --- arch/x86

Re: [PATCH v2 8/9] x86/mm/tlb: Remove UV special case

On 7/9/2019 2:09 PM, Nadav Amit wrote: On Jul 9, 2019, at 1:29 PM, Mike Travis wrote: On 7/9/2019 1:09 PM, Russ Anderson wrote: On Tue, Jul 09, 2019 at 09:50:27PM +0200, Thomas Gleixner wrote: On Tue, 2 Jul 2019, Nadav Amit wrote: SGI UV support is outdated and not maintained

Re: [PATCH v2 8/9] x86/mm/tlb: Remove UV special case

On 7/9/2019 1:09 PM, Russ Anderson wrote: On Tue, Jul 09, 2019 at 09:50:27PM +0200, Thomas Gleixner wrote: On Tue, 2 Jul 2019, Nadav Amit wrote: SGI UV support is outdated and not maintained, and it is not clear how it performs relatively to non-UV. Remove the code to simplify the code.

Re: [PATCH 3/6] bitmap_parselist: rework input string parser

On 3/26/2019 2:09 PM, Yuri Norov wrote: + Mike Travis + Thomas Gleixner -- On Tue, Mar 26, 2019 at 12:07:45AM +0300, Yury Norov wrote: The requirement for this rework is to keep the __bitmap_parselist() copy-less

Re: [PATCH v3 6/6] x86/mm/KASLR: Do not adapt the size of the direct mapping section for SGI UV system

y sent you a note about this?) To fix this, I sent in two patches, the first had this is_early_uv_system() function defined and the second had the check to avoid adjusting TSC too early. The commit referred to is: commit 20a8378aa9dd108a01cb0e695599f5257a885c4b Author: Mike Travis Date: Tue O

Re: [Patch v3 0/4] Protect against concurrent calls into UV BIOS

On 2/14/2019 1:21 PM, Dimitri Sivanich wrote: For the series: Reviewed-by: Dimitri Sivanich As well as I: Reviewed-by: Mike Travis On Wed, Feb 13, 2019 at 07:34:09PM +, Hedi Berriche wrote: - Changes since v2 Addressed comments from Ard Biesheuvel: * expose efi_runtime_lock

[tip:x86/urgent] x86/tsc: Fix UV TSC initialization

Commit-ID: 2647c43c7f3ba4b752bfce261d53b16e2f5bc9e3 Gitweb: https://git.kernel.org/tip/2647c43c7f3ba4b752bfce261d53b16e2f5bc9e3 Author: Mike Travis AuthorDate: Tue, 2 Oct 2018 13:01:46 -0500 Committer: Thomas Gleixner CommitDate: Tue, 2 Oct 2018 21:29:16 +0200 x86/tsc: Fix UV TSC

[tip:x86/urgent] x86/tsc: Fix UV TSC initialization

Commit-ID: 2647c43c7f3ba4b752bfce261d53b16e2f5bc9e3 Gitweb: https://git.kernel.org/tip/2647c43c7f3ba4b752bfce261d53b16e2f5bc9e3 Author: Mike Travis AuthorDate: Tue, 2 Oct 2018 13:01:46 -0500 Committer: Thomas Gleixner CommitDate: Tue, 2 Oct 2018 21:29:16 +0200 x86/tsc: Fix UV TSC

[tip:x86/urgent] x86/platform/uv: Provide is_early_uv_system()

Commit-ID: 20a8378aa9dd108a01cb0e695599f5257a885c4b Gitweb: https://git.kernel.org/tip/20a8378aa9dd108a01cb0e695599f5257a885c4b Author: Mike Travis AuthorDate: Tue, 2 Oct 2018 13:01:45 -0500 Committer: Thomas Gleixner CommitDate: Tue, 2 Oct 2018 21:29:16 +0200 x86/platform/uv: Provide

[tip:x86/urgent] x86/platform/uv: Provide is_early_uv_system()

Commit-ID: 20a8378aa9dd108a01cb0e695599f5257a885c4b Gitweb: https://git.kernel.org/tip/20a8378aa9dd108a01cb0e695599f5257a885c4b Author: Mike Travis AuthorDate: Tue, 2 Oct 2018 13:01:45 -0500 Committer: Thomas Gleixner CommitDate: Tue, 2 Oct 2018 21:29:16 +0200 x86/platform/uv: Provide

[PATCH 2/2] x86/tsc: Fix UV TSC initialization

n tsc_init(). Fixes: cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once") Signed-off-by: Mike Travis Suggested-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/kernel/tsc.c |4 1 file changed, 4 insertions(+) --- linux.orig/arch/x86/k

[PATCH 2/2] x86/tsc: Fix UV TSC initialization

n tsc_init(). Fixes: cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once") Signed-off-by: Mike Travis Suggested-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/kernel/tsc.c |4 1 file changed, 4 insertions(+) --- linux.orig/arch/x86/k

[PATCH 0/2] Fix TSC ADJUST breakage causing TSC failure

Fix a breakage caused by enabling early tsc initialization which bypasses a check that disables the forcing of TSC ADJUST to 0 for chassis 0. This is common on systems where all the chassis start up asynchronously so which chassis should have a TSC ADJUST value of 0 is not predictable. The

[PATCH 1/2] x86/platform/uv: Add is_early_uv_system check

-by: Mike Travis Suggested-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/include/asm/uv/uv.h |6 ++ 1 file changed, 6 insertions(+) --- linux.orig/arch/x86/include/asm/uv/uv.h +++ linux/arch/x86/include/asm/uv/uv.h @@ -10,8 +10,13 @@ struct cpumask

[PATCH 0/2] Fix TSC ADJUST breakage causing TSC failure

Fix a breakage caused by enabling early tsc initialization which bypasses a check that disables the forcing of TSC ADJUST to 0 for chassis 0. This is common on systems where all the chassis start up asynchronously so which chassis should have a TSC ADJUST value of 0 is not predictable. The

[PATCH 1/2] x86/platform/uv: Add is_early_uv_system check

-by: Mike Travis Suggested-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/include/asm/uv/uv.h |6 ++ 1 file changed, 6 insertions(+) --- linux.orig/arch/x86/include/asm/uv/uv.h +++ linux/arch/x86/include/asm/uv/uv.h @@ -10,8 +10,13 @@ struct cpumask

Re: [PATCH 2/2] x86/tsc: Fix UV TSC initialization

On 10/1/2018 11:22 PM, Thomas Gleixner wrote: On Mon, 1 Oct 2018, Mike Travis wrote: Fix regression introduced by commit cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once") as it changed setup_arch() so that it now calls tsc_early_init() before acpi_boot_table_init() which is a

Re: [PATCH 2/2] x86/tsc: Fix UV TSC initialization

On 10/1/2018 11:22 PM, Thomas Gleixner wrote: On Mon, 1 Oct 2018, Mike Travis wrote: Fix regression introduced by commit cf7a63ef4e02 ("x86/tsc: Calibrate tsc only once") as it changed setup_arch() so that it now calls tsc_early_init() before acpi_boot_table_init() which is a

Re: [PATCH 1/2] x86/platform/uv: Add is_early_uv_system check

On 10/1/2018 11:20 PM, Thomas Gleixner wrote: On Mon, 1 Oct 2018, Mike Travis wrote: Introduce is_early_uv_system() which uses efi.uv_systab to decide early in the boot process whether we're on a UV system. This is needed to skip other early setup/init code that might break UV platform

Re: [PATCH 1/2] x86/platform/uv: Add is_early_uv_system check

On 10/1/2018 11:20 PM, Thomas Gleixner wrote: On Mon, 1 Oct 2018, Mike Travis wrote: Introduce is_early_uv_system() which uses efi.uv_systab to decide early in the boot process whether we're on a UV system. This is needed to skip other early setup/init code that might break UV platform

[PATCH 0/2] Fix community TSC ADJUST breakage causing TSC failure

Fix a breakage caused by enabling early tsc initialization which bypasses a check that disables the forcing of TSC ADJUST to 0 for chassis 0. This is common on systems where all the chassis start up asynchronously so which chassis should have a TSC ADJUST value of 0 is not predictable. The

[PATCH 0/2] Fix community TSC ADJUST breakage causing TSC failure

Fix a breakage caused by enabling early tsc initialization which bypasses a check that disables the forcing of TSC ADJUST to 0 for chassis 0. This is common on systems where all the chassis start up asynchronously so which chassis should have a TSC ADJUST value of 0 is not predictable. The

[PATCH 2/2] x86/tsc: Fix UV TSC initialization

: Calibrate tsc only once") Signed-off-by: Mike Travis Signed-off-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/kernel/setup.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) --- linux.orig/arch/x86/kernel/setup.c +++ linux/arch/x86/k

[PATCH 1/2] x86/platform/uv: Add is_early_uv_system check

-by: Mike Travis Signed-off-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/include/asm/uv/uv.h |6 ++ 1 file changed, 6 insertions(+) --- linux.orig/arch/x86/include/asm/uv/uv.h +++ linux/arch/x86/include/asm/uv/uv.h @@ -10,8 +10,13 @@ struct cpumask

[PATCH 2/2] x86/tsc: Fix UV TSC initialization

: Calibrate tsc only once") Signed-off-by: Mike Travis Signed-off-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/kernel/setup.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) --- linux.orig/arch/x86/kernel/setup.c +++ linux/arch/x86/k

[PATCH 1/2] x86/platform/uv: Add is_early_uv_system check

-by: Mike Travis Signed-off-by: Hedi Berriche Reviewed-by: Russ Anderson Reviewed-by: Dimitri Sivanich --- arch/x86/include/asm/uv/uv.h |6 ++ 1 file changed, 6 insertions(+) --- linux.orig/arch/x86/include/asm/uv/uv.h +++ linux/arch/x86/include/asm/uv/uv.h @@ -10,8 +10,13 @@ struct cpumask

Re: [PATCH v2 RESEND 2/2] x86/mm/KASLR: Do not adapt the size of the direct mapping section for SGI UV system

redhat.com Subject: Re: [PATCH v2 RESEND 2/2] x86/mm/KASLR: Do not adapt the size of the direct mapping section for SGI UV system Hi Mike, Russ and Frank, On 09/28/17 at 07:10am, Mike Travis wrote: On 9/28/2017 2:01 AM, Ingo Molnar wrote: * Baoquan He <b...@redhat.com> wrot

Re: [PATCH v2 RESEND 2/2] x86/mm/KASLR: Do not adapt the size of the direct mapping section for SGI UV system

, Russ and Frank, On 09/28/17 at 07:10am, Mike Travis wrote: On 9/28/2017 2:01 AM, Ingo Molnar wrote: * Baoquan He wrote: @@ -123,7 +124,7 @@ void __init kernel_randomize_memory(void) CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING; /* Adapt phyiscal memory region size based

Re: [PATCH 0/3] x86/platform/UV: Update Memory Block Size Setting

the memory boundaries on different blocks than the previous UV standard of 2GB. Please elaborate (much) more. What is the actual problem and how is the patchset addressing it. On 5/15/2018 1:55 AM, Michal Hocko wrote: > On Fri 11-05-18 08:08:14, Mike Travis wrote: > [...] >> If you

Re: [PATCH 0/3] x86/platform/UV: Update Memory Block Size Setting

the memory boundaries on different blocks than the previous UV standard of 2GB. Please elaborate (much) more. What is the actual problem and how is the patchset addressing it. On 5/15/2018 1:55 AM, Michal Hocko wrote: > On Fri 11-05-18 08:08:14, Mike Travis wrote: > [...] >> If you

Re: [PATCH 1/1] x86/platform/UV: Fix critical UV MMR address error

, which receives respiration treatment, it would be appreciated if you could add a Fixes tag next time. Sorry I didn't know about that. Here it is: Commit-ID: 673aa20c55a138621d1340d343cd6b07c1cb4e92 Gitweb: https://.kernel.org/tip/673aa20c55a13862git1d1340d343cd6b07c1cb4e92 Author: Mike

Re: [PATCH 1/1] x86/platform/UV: Fix critical UV MMR address error

, which receives respiration treatment, it would be appreciated if you could add a Fixes tag next time. Sorry I didn't know about that. Here it is: Commit-ID: 673aa20c55a138621d1340d343cd6b07c1cb4e92 Gitweb: https://.kernel.org/tip/673aa20c55a13862git1d1340d343cd6b07c1cb4e92 Author: Mike

[tip:x86/platform] x86/platform/UV: Fix UV4A BAU MMRs

Commit-ID: a631a0a7a3caf6a9924856f3dcfe256e747f7467 Gitweb: https://git.kernel.org/tip/a631a0a7a3caf6a9924856f3dcfe256e747f7467 Author: Mike Travis <mike.tra...@hpe.com> AuthorDate: Mon, 8 Jan 2018 13:40:04 -0600 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 16

[tip:x86/platform] x86/platform/UV: Fix UV4A BAU MMRs

Commit-ID: a631a0a7a3caf6a9924856f3dcfe256e747f7467 Gitweb: https://git.kernel.org/tip/a631a0a7a3caf6a9924856f3dcfe256e747f7467 Author: Mike Travis AuthorDate: Mon, 8 Jan 2018 13:40:04 -0600 Committer: Ingo Molnar CommitDate: Tue, 16 Jan 2018 03:58:38 +0100 x86/platform/UV: Fix UV4A

[tip:x86/platform] x86/platform/UV: Fix GAM MMR references in the UV x2apic code

Commit-ID: 09c3ae12b2bf6dc2837d89c1017bf151af610a1f Gitweb: https://git.kernel.org/tip/09c3ae12b2bf6dc2837d89c1017bf151af610a1f Author: Mike Travis <mike.tra...@hpe.com> AuthorDate: Mon, 8 Jan 2018 13:40:03 -0600 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 16

[tip:x86/platform] x86/platform/UV: Fix GAM MMR references in the UV x2apic code

Commit-ID: 09c3ae12b2bf6dc2837d89c1017bf151af610a1f Gitweb: https://git.kernel.org/tip/09c3ae12b2bf6dc2837d89c1017bf151af610a1f Author: Mike Travis AuthorDate: Mon, 8 Jan 2018 13:40:03 -0600 Committer: Ingo Molnar CommitDate: Tue, 16 Jan 2018 03:58:37 +0100 x86/platform/UV: Fix GAM

[tip:x86/platform] x86/platform/UV: Fix GAM MMR changes in UV4A

Commit-ID: ecce47e0bde6faa3256740280754bfd06a1a4efa Gitweb: https://git.kernel.org/tip/ecce47e0bde6faa3256740280754bfd06a1a4efa Author: Mike Travis <mike.tra...@hpe.com> AuthorDate: Mon, 8 Jan 2018 13:40:02 -0600 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 16

[tip:x86/platform] x86/platform/UV: Fix GAM MMR changes in UV4A

Commit-ID: ecce47e0bde6faa3256740280754bfd06a1a4efa Gitweb: https://git.kernel.org/tip/ecce47e0bde6faa3256740280754bfd06a1a4efa Author: Mike Travis AuthorDate: Mon, 8 Jan 2018 13:40:02 -0600 Committer: Ingo Molnar CommitDate: Tue, 16 Jan 2018 03:58:37 +0100 x86/platform/UV: Fix GAM

[tip:x86/platform] x86/platform/UV: Add references to access fixed UV4A HUB MMRs

Commit-ID: 8078d1951da228e20dc36f83306845a565f51345 Gitweb: https://git.kernel.org/tip/8078d1951da228e20dc36f83306845a565f51345 Author: Mike Travis <mike.tra...@hpe.com> AuthorDate: Mon, 8 Jan 2018 13:40:01 -0600 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 16

[tip:x86/platform] x86/platform/UV: Add references to access fixed UV4A HUB MMRs

Commit-ID: 8078d1951da228e20dc36f83306845a565f51345 Gitweb: https://git.kernel.org/tip/8078d1951da228e20dc36f83306845a565f51345 Author: Mike Travis AuthorDate: Mon, 8 Jan 2018 13:40:01 -0600 Committer: Ingo Molnar CommitDate: Tue, 16 Jan 2018 03:58:37 +0100 x86/platform/UV: Add

[tip:x86/platform] x86/platform/UV: Fix UV4A support on new Intel Processors

Commit-ID: 62807106c3219d2d6ddbfc778a5ee7e6ba38e58f Gitweb: https://git.kernel.org/tip/62807106c3219d2d6ddbfc778a5ee7e6ba38e58f Author: Mike Travis <mike.tra...@hpe.com> AuthorDate: Mon, 8 Jan 2018 13:40:00 -0600 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 16

[tip:x86/platform] x86/platform/UV: Fix UV4A support on new Intel Processors

Commit-ID: 62807106c3219d2d6ddbfc778a5ee7e6ba38e58f Gitweb: https://git.kernel.org/tip/62807106c3219d2d6ddbfc778a5ee7e6ba38e58f Author: Mike Travis AuthorDate: Mon, 8 Jan 2018 13:40:00 -0600 Committer: Ingo Molnar CommitDate: Tue, 16 Jan 2018 03:58:37 +0100 x86/platform/UV: Fix UV4A

[tip:x86/platform] x86/platform/UV: Update uv_mmrs.h to prepare for UV4A fixes

Commit-ID: 673aa20c55a138621d1340d343cd6b07c1cb4e92 Gitweb: https://git.kernel.org/tip/673aa20c55a138621d1340d343cd6b07c1cb4e92 Author: Mike Travis <mike.tra...@hpe.com> AuthorDate: Mon, 8 Jan 2018 13:39:59 -0600 Committer: Ingo Molnar <mi...@kernel.org> CommitDate: Tue, 16

[tip:x86/platform] x86/platform/UV: Update uv_mmrs.h to prepare for UV4A fixes

Commit-ID: 673aa20c55a138621d1340d343cd6b07c1cb4e92 Gitweb: https://git.kernel.org/tip/673aa20c55a138621d1340d343cd6b07c1cb4e92 Author: Mike Travis AuthorDate: Mon, 8 Jan 2018 13:39:59 -0600 Committer: Ingo Molnar CommitDate: Tue, 16 Jan 2018 03:58:36 +0100 x86/platform/UV: Update

[PATCH 4/7] x86/platform/UV: Fix GAM MMR changes in UV4A

Intel processor changes necessitated UV4 HUB Global Address Memory (GAM) fixes to accommodate support for those processors. This patch deals with the updated address range change from 46 to 52 bits in UV4A. Signed-off-by: Mike Travis <mike.tra...@hpe.com> Acked-by: Andrew Banman <aban..

[PATCH 4/7] x86/platform/UV: Fix GAM MMR changes in UV4A

Intel processor changes necessitated UV4 HUB Global Address Memory (GAM) fixes to accommodate support for those processors. This patch deals with the updated address range change from 46 to 52 bits in UV4A. Signed-off-by: Mike Travis Acked-by: Andrew Banman --- arch/x86/include/asm/uv

[PATCH 5/7] x86/platform/UV: Fix GAM MMR references in UV x2apic code

Along with the fixes in UV4A (rev2) MMRs, the code to access those MMRs also was modified by the fixes. UV3, UV4, and UV4A no longer have compatible seetups for Global Address Memory (GAM). Correct the new mistakes. Signed-off-by: Mike Travis <mike.tra...@hpe.com> Acked-by: Andrew Banman

[PATCH 5/7] x86/platform/UV: Fix GAM MMR references in UV x2apic code

Along with the fixes in UV4A (rev2) MMRs, the code to access those MMRs also was modified by the fixes. UV3, UV4, and UV4A no longer have compatible seetups for Global Address Memory (GAM). Correct the new mistakes. Signed-off-by: Mike Travis Acked-by: Andrew Banman --- arch/x86/kernel/apic

[PATCH 6/7] x86/platform/UV: Fix for UV4A BAU MMRs

Fixes to accommodate Intel Processor changes for UV4A broadcast assist unit (BAU) MMRs. Signed-off-by: Mike Travis <mike.tra...@hpe.com> Acked-by: Andrew Banman <aban...@hpe.com> --- arch/x86/include/asm/uv/uv_mmrs.h | 59 +-- 1 file changed, 3

[PATCH 2/7] x86/platform/UV: Support for UV4A fixes for new Intel Processors

ted) patch. Signed-off-by: Mike Travis <mike.tra...@hpe.com> Acked-by: Andrew Banman <aban...@hpe.com> --- arch/x86/kernel/apic/x2apic_uv_x.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/ap

[PATCH 0/7 v2] x86/platform/UV: UV Fix patches for Intel processors

This patchset handles the fixes made to the UV4 HUB for upcoming Intel processors as there are some interface changes. v2: fix excessive MMIOH redirect messages and print redirect MMR base for each MMIOH section. * Update uv_mmrs.h to prep for fixed defines for UV4A. * Updates to handle

[PATCH 0/7 v2] x86/platform/UV: UV Fix patches for Intel processors

This patchset handles the fixes made to the UV4 HUB for upcoming Intel processors as there are some interface changes. v2: fix excessive MMIOH redirect messages and print redirect MMR base for each MMIOH section. * Update uv_mmrs.h to prep for fixed defines for UV4A. * Updates to handle

[PATCH 6/7] x86/platform/UV: Fix for UV4A BAU MMRs

Fixes to accommodate Intel Processor changes for UV4A broadcast assist unit (BAU) MMRs. Signed-off-by: Mike Travis Acked-by: Andrew Banman --- arch/x86/include/asm/uv/uv_mmrs.h | 59 +-- 1 file changed, 38 insertions(+), 21 deletions(-) diff --git a/arch

[PATCH 2/7] x86/platform/UV: Support for UV4A fixes for new Intel Processors

ted) patch. Signed-off-by: Mike Travis Acked-by: Andrew Banman --- arch/x86/kernel/apic/x2apic_uv_x.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index e1b8e8b..b0ce393 100644 ---

[PATCH 1/7] x86/platform/UV: Update uv_mmrs.h to prep for UV4A fixes

Regenerate uv_mmrs.h file to accommodate fixes to UV4A MMRs. Signed-off-by: Mike Travis <mike.tra...@hpe.com> Acked-by: Andrew Banman <aban...@hpe.com> --- arch/x86/include/asm/uv/uv_mmrs.h | 615 +- 1 file changed, 533 insertions(+), 82 deleti

[PATCH 1/7] x86/platform/UV: Update uv_mmrs.h to prep for UV4A fixes

Regenerate uv_mmrs.h file to accommodate fixes to UV4A MMRs. Signed-off-by: Mike Travis Acked-by: Andrew Banman --- arch/x86/include/asm/uv/uv_mmrs.h | 615 +- 1 file changed, 533 insertions(+), 82 deletions(-) diff --git a/arch/x86/include/asm/uv/uv_mmrs.h

[PATCH 3/7] x86/platform/UV: Add references to access to fixed UV4A HUB MMRs

Add references to enable access to fixed UV4A (rev2) HUB MMRs. Signed-off-by: Mike Travis <mike.tra...@hpe.com> Acked-by: Andrew Banman <aban...@hpe.com> --- arch/x86/include/asm/uv/uv_hub.h | 14 ++ arch/x86/include/asm/uv/uv_mmrs.h | 1 + arch/x86/kernel/apic/x2apic

[PATCH 3/7] x86/platform/UV: Add references to access to fixed UV4A HUB MMRs

Add references to enable access to fixed UV4A (rev2) HUB MMRs. Signed-off-by: Mike Travis Acked-by: Andrew Banman --- arch/x86/include/asm/uv/uv_hub.h | 14 ++ arch/x86/include/asm/uv/uv_mmrs.h | 1 + arch/x86/kernel/apic/x2apic_uv_x.c | 2 ++ 3 files changed, 17 insertions

Re: [PATCH 0/7] x86/platform/UV: UV Fix patches for Intel processors

On 12/21/2017 7:39 AM, Mike Travis wrote: Sigh, has any of this been properly build tested? x86-64 allyesconfig produces a bunch of ugly warnings: ... I will try this "allyesconfig" though I believe it introduces CONFIG items that cause problems where the resultant kernel do

Re: [PATCH 0/7] x86/platform/UV: UV Fix patches for Intel processors

On 12/21/2017 7:39 AM, Mike Travis wrote: Sigh, has any of this been properly build tested? x86-64 allyesconfig produces a bunch of ugly warnings: ... I will try this "allyesconfig" though I believe it introduces CONFIG items that cause problems where the resultant kernel do

Re: [PATCH 0/7] x86/platform/UV: UV Fix patches for Intel processors

On 12/21/2017 3:49 AM, Ingo Molnar wrote: * Mike Travis <tra...@sgi.com> wrote: This patchset handles the fixes made to the UV4 HUB for upcoming Intel processors as there are some interface changes. * Update uv_mmrs.h to prep for fixed defines for UV4A. * Updates to hand

Re: [PATCH 0/7] x86/platform/UV: UV Fix patches for Intel processors

On 12/21/2017 3:49 AM, Ingo Molnar wrote: * Mike Travis wrote: This patchset handles the fixes made to the UV4 HUB for upcoming Intel processors as there are some interface changes. * Update uv_mmrs.h to prep for fixed defines for UV4A. * Updates to handle UV4 vs. UV4A (fixed

[PATCH 2/7] x86/platform/UV: Support for UV4A fixes for new Intel Processors

ted) patch. Signed-off-by: Mike Travis <tra...@sgi.com> Signed-off-by: Andrew Banman <aban...@hpe.com> --- arch/x86/kernel/apic/x2apic_uv_x.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/ap

[PATCH 2/7] x86/platform/UV: Support for UV4A fixes for new Intel Processors

ted) patch. Signed-off-by: Mike Travis Signed-off-by: Andrew Banman --- arch/x86/kernel/apic/x2apic_uv_x.c | 14 +++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index e1b8e8b..b0ce393 100644 ---

[PATCH 6/7] x86/platform/UV: Fix for UV4A BAU MMRs

Fixes to accommodate Intel Processor changes for UV4A broadcast assist unit (BAU) MMRs. Signed-off-by: Mike Travis <tra...@sgi.com> Signed-off-by: Andrew Banman <aban...@hpe.com> --- arch/x86/include/asm/uv/uv_mmrs.h | 59 +-- 1 file changed, 3

[PATCH 6/7] x86/platform/UV: Fix for UV4A BAU MMRs

Fixes to accommodate Intel Processor changes for UV4A broadcast assist unit (BAU) MMRs. Signed-off-by: Mike Travis Signed-off-by: Andrew Banman --- arch/x86/include/asm/uv/uv_mmrs.h | 59 +-- 1 file changed, 38 insertions(+), 21 deletions(-) diff --git

[PATCH 3/7] x86/platform/UV: Add references to access to fixed UV4A HUB MMRs

Add references to enable access to fixed UV4A (rev2) HUB MMRs. Signed-off-by: Mike Travis <tra...@sgi.com> Signed-off-by: Andrew Banman <aban...@hpe.com> --- arch/x86/include/asm/uv/uv_hub.h | 14 ++ arch/x86/include/asm/uv/uv_mmrs.h | 1 + arch/x86/kernel/apic/x2apic

[PATCH 3/7] x86/platform/UV: Add references to access to fixed UV4A HUB MMRs

Add references to enable access to fixed UV4A (rev2) HUB MMRs. Signed-off-by: Mike Travis Signed-off-by: Andrew Banman --- arch/x86/include/asm/uv/uv_hub.h | 14 ++ arch/x86/include/asm/uv/uv_mmrs.h | 1 + arch/x86/kernel/apic/x2apic_uv_x.c | 2 ++ 3 files changed, 17

[PATCH 0/7] x86/platform/UV: UV Fix patches for Intel processors

This patchset handles the fixes made to the UV4 HUB for upcoming Intel processors as there are some interface changes. * Update uv_mmrs.h to prep for fixed defines for UV4A. * Updates to handle UV4 vs. UV4A (fixed) arches. * Updates to handle UV4 GAM (global addressable memory)

[PATCH 0/7] x86/platform/UV: UV Fix patches for Intel processors

This patchset handles the fixes made to the UV4 HUB for upcoming Intel processors as there are some interface changes. * Update uv_mmrs.h to prep for fixed defines for UV4A. * Updates to handle UV4 vs. UV4A (fixed) arches. * Updates to handle UV4 GAM (global addressable memory)

[PATCH 1/7] x86/platform/UV: Update uv_mmrs.h to prep for UV4A fixes

Regenerate uv_mmrs.h file to accommodate fixes to UV4A MMRs. Signed-off-by: Mike Travis <tra...@sgi.com> Signed-off-by: Andrew Banman <aban...@hpe.com> --- arch/x86/include/asm/uv/uv_mmrs.h | 615 +- 1 file changed, 533 insertions(+), 82 deleti

[PATCH 1/7] x86/platform/UV: Update uv_mmrs.h to prep for UV4A fixes

Regenerate uv_mmrs.h file to accommodate fixes to UV4A MMRs. Signed-off-by: Mike Travis Signed-off-by: Andrew Banman --- arch/x86/include/asm/uv/uv_mmrs.h | 615 +- 1 file changed, 533 insertions(+), 82 deletions(-) diff --git a/arch/x86/include/asm/uv

[PATCH 5/7] x86/platform/UV: Fix GAM MMR references in UV x2apic code

Along with the fixes in UV4A (rev2) MMRs, the code to access those MMRs also was modified by the fixes. UV3, UV4, and UV4A no longer have compatible setups for Global Address Memory (GAM). Correct the new mistakes. Signed-off-by: Mike Travis <tra...@sgi.com> Signed-off-by: Andrew Banman

[PATCH 5/7] x86/platform/UV: Fix GAM MMR references in UV x2apic code

Along with the fixes in UV4A (rev2) MMRs, the code to access those MMRs also was modified by the fixes. UV3, UV4, and UV4A no longer have compatible setups for Global Address Memory (GAM). Correct the new mistakes. Signed-off-by: Mike Travis Signed-off-by: Andrew Banman --- arch/x86/kernel

[PATCH 4/7] x86/platform/UV: Fix GAM MMR changes in UV4A

Intel processor changes necessitated UV4 HUB Global Address Memory (GAM) fixes to accommodate support for those processors. This patch deals with the updated address range change from 46 to 52 bits in UV4A. Signed-off-by: Mike Travis <tra...@sgi.com> Signed-off-by: Andrew Banman <aban..

[PATCH 4/7] x86/platform/UV: Fix GAM MMR changes in UV4A

Intel processor changes necessitated UV4 HUB Global Address Memory (GAM) fixes to accommodate support for those processors. This patch deals with the updated address range change from 46 to 52 bits in UV4A. Signed-off-by: Mike Travis Signed-off-by: Andrew Banman --- arch/x86/include/asm/uv

Re: [PATCH] x86/platform/UV: make functions uv_handle_nmi and uv_nmi_setup_common static

I know you've already changed it but the UV changes look fine, so ACK for that. Thanks. On 12/6/2017 9:08 AM, Colin King wrote: From: Colin Ian King Functions uv_handle_nmi and uv_nmi_setup_common are local to the source and do not need to be in global scope, so

Re: [PATCH] x86/platform/UV: make functions uv_handle_nmi and uv_nmi_setup_common static

I know you've already changed it but the UV changes look fine, so ACK for that. Thanks. On 12/6/2017 9:08 AM, Colin King wrote: From: Colin Ian King Functions uv_handle_nmi and uv_nmi_setup_common are local to the source and do not need to be in global scope, so make them static. Cleans up

Re: [PATCH 2/5] x86/kernel: Skip TSC test and error messages if already unstable

On 10/12/2017 8:22 AM, Thomas Gleixner wrote: On Thu, 12 Oct 2017, Mike Travis wrote: On 10/12/2017 4:17 AM, Thomas Gleixner wrote: On Thu, 5 Oct 2017, mike.tra...@hpe.com wrote: @@ -89,6 +93,10 @@ bool tsc_store_and_check_tsc_adjust(bool if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST

Re: [PATCH 2/5] x86/kernel: Skip TSC test and error messages if already unstable

On 10/12/2017 8:22 AM, Thomas Gleixner wrote: On Thu, 12 Oct 2017, Mike Travis wrote: On 10/12/2017 4:17 AM, Thomas Gleixner wrote: On Thu, 5 Oct 2017, mike.tra...@hpe.com wrote: @@ -89,6 +93,10 @@ bool tsc_store_and_check_tsc_adjust(bool if (!boot_cpu_has(X86_FEATURE_TSC_ADJUST

Re: [PATCH 2/5] x86/kernel: Skip TSC test and error messages if already unstable

On 10/12/2017 4:17 AM, Thomas Gleixner wrote: On Thu, 5 Oct 2017, mike.tra...@hpe.com wrote: If the TSC has already been determined to be unstable, then checking TSC ADJUST values is a waste of time and generates unnecessary error messages. Signed-off-by: Mike Travis <mike.tra...@hpe.

Re: [PATCH 2/5] x86/kernel: Skip TSC test and error messages if already unstable

On 10/12/2017 4:17 AM, Thomas Gleixner wrote: On Thu, 5 Oct 2017, mike.tra...@hpe.com wrote: If the TSC has already been determined to be unstable, then checking TSC ADJUST values is a waste of time and generates unnecessary error messages. Signed-off-by: Mike Travis Reviewed-by: Dimitri

Re: [PATCH 4/5] x86/kernel: Provide a means to disable TSC ART

On 10/4/2017 2:27 AM, Peter Zijlstra wrote: On Mon, Oct 02, 2017 at 10:12:18AM -0500, mike.tra...@hpe.com wrote: static void detect_art(void) { unsigned int unused[2]; - if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF) + if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF ||

Re: [PATCH 4/5] x86/kernel: Provide a means to disable TSC ART

On 10/4/2017 2:27 AM, Peter Zijlstra wrote: On Mon, Oct 02, 2017 at 10:12:18AM -0500, mike.tra...@hpe.com wrote: static void detect_art(void) { unsigned int unused[2]; - if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF) + if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF ||

Re: [PATCH 0/4] x86/platform/UV: Update TSC support

On 9/29/2017 9:23 AM, Peter Zijlstra wrote: On Fri, Sep 29, 2017 at 08:19:22AM -0700, Mike Travis wrote: So I would still like to get clarification on how ART works (or likely doesn't) on your systems. I think for now its fairly prudent to kill detect_art() on UV. I tested with both

Re: [PATCH 0/4] x86/platform/UV: Update TSC support

On 9/29/2017 9:23 AM, Peter Zijlstra wrote: On Fri, Sep 29, 2017 at 08:19:22AM -0700, Mike Travis wrote: So I would still like to get clarification on how ART works (or likely doesn't) on your systems. I think for now its fairly prudent to kill detect_art() on UV. I tested with both

Re: [PATCH 0/4] x86/platform/UV: Update TSC support

On 9/29/2017 1:46 AM, Peter Zijlstra wrote: On Thu, Sep 28, 2017 at 01:03:39PM -0500, mike.tra...@hpe.com wrote: The UV BIOS goes to considerable effort to get the TSC synchronization accurate across the entire system. Included in that are multiple chassis that can have 32+ sockets. The

Re: [PATCH 0/4] x86/platform/UV: Update TSC support

On 9/29/2017 1:46 AM, Peter Zijlstra wrote: On Thu, Sep 28, 2017 at 01:03:39PM -0500, mike.tra...@hpe.com wrote: The UV BIOS goes to considerable effort to get the TSC synchronization accurate across the entire system. Included in that are multiple chassis that can have 32+ sockets. The

Re: [PATCH v2 RESEND 2/2] x86/mm/KASLR: Do not adapt the size of the direct mapping section for SGI UV system

On 9/28/2017 2:01 AM, Ingo Molnar wrote: * Baoquan He wrote: Hi Ingo, On 09/28/17 at 09:56am, Ingo Molnar wrote: diff --git a/arch/x86/mm/kaslr.c b/arch/x86/mm/kaslr.c index af599167fe3c..4d68c08df82d 100644 --- a/arch/x86/mm/kaslr.c +++ b/arch/x86/mm/kaslr.c @@ -27,6

Re: [PATCH v2 RESEND 2/2] x86/mm/KASLR: Do not adapt the size of the direct mapping section for SGI UV system

On 9/28/2017 2:01 AM, Ingo Molnar wrote: * Baoquan He wrote: Hi Ingo, On 09/28/17 at 09:56am, Ingo Molnar wrote: diff --git a/arch/x86/mm/kaslr.c b/arch/x86/mm/kaslr.c index af599167fe3c..4d68c08df82d 100644 --- a/arch/x86/mm/kaslr.c +++ b/arch/x86/mm/kaslr.c @@ -27,6 +27,7 @@ #include

Re: [PATCH 1/3] x86/kernel: Add option that TSC on Socket 0 being non-null is valid

On 9/25/2017 11:10 AM, Thomas Gleixner wrote: On Mon, 25 Sep 2017, Mike Travis wrote: On 9/25/2017 8:30 AM, Thomas Gleixner wrote: Aside of that I really do not like this kind of special case hackery. The real question is whether we need to enforce TSC_ADJUST == 0 on the boot cpu at all

Re: [PATCH 1/3] x86/kernel: Add option that TSC on Socket 0 being non-null is valid

On 9/25/2017 11:10 AM, Thomas Gleixner wrote: On Mon, 25 Sep 2017, Mike Travis wrote: On 9/25/2017 8:30 AM, Thomas Gleixner wrote: Aside of that I really do not like this kind of special case hackery. The real question is whether we need to enforce TSC_ADJUST == 0 on the boot cpu at all

Re: [PATCH 1/3] x86/kernel: Add option that TSC on Socket 0 being non-null is valid

On 9/25/2017 8:30 AM, Thomas Gleixner wrote: On Thu, 21 Sep 2017, mike.tra...@hpe.com wrote: +/* + * TSC on socket 0 being non-zero may be correct as set by BIOS + */ +static int __read_mostly tsc_socket0_nonzero; + /* native_sched_clock() is called before tsc_init(), so we must start

Re: [PATCH 1/3] x86/kernel: Add option that TSC on Socket 0 being non-null is valid

On 9/25/2017 8:30 AM, Thomas Gleixner wrote: On Thu, 21 Sep 2017, mike.tra...@hpe.com wrote: +/* + * TSC on socket 0 being non-zero may be correct as set by BIOS + */ +static int __read_mostly tsc_socket0_nonzero; + /* native_sched_clock() is called before tsc_init(), so we must start

Re: [PATCH v2 1/2] x86/UV: Introduce a helper function to check UV system at earlier stage

Acked-by: Mike Travis <tra...@sgi.com> On 5/20/2017 5:02 AM, Baoquan He wrote: The SGI BIOS adds UVsystab, and only systems running SGI BIOS (and now HPE Hawks2) will have UVsystab. And UVsystab is detected in efi_init() which is at very early stage. So introduce a new helper fu

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