On Tue, Jul 25, 2017 at 11:41:56AM +, Patrick Brünn wrote:
> >From: Shawn Guo [mailto:shawn...@kernel.org]
> >On Fri, Jul 21, 2017 at 06:06:40AM +0200, linux-kernel-...@beckhoff.com
> >wrote:
> >> From: Patrick Bruenn <p.bru...@beckhoff.com>
> >>
>
On Fri, Jul 21, 2017 at 06:06:40AM +0200, linux-kernel-...@beckhoff.com wrote:
> From: Patrick Bruenn
>
> The CX9020 differs from i.MX53 Quick Start Board by:
> - use uart2 instead of uart1
> - DVI-D connector instead of VGA
> - no audio
> - no SATA connector
> - CCAT FPGA
On Fri, Jul 14, 2017 at 02:49:09PM +0800, Ran Wang wrote:
> LS1012A has one USB 3.0(DWC3) controller and
> one USB 2.0 controller.
>
> Signed-off-by: Ran Wang
Applied, thanks.
On Fri, Jul 14, 2017 at 05:11:07PM +0300, Leonard Crestez wrote:
> This function does a quick and easy read of an u32 value without any
> kind of resource management code on the consumer side.
>
> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com>
Reviewed-by
r compatibility with older dts and because it
> works correctly on imx6qdl chips.
>
> Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com>
Acked-by: Shawn Guo <shawn...@kernel.org>
On Fri, Jul 14, 2017 at 05:11:09PM +0300, Leonard Crestez wrote:
> On imx6sx accessing OCOTP directly is wrong because the ocotp clock
> needs to be enabled first. Use the nvmem-cells binding instead.
>
> This requirement does not apply to older imx6qdl chips because there the
> ocotp access
On Wed, Jul 19, 2017 at 04:02:45PM +0100, Martyn Welch wrote:
> From: Fabien Lahoudere
>
> PPD is a product from GE Healthcare to monitor vital biometric signals.
>
> Signed-off-by: Fabien Lahoudere
> Signed-off-by: Sebastian
On Thu, Jul 20, 2017 at 10:38:26AM +0800, yinbo@nxp.com wrote:
> From: "yinbo.zhu"
>
> Signed-off-by: yinbo.zhu
The subject should be prefixed like 'arm64: dts: ls1088a: ...'. And
the current subject is confusing. You are adding USB support rather
On Mon, Jul 24, 2017 at 02:59:56PM +0200, Gary Bisson wrote:
> Gary Bisson (2):
> ARM: dts: imx6qdl-sabrelite: fix USB PHY reset
> ARM: dts: imx6qdl-nitrogen6x: fix USB PHY reset
Applied both, thanks.
On Fri, Jul 14, 2017 at 04:32:12PM -0400, Sebastien Bourdelin wrote:
> These device trees add support for the TS-4600 by Technologic Systems.
>
> More details here:
> http://wiki.embeddedarm.com/wiki/TS-4600
>
> Signed-off-by: Sebastien Bourdelin
>
On Sun, Jul 23, 2017 at 07:49:05PM +0200, Martin Kaiser wrote:
> From: Steffen Trumtrar
>
> Add a devicetree entry for the Random Number Generator Version B (RNGB).
> The driver for RNGC supports version B as well.
>
> Signed-off-by: Steffen Trumtrar
On Wed, Jul 26, 2017 at 02:05:30PM +0200, linux-kernel-...@beckhoff.com wrote:
> Patrick Bruenn (4):
> dt-bindings: arm: Add entry for Beckhoff CX9020
> ARM: dts: imx53: add srtc node
> ARM: dts: imx53: add alternative UART2 configuration
> ARM: dts: imx: add CX9020 Embedded PC device tree
On Thu, Aug 03, 2017 at 03:32:36PM -0400, Sebastien Bourdelin wrote:
> Hi Shawn,
>
> Thanks i understand, however if it's ok, i would like to process in the
> same time with the TS4600 board bindings and initial dts without the
> part related to the nbus and watchdog.
> There is no dependencies
On Wed, Aug 02, 2017 at 12:51:29PM -0700, Stefan Agner wrote:
> If a regulator requests a deferred probe, the power domain gets
> initialized twice. This leads to a list double add (without
> list debugging the kernel hangs due to the double add later):
>
> WARNING: CPU: 0 PID: 19 at
On Thu, Aug 03, 2017 at 03:38:15PM -0400, Sebastien Bourdelin wrote:
> These device trees add support for the TS-4600 by Technologic Systems.
>
> More details here:
> http://wiki.embeddedarm.com/wiki/TS-4600
>
> Signed-off-by: Sebastien Bourdelin
>
On Thu, Aug 03, 2017 at 06:29:48PM +0200, Martin Kaiser wrote:
> Hi Shawn,
>
> Thus wrote Shawn Guo (shawn...@kernel.org):
>
> > On Wed, Aug 02, 2017 at 10:06:11PM +0200, Martin Kaiser wrote:
> > > Add a ranges; line to the tscadc node. This creates a 1:1 mapping betwe
On Thu, Aug 17, 2017 at 08:02:36AM -0700, Greg KH wrote:
> On Thu, Aug 17, 2017 at 03:50:10PM +0200, Gary Bisson wrote:
> > Previous value was a bad copy of nitrogen6_max device tree.
> >
> > Signed-off-by: Gary Bisson
> > ---
> >
On Thu, Aug 17, 2017 at 10:52:38AM +0800, yinbo@nxp.com wrote:
> From: "yinbo.zhu"
>
> Fix the issue that usb is not detected on ls1088ardb
>
> Signed-off-by: yinbo.zhu
> Signed-off-by: Ran Wang
> ---
>
On Thu, Aug 17, 2017 at 03:50:10PM +0200, Gary Bisson wrote:
> Previous value was a bad copy of nitrogen6_max device tree.
>
> Signed-off-by: Gary Bisson
Applied, thanks.
On Fri, Aug 18, 2017 at 07:48:19AM +, Yinbo Zhu wrote:
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > index 3a3be87..0dbff29 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > +++
On Fri, Aug 18, 2017 at 05:24:36PM +0530, Kiran Gunda wrote:
> The peripheral ownership check is not necessary on single master
> platforms. Hence, enforce the peripheral ownership check optioanlly.
>
> Signed-off-by: Kiran Gunda <kgu...@codeaurora.org>
Tested-by: Shawn Guo <shawn...@kernel.org>
On Fri, Aug 18, 2017 at 04:43:23PM +0530, kgu...@codeaurora.org wrote:
> From the logs the ownership for these GPIOs is not assigned to the
> application processor but to another master. Considering this is a
> (apq8016-sbc) APSS only platform ideally the fix for this would be
> to update the
On Fri, Aug 18, 2017 at 04:14:45PM +0800, yinbo@nxp.com wrote:
> From: "yinbo.zhu"
>
> Fix the issue that usb is not detected on ls1088ardb
>
> Signed-off-by: yinbo.zhu
> Signed-off-by: Ran Wang
You are sending an updated patch.
On Thu, Aug 17, 2017 at 04:04:24PM +0200, Gary Bisson wrote:
> Allows to load firmware files which aren't built inside the kernel.
>
> Especially useful for CODA firmware (vpu_fw_imx6q.bin) which is usually
> located in the rootfs.
>
> Signed-off-by: Gary Bisson
On Thu, Apr 20, 2017 at 04:25:11PM +0530, Viresh Kumar wrote:
> Compiling the DT file with W=1, DTC warns like follows:
>
> Warning (unit_address_vs_reg): Node /opp_table0/opp@10 has a
> unit name, but no reg property
>
> Fix this by replacing '@' with '-' as the OPP nodes will never
On Tue, May 02, 2017 at 05:46:00PM +0300, Leonard Crestez wrote:
> Enable more common cpufreq governors in imx defconfig because this is
> very useful for testing. In particular you can't use cpufreq-set -f
> $FREQ without explicitly defining CONFIG_CPU_FREQ_GOV_USERSPACE=y.
>
> Signed-off-by:
On Tue, Apr 25, 2017 at 07:28:06PM +0200, Marek Vasut wrote:
> On 04/25/2017 07:23 PM, Leonard Crestez wrote:
> > Anyway, that version also sets the supply for reg_arm and reg_soc. It
> > is not necessary for fixing the crash I'm seeing but is good because it
> > will result in the minimum voltage
On Wed, May 03, 2017 at 04:32:06PM +0200, Marek Vasut wrote:
> On 05/03/2017 04:26 PM, Marek Vasut wrote:
> > On 05/03/2017 03:57 PM, Shawn Guo wrote:
> >> On Tue, Apr 25, 2017 at 07:28:06PM +0200, Marek Vasut wrote:
> >>> On 04/25/2017 07:23 PM, Leonard Crestez wrot
On Fri, Apr 21, 2017 at 06:23:33PM -0700, Stefan Agner wrote:
> This patchset adds support for i.MX 7 SoC for the GPMI NAND controller.
> There have been similar patchsets already:
> https://lkml.org/lkml/2016/2/23/912
>
> However, this patchset does not make use of any of the new features.
> The
On Fri, May 05, 2017 at 02:00:17PM +0300, Leonard Crestez wrote:
> The board file for imx6sx-sdb overrides cpufreq operating points to use
> higher voltages. This is done because the board has a shared rail for
> VDD_ARM_IN and VDD_SOC_IN and when using LDO bypass the shared voltage
> needs to be
On Thu, May 11, 2017 at 01:37:47PM +0200, Arnd Bergmann wrote:
> The new pm domain driver causes a build failure when CONFIG_PM
> is not set:
>
> warning: (IMX7_PM_DOMAINS) selects PM_GENERIC_DOMAINS which has unmet direct
> dependencies (PM)
> drivers/base/power/domain_governor.c: In function
On Mon, Apr 10, 2017 at 02:00:15PM -0700, Stefan Agner wrote:
> The USDHC instances need the USDHC NAND and IPG clock in order to
> operate. Reference them properly by replacing the dummy clocks with
> the actual clocks.
>
> Note that both clocks are currently implicitly enabled since they
> are
On Sun, May 14, 2017 at 07:39:33AM -0700, Guenter Roeck wrote:
> On 05/11/2017 12:22 AM, Shawn Guo wrote:
> >On Fri, May 05, 2017 at 03:32:59PM -0400, Sebastien Bourdelin wrote:
> >>This watchdog is instantiated in a FPGA and can only be access using a
> >>GPIOs bit-
is patch depends on nothing and can be applied immediately. But
versatile-pb.dts is not really in my charge. In case you want to get
this series merged by arm-soc folks, here is my ACK:
Acked-by: Shawn Guo <shawn...@kernel.org>
Or you need to split versatile-pb.dts out, and then I can take
On Fri, May 05, 2017 at 03:32:59PM -0400, Sebastien Bourdelin wrote:
> This watchdog is instantiated in a FPGA and can only be access using a
> GPIOs bit-banged bus, called the NBUS by Technologic Systems.
> The watchdog is made of only one register, called the feed register.
> Writing to this
On Fri, May 05, 2017 at 02:00:17PM +0300, Leonard Crestez wrote:
> The board file for imx6sx-sdb overrides cpufreq operating points to use
> higher voltages. This is done because the board has a shared rail for
> VDD_ARM_IN and VDD_SOC_IN and when using LDO bypass the shared voltage
> needs to be
On Mon, May 15, 2017 at 12:21:15PM +0300, Madalin Bucur wrote:
> Madalin Bucur (3):
> arm64: dts: add DPAA QBMan portals
> arm64: dts: add LS1043A DPAA QBMan nodes
> arm64: dts: add LS1046A DPAA QBMan nodes
Applied all, thanks.
Hi Stephen,
On Mon, Jun 26, 2017 at 11:09:07AM +1000, Stephen Rothwell wrote:
> Hi Wolfram,
>
> After merging the i2c tree, today's linux-next build (x86_64 allmodconfig)
> failed like this:
>
> drivers/i2c/busses/i2c-zx2967.c: In function 'zx2967_i2c_writesb':
>
"warning: symbol 'aud96p22_dt_ids' was not declared. Should it be static?"
>
> Signed-off-by: Colin Ian King <colin.k...@canonical.com>
Acked-by: Shawn Guo <shawn@linaro.org>
On Wed, May 24, 2017 at 02:02:42PM +0900, Masahiro Yamada wrote:
> Most of DT files in ARM use #include "..." to make pre-processor
> include DT in the same directory, but we have some exceptional files
> that use #include <...> for that.
>
> Fix them to remove
On Mon, May 22, 2017 at 04:10:10PM +0300, Nikita Yushchenko wrote:
> ZII dev board rev B has a Holt Hi8435 connected to dspi2.
> Add it to device tree.
>
> ZII dev board rev C does not have that, so use rev-b dts file,
> not common dtsi file.
>
> Signed-off-by: Nikita Yushchenko
On Thu, May 25, 2017 at 11:06:47AM +0300, Nikita Yushchenko wrote:
> >> + {
> >> + status = "okay";
> >> +};
> >> +
> >> + {
> >
> > Please keep these labelled nodes sort alphabetically.
>
> Ok
>
> >> + bus-num = <1>;
> >> + pinctrl-names = "default";
> >> + pinctrl-0 = <_dspi2>;
> >> +
On Tue, May 23, 2017 at 09:02:27AM +0300, Nikita Yushchenko wrote:
> >> However, hi8435 driver historically was coded using inverted values
> >> passed to gpiolib calls. And there are setups in the wild with device
> >> trees containing GPIO_ACTIVE_HIGH that I'd prefer not breaking.
> >>
> >> To
On Tue, May 23, 2017 at 03:34:42PM +0200, Javier Martinez Canillas wrote:
> The at24 driver allows to register I2C EEPROM chips using different vendor
> and devices, but the I2C subsystem does not take the vendor into account
> when matching using the I2C table since it only has device entries.
>
On Tue, May 23, 2017 at 03:34:34PM +0200, Javier Martinez Canillas wrote:
> The at24 driver allows to register I2C EEPROM chips using different vendor
> and devices, but the I2C subsystem does not take the vendor into account
> when matching using the I2C table since it only has device entries.
>
On Tue, May 16, 2017 at 12:40:13AM -0700, Stefan Agner wrote:
> The PWM driver has now capability to specify the PWM polarity
> which is e.g. for backlight control. Allow to make use of PWM
> polarity by specifying pwm-cells to be 3 in the base dt.
>
> Signed-off-by: Stefan Agner
On Mon, May 15, 2017 at 07:52:58AM -0700, Andrey Smirnov wrote:
> Andrey Smirnov (7):
> ARM: dts: imx: Reintroduce 'anatop-enable-bit' where appropriate
> ARM: imx: Select GPCv2 for i.MX7
> ARM: dts: imx7s: Add node for GPC
> ARM: dts: imx7s: Mark 'gpr' compatible with i.MX6 variant
>
On Tue, May 16, 2017 at 03:07:20PM +0300, Madalin Bucur wrote:
> This patch set introduces the QorIQ Data Path Acceleration Arhitecture
> (DPAA) Frame Manager device tree nodes for the ARM based DPAA 1.x platforms.
>
> Madalin Bucur (3):
> arm64: dts: add DPAA FMan nodes
> arm64: dts: add
On Sat, May 27, 2017 at 11:58:47AM +0200, Daniel Lezcano wrote:
> diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c
> index fb9a73a..4a4d2e2 100644
> --- a/arch/arm/mach-imx/epit.c
> +++ b/arch/arm/mach-imx/epit.c
> @@ -39,7 +39,7 @@
> #define EPITCR_OM_TOGGLE (1 << 22)
; line.
> In this case, PMIC_STBY_REQ can be used for Stand by, Sleep
> and Power off modes.
>
> Signed-off-by: Oleksij Rempel <o.rem...@pengutronix.de>
> Cc: ker...@pengutronix.de
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: Shawn Guo <shawn...@kernel.org>
On Mon, May 29, 2017 at 05:45:51PM +0200, Benjamin Gaignard wrote:
> Use devm_of_platform_populate() to be sure that of_platform_depopulate
> is called when removing the driver.
>
> Signed-off-by: Benjamin Gaignard
Applied to drm-misc, thanks.
On Fri, May 26, 2017 at 02:26:06PM +0300, Leonard Crestez wrote:
> This option was removed by "make savedefconfig" in
> commit c5054a98bce4 ("ARM: imx_v6_v7_defconfig: Select SMSC_PHY")
>
> This happened because CONFIG_DEBUG_FS was implicitly selected by
> CONFIG_TREE_RCU_TRACE which defaulted to
On Tue, Jun 06, 2017 at 08:50:41PM +0300, Leonard Crestez wrote:
> Leonard Crestez (2):
> ARM: imx: Add MXC_CPU_IMX6ULL and cpu_is_imx6ull
> ARM: imx6ull: Make suspend/resume work like on 6ul
Applied both, thanks.
On Mon, Jun 05, 2017 at 09:50:29AM +0800, Shawn Guo wrote:
> On Mon, May 29, 2017 at 07:09:24PM +0200, Oleksij Rempel wrote:
> > This board, as well as some other boards with i.MX6 and a PMIC, uses a
> > "MPIC_STBY_REQ" line to notify the PMIC about a state change.
&
On Tue, May 30, 2017 at 07:11:19PM +0300, Leonard Crestez wrote:
> Suspend and resume on imx6ull is currenty not working because of some
> missed checks where behavior should match imx6ul.
>
> Signed-off-by: Leonard Crestez
> ---
> arch/arm/mach-imx/mxc.h | 6 ++
On Tue, Jun 06, 2017 at 01:51:53PM +0300, Leonard Crestez wrote:
> On Mon, 2017-06-05 at 13:37 +0800, Shawn Guo wrote:
> > On Tue, May 30, 2017 at 07:11:19PM +0300, Leonard Crestez wrote:
> > >
> > > Suspend and resume on imx6ull is currenty not working because of som
On Wed, Jun 14, 2017 at 08:17:04PM +0530, Jagan Teki wrote:
> On Fri, Apr 7, 2017 at 6:46 PM, Shawn Guo <shawn...@kernel.org> wrote:
> > On Thu, Apr 06, 2017 at 11:32:07PM +0530, Jagan Teki wrote:
> >> From: Jagan Teki <ja...@amarulasolutions.com>
> >>
>
On Fri, Jun 09, 2017 at 02:25:45PM +0800, Yuantian Tang wrote:
> qoriq clock driver has been updated to parse the clock configuration
> information defined in driver itself not in dts.
> Since the new implementation and the bindings have been merged,
> it is time to update the clock related node
+Leonard, in case he wants to have a look.
One small comment below ...
On Fri, Jun 09, 2017 at 04:07:35PM +0200, Oleksij Rempel wrote:
> One of the Freescale recommended sequences for power off with external
> PMIC is the following:
> ...
> 3. SoC is programming PMIC for power off when standby
On Thu, Jun 15, 2017 at 01:01:22PM +0530, Jagan Teki wrote:
> > I feel the abstraction is wrong from the beginning. Ideally, we should
> > have something like below.
> >
> > - imx6ul-isiot.dtsi
> > - imx6ul-isiot-kit.dts and imx6ul-isiot-carrier.dts
> >
> > The -isiot should have everything on
On Thu, Jun 15, 2017 at 10:21:43AM +0530, Jagan Teki wrote:
> On Thu, Jun 15, 2017 at 7:50 AM, Shawn Guo <shawn...@kernel.org> wrote:
> > On Wed, Jun 14, 2017 at 08:17:04PM +0530, Jagan Teki wrote:
> >> On Fri, Apr 7, 2017 at 6:46 PM, Shawn Guo <shawn...@kernel.org>
On Thu, Jun 08, 2017 at 07:26:57PM +0300, Leonard Crestez wrote:
> Setting trip points is supported by the imx thermal driver and it is
> useful to be able to test this without adjusting config.
>
> Signed-off-by: Leonard Crestez
Applied, thanks.
On Wed, Jun 07, 2017 at 02:32:47PM +0800, Yuantian Tang wrote:
> Signed-off-by: Tang Yuantian
> ---
> Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied both, thanks.
On Thu, Jun 08, 2017 at 03:34:46PM -0700, Stefan Agner wrote:
> Stefan Agner (3):
> clk: imx7d: create clocks behind rawnand clock gate
> ARM: dts: imx7: add GPMI NAND and APBH DMA
> ARM: dts: imx7-colibri: add NAND support
Both dts patches look good to me. Please ping me after the clk
On Mon, Jun 12, 2017 at 11:23:53AM -0700, Steve Longerbeam wrote:
> This series defines the i.MX6 internal video multiplexers and MIPI CSI-2
> receiver device nodes, and their connections to eachother and the i.MX6
> IPU CSI ports.
>
> It also implements video capture support on the SabreLite,
On Wed, Apr 19, 2017 at 10:22:02PM +0200, Alexandre Belloni wrote:
> The rv4162 vendor is microcrystal, not ST.
>
> Signed-off-by: Alexandre Belloni
> ---
> arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
On Tue, Apr 18, 2017 at 08:01:27AM -0700, Andrey Smirnov wrote:
> Now that support for 'anatop-enable-bit' has been added to ANADIG
> driver, reintroduce 'anatop-enable-bit' for all applicable LDOs.
>
> Cc: yurov...@gmail.com
> Cc: Dong Aisheng <aisheng.d...@nxp.com>
&
On Tue, Apr 18, 2017 at 08:01:33AM -0700, Andrey Smirnov wrote:
> Enable PCIe peripheral on this board.
>
> Cc: yurov...@gmail.com
> Cc: Dong Aisheng <aisheng.d...@nxp.com>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: Sascha Hauer <ker...@pengutronix.de>
> C
On Tue, Apr 18, 2017 at 08:01:28AM -0700, Andrey Smirnov wrote:
> GPCv2 IP block is a part of i.MX7 SoC. Select it to make corresponding
> driver availible to support DT changes following this patch.
>
> Cc: yurov...@gmail.com
> Cc: Dong Aisheng <aisheng.d...@nxp.com>
&
On Tue, Apr 18, 2017 at 08:01:29AM -0700, Andrey Smirnov wrote:
> Add node for GPC and specify as a parent interrupt controller for SoC bus.
>
> Cc: yurov...@gmail.com
> Cc: Dong Aisheng <aisheng.d...@nxp.com>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: Sascha Haue
On Tue, Apr 18, 2017 at 08:01:32AM -0700, Andrey Smirnov wrote:
> Cc: yurov...@gmail.com
> Cc: Dong Aisheng <aisheng.d...@nxp.com>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: Sascha Hauer <ker...@pengutronix.de>
> Cc: Fabio Estevam <fabio.este...@nxp.com>
On Thu, May 04, 2017 at 03:08:41PM +0200, Marek Vasut wrote:
> On 05/04/2017 02:44 PM, Shawn Guo wrote:
> > On Thu, May 04, 2017 at 12:06:11PM +0200, Marek Vasut wrote:
> >> Mind you, my patch is not fixing any crash, it's correcting the
> >> regulator binding an
On Thu, May 04, 2017 at 12:06:11PM +0200, Marek Vasut wrote:
> On 05/04/2017 11:42 AM, Leonard Crestez wrote:
> > I think there is a further misunderstanding here. I have a problem
> > where imx6sx-sdb rev C boards crash on boot with upstream (but are
> > reported to work fine with rev B).
On Tue, Apr 25, 2017 at 07:57:59PM +0300, Leonard Crestez wrote:
> The board file for imx6sx-dbg overrides cpufreq operating points to use
s/imx6sx-dbg/imx6sx-sdb
> higher voltages. This is done because the board has a shared rail for
> VDD_ARM_IN and VDD_SOC_IN and when using LDO bypass the
On Thu, Apr 27, 2017 at 01:17:12AM +, Peter Chen wrote:
>
> >
> >The board file for imx6sx-dbg overrides cpufreq operating points to use
> >higher
> >voltages. This is done because the board has a shared rail for VDD_ARM_IN and
> >VDD_SOC_IN and when using LDO bypass the shared voltage
On Thu, May 04, 2017 at 12:16:20AM +0200, Alexandre Belloni wrote:
> On 03/05/2017 at 16:50:12 +0800, Shawn Guo wrote:
> > On Wed, Apr 19, 2017 at 10:22:02PM +0200, Alexandre Belloni wrote:
> > > The rv4162 vendor is microcrystal, not ST.
> > >
> > &
On Thu, May 04, 2017 at 04:34:14PM +0200, Marek Vasut wrote:
> On 05/04/2017 03:41 PM, Shawn Guo wrote:
> > So I guess you do not understand how the OPP hackery was born and why it
> > shouldn't be there for mainline kernel at all.
>
> The OPP hackery is there to keep both
On Wed, Aug 30, 2017 at 10:17:51PM +0530, Arvind Yadav wrote:
> platform_suspend_ops are not supposed to change at runtime.
> Functions suspend_set_ops working with const platform_suspend_ops.
> So mark the non-const structs as const.
>
> Signed-off-by: Arvind Yadav
On Sat, Sep 09, 2017 at 08:54:21PM +0800, Wig C wrote:
> From: YuanCheng Cheng
>
> Working items:
>
> - 800MHz CPU
> - 2GB of RAM (DDR3)
> - 4GB of eMMC storage
> - 1T1R WiFi 2.4 GHz
> - Power management support
> - 1x 10/100/1000 Mbps Ethernet WAN port
> - 2x USB 2.0 Host
>
On Wed, Sep 13, 2017 at 05:10:09PM +0800, yinbo@nxp.com wrote:
> From: "yinbo.zhu"
>
> Fix the issue that usb is not detected on ls1088ardb
It's not really about fixing issue but adding support.
>
> Signed-off-by: yinbo.zhu
> Signed-off-by: Ran Wang
On Wed, Aug 30, 2017 at 06:12:35PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> Corrected the subject for 3/5 patch v1.
>
> Yuan Yao (3):
> arm64: dts: ls1012a: add the DTS node for DSPI support
> Documentation: fsl: dspi: Add fsl,ls1012a-dspi compatible string
On Sat, Sep 09, 2017 at 05:03:28AM +0530, Sumit Garg wrote:
> Add optee device tree node on ls1012a, ls1043a, ls1046a, ls1088a
> and ls208xa.
>
> Signed-off-by: Sumit Garg
Applied, thanks.
On Fri, Aug 18, 2017 at 04:53:46PM +0100, Martyn Welch wrote:
> This series adds the device tree for the GE Healthcare PPD and binding
> documentation for the ge-achc, as used by the PPD device tree.
>
> Fabien Lahoudere (1):
> ARM: dts: imx53: Add GE Healthcare PPD
>
> Martyn Welch (1):
>
On Wed, Oct 11, 2017 at 03:08:23PM +0300, Leonard Crestez wrote:
> Enable cpuidle support on i.MX6DL starting from IMX_CHIP_REVISION_1_1.
>
> This also makes the code cleaner because 6q and 6dl actually have
> different revision histories.
>
> Signed-off-by: Bai Ping
>
On Wed, Oct 11, 2017 at 01:05:35PM +0200, Lothar Waßmann wrote:
> This patch set brings the Ka-Ro electronics GmbH TX28 board support up
> to date.
Applied all, thanks.
On Wed, Oct 11, 2017 at 01:07:34PM +0200, Lothar Waßmann wrote:
> This patch set brings the Ka-Ro electronics GmbH TX53 module series
> dts files up to date.
Applied all, thanks.
On Fri, Oct 13, 2017 at 12:43:00PM +0200, Lothar Waßmann wrote:
> Convert the TXUL board support to use the panel-simple driver.
> The now obsolete 'display-timings' node is kept for compatibility with
> U-Boot, which derives its display configuration therefrom.
>
> Signed-off-by: Lothar Waßmann
On Mon, Sep 18, 2017 at 04:58:29PM +0530, Jagan Teki wrote:
> From: Jagan Teki <ja...@amarulasolutions.com>
>
> Linux Sound card now uses generic simple-audio-card, so add
> the same along with related audmux and codec(via u2c3) for
> i.CoreM6 QDL module boards.
>
PCIE INT D is IRQ 125
>
> Invert the mapping information in corresponding DT node to reflect
> that.
>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: yurov...@gmail.com
> Cc: Fabio Estevam <fabio.este...@nxp.com>
> Cc: Rob Herring <robh...@kernel.org>
> Cc: Ma
On Tue, Oct 03, 2017 at 04:04:15PM +0300, Madalin Bucur wrote:
> Use constants in the interrupt description.
>
> Signed-off-by: Madalin Bucur
Applied, thanks.
On Tue, Aug 22, 2017 at 01:31:32PM -0700, Stephen Boyd wrote:
> Also, I see that on v4.13-rc series the read/write checks are
> causing the led driver to fail in a different way:
>
> spmi spmi-0: error: impermissible write to peripheral sid:0 addr:0xc040
> qcom-spmi-gpio
translation during the gpio driver probe.
>
> Signed-off-by: Kiran Gunda <kgu...@codeaurora.org>
It fixes qcom-spmi-gpio driver probe failure introduced by the series
below.
[PATCH V2 00/12]: spmi: pmic-arb: Support for HW v5 and other fixes
FWIW, Tested-by: Shawn Guo <shawn...@kernel.org>
ed-off-by: Kiran Gunda <kgu...@codeaurora.org>
> > Tested-by: Shawn Guo <shawn...@kernel.org>
> > ---
>
> This sounds like a band-aid. Isn't the gpio driver going to keep probing
> all the pins that are not supposed to be accessed due to security
> constraints? What ex
ed-off-by: Kiran Gunda <kgu...@codeaurora.org>
> > Tested-by: Shawn Guo <shawn...@kernel.org>
> > ---
>
> This sounds like a band-aid. Isn't the gpio driver going to keep probing
> all the pins that are not supposed to be accessed due to security
> constraints? What exac
On Fri, Aug 25, 2017 at 04:18:18PM -0700, Stephen Boyd wrote:
> On 08/25, Shawn Guo wrote:
> > On Thu, Aug 24, 2017 at 11:37:01AM -0700, Stephen Boyd wrote:
> > > On 08/24, Shawn Guo wrote:
> > > > On Tue, Aug 22, 2017 at 01:31:32PM -0700, Stephen Boyd wrote:
> >
v <arvind.yadav...@gmail.com>
Acked-by: Shawn Guo <shawn...@kernel.org>
v <arvind.yadav...@gmail.com>
Acked-by: Shawn Guo <shawn...@kernel.org>
Signed-off-by: Kiran Gunda <kgu...@codeaurora.org>
> > Tested-by: Shawn Guo <shawn...@kernel.org>
> > ---
> > v2:
> > Fixed the commit message.
> > Added Shawn's 'Tested-by' tag.
> >
> > v1:
> > This patch d
On Mon, Aug 28, 2017 at 04:27:54PM +0800, Fenglin Wu wrote:
> On 8/22/2017 4:55 PM, Shawn Guo wrote:
> >On Mon, Aug 21, 2017 at 04:18:58PM -0700, Stephen Boyd wrote:
> >>On 08/18/2017 08:28 AM, Kiran Gunda wrote:
> >>>The peripheral ownership check is not necessary o
On Wed, Jul 19, 2017 at 03:17:07PM +0800, fengl...@codeaurora.org wrote:
> From: Fenglin Wu
>
> Add support for qcom,gpios-disallowed property which is used to exclude
> PMIC GPIOs not owned by the APSS processor from the pinctrl device.
If I understand it correctly,
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