On Tue, 9 Aug 2016, Paul Gortmaker wrote:
> [Re: [PATCH v18 6/6] ARM: socfpga: fpga bridge driver support] On 08/08/2016
> (Mon 13:44) Moritz Fischer wrote:
>
> > Hi Alan,
> >
> > On Mon, Aug 8, 2016 at 12:18 PM, atull wrote:
> >
> > >> Please
On Thu, 28 Jul 2016, Andrea Galbusera wrote:
> On Fri, Jun 10, 2016 at 4:18 AM, Trent Piepho wrote:
> > On Fri, 2016-02-05 at 15:30 -0600, at...@opensource.altera.com wrote:
> >> Supports Altera SOCFPGA bridges:
> >> * fpga2sdram
> >> * fpga2hps
> >> * hps2fpga
> >> * lwhps2fpga
> >>
> >> All
On Thu, 28 Jul 2016, Trent Piepho wrote:
> On Thu, 2016-07-28 at 10:21 -0500, atull wrote:
> > > >
> > > > This isn't going work if more than one bridge is used. Each bridge has
> > > > its own priv and thus priv->l3_remap_value. Each bridge
On Thu, 8 Sep 2016, Jean Delvare wrote:
Hi Greg,
Can you take in this patch?
Thanks,
Alan
> The Zynq FPGA manager driver serves no purpose on other architectures
> so hide it unless build-testing.
>
> Signed-off-by: Jean Delvare
> Acked-by: Moritz Fischer
> Acked-by: Alan Tull
> Acked-by: M
On Thu, 14 Jul 2016, Paul Gortmaker wrote:
> On Tue, Jul 12, 2016 at 3:36 PM, Alan Tull
> wrote:
> > Supports Altera SOCFPGA bridges:
> > * fpga2sdram
> > * fpga2hps
> > * hps2fpga
> > * lwhps2fpga
> >
> > Allows enabling/disabling the bridges through the FPGA
> > Bridge Framework API functi
On Wed, 7 Oct 2015, Moritz Fischer wrote:
> Hi Greg, Alan
>
> On Wed, Oct 7, 2015 at 6:09 PM, Greg KH wrote:
> > On Wed, Oct 07, 2015 at 04:36:25PM +0100, at...@opensource.altera.com wrote:
> >> From: Alan Tull
> >>
> >> Hi Greg,
> >>
> >> I'm resending v11
> >>
> >> The changes requested for v
From: Alan Tull
Add FPGA manager to device tree for SoCFPGA.
Signed-off-by: Alan Tull
---
arch/arm/boot/dts/socfpga.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 314e589..e37ba11 100644
--- a/arch/arm/boot/
From: Alan Tull
Enable fpga manager framework and low level driver for
socfpga in socfpga_defconfig
Signed-off-by: Alan Tull
---
arch/arm/configs/socfpga_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig
b/arch/arm/configs/socfpga_defconfig
ind
From: Alan Tull
Add FPGA manager to device tree for SoCFPGA.
Signed-off-by: Alan Tull
---
v2: Remove 0x after @
No caps in hex numbers
renamed hps_0_fpgamgr to fpgamgr0
move node to be in alpha order by node name
---
arch/arm/boot/dts/socfpga.dtsi | 7 +++
1 file changed, 7 ins
On Tue, 13 Oct 2015, Dinh Nguyen wrote:
> On Tue, 13 Oct 2015, Steffen Trumtrar wrote:
>
> > Hi Alan!
> >
> > On Tue, Oct 13, 2015 at 01:28:20PM -0500, at...@opensource.altera.com wrote:
> > > From: Alan Tull
> > >
> > > Add FPGA manager to device tree for SoCFPGA.
> > >
> > > Signed-off-by:
From: Alan Tull
Ensure device and driver lifetime from of_fpga_mgr_get() to
fpga_mgr_put().
* Don't put_device() in of_fpga_mgr_get, do it in fpga_mgr_put().
(still do put_device if there is an error).
* Do module_get on the low level driver.
* Don't need to module_get(THIS_MODULE) since we wo
From: Alan Tull
Two patches to fix some issues that were brought up
in the review of "add FPGA manager core".
Alan
Alan Tull (2):
fpga manager: ensure lifetime with of_fpga_mgr_get
fpga manager: remove unnecessary null pointer checks
drivers/fpga/fpga-mgr.c | 44 +---
From: Alan Tull
Remove unnecessary null pointer checks. We want the caller of
these functions to do their own pointer checks. Add some
comments to document this.
Signed-off-by: Alan Tull
---
drivers/fpga/fpga-mgr.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --
On Fri, 16 Oct 2015, Moritz Fischer wrote:
Hi Moritz,
I just noticed a problem regarding private data. Fortunately
it is easy to fix. See below...
> +static int zynq_fpga_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct zynq_fpga_priv *priv;
> +
On Thu, 22 Oct 2015, Moritz Fischer wrote:
> Upon registering a FPGA Manager low level driver, FPGA Manager
> core overwrites the platform drvdata pointer. Prior to this commit
> zynq-fpga falsely relied on this pointer to still be valid at remove()
> time.
>
> Reported-by: Alan Tull
> Signed-of
On Thu, 22 Oct 2015, Moritz Fischer wrote:
Hi Moritz,
Thank you, yes this is better.
I don't know if I need to ack everything, but here it is
anyway:
Acked-by: Alan Tull
Alan
> The return value should be checked for non-zero, instead
> of checking it being IS_ERR_VALUE().
>
> Signed-off-by:
From: Alan Tull
Improvements in this version:
Fixed things in the framework that were left over from my original
version that was a character driver. In particular, make the
struct device be present in the fpga_manager struct, not as a
pointer, so container_of will work.
Also rewrote the part
From: Alan Tull
Supports standard ops for low level FPGA drivers.
Various manufacturors' FPGAs can be supported by adding low
level drivers. Each driver needs to register its ops
using fpga_mgr_register().
Exports methods of doing operations to program FPGAs. These
should be sufficient for ind
On Mon, 8 Dec 2014, One Thousand Gnomes wrote:
> On Sat, 6 Dec 2014 13:00:17 +
> Grant Likely wrote:
>
> > On Fri, Oct 24, 2014 at 11:52 AM, Pavel Machek wrote:
> > > Hi!
> > >
> > >> * /sys/class/fpga_manager//firmware
> > >> Name of FPGA image file to load using firmware class.
> > >>
From: Alan Tull
Add documentation for new fpga manager sysfs interface.
Signed-off-by: Alan Tull
---
Documentation/ABI/testing/sysfs-class-fpga-manager | 38
1 file changed, 38 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-class-fpga-manager
diff --g
From: Alan Tull
Support programming the fpga from device tree overlays.
This patch adds two exported functions to the core
(fpga-mgr.c):
of_fpga_mgr_dev_lookup
Get pointer to fpga manager struct given a phandle.
of_find_fpga_mgr_by_node
Get pointer to fpga manager given device node
On Tue, 9 Dec 2014, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> Improvements in this version:
>
> Fixed things in the framework that were left over from my original
> version that was a character driver. In particular, make the
> struct device be present in the fpga_manager struct
From: Alan Tull
Improvements in this v3 and v4:
I've moved the driver to drivers/staging.
I'm including the altera low level driver, defconfig changes, and
DTS changes - everything to make it work on socfpga platform.
Fixed things in the framework that were left over from my original
version (
From: Alan Tull
Supports standard ops for low level FPGA drivers.
Various manufacturors' FPGAs can be supported by adding low
level drivers. Each driver needs to register its ops
using fpga_mgr_register().
Exports methods of doing operations to program FPGAs. These
should be sufficient for ind
From: Alan Tull
New bindings document for Altera fpga manager.
Signed-off-by: Alan Tull
---
.../devicetree/bindings/fpga/altera-fpga-mgr.txt | 17 +
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/altera-fpga-mgr.txt
diff --git a
From: Alan Tull
Add driver to fpga manager framework to allow configuration
of FPGA in Altera SoC FPGA parts.
Signed-off-by: Alan Tull
---
v2: fpga_manager struct now contains struct device
fpga_manager_register parameters now take device
v3: move to drivers/staging
---
drivers/staging/fp
From: Alan Tull
Add Altera FGPA manager to device tree.
Signed-off-by: Alan Tull
---
arch/arm/boot/dts/socfpga.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 4472fd9..bab98b6 100644
--- a/arch/arm/boo
From: Alan Tull
Enable FPGA manager for Altera socfpga.
Signed-off-by: Alan Tull
---
arch/arm/configs/socfpga_defconfig |4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/configs/socfpga_defconfig
b/arch/arm/configs/socfpga_defconfig
index a2956c3..2740057 100644
--- a/arch/a
From: Alan Tull
Add documentation for new fpga manager sysfs interface.
Signed-off-by: Alan Tull
---
Documentation/ABI/testing/sysfs-class-fpga-manager | 38
1 file changed, 38 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-class-fpga-manager
diff --g
On Tue, 9 Dec 2014, One Thousand Gnomes wrote:
Hi Alan,
> > I agree with the view that a FPGA is something that can get reprogrammed a
> > lot.
> > That's a flexibility we want to use. I don't see a problem with using
> > firmware
> > to do the programming as long as we have a lightweight inte
On Wed, 10 Dec 2014, Michal Simek wrote:
> Hi Alan,
>
> On 12/09/2014 09:14 PM, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Enable FPGA manager for Altera socfpga.
> >
> > Signed-off-by: Alan Tull
> > ---
> > arch/arm/configs/socfpga_defconfig |4
> > 1 file chang
On Wed, 10 Dec 2014, Michal Simek wrote:
> On 12/10/2014 03:47 PM, Greg KH wrote:
> > On Wed, Dec 10, 2014 at 10:42:39AM +0100, Michal Simek wrote:
> >> Hi Greg,
> >>
> >> On 12/09/2014 09:14 PM, at...@opensource.altera.com wrote:
> >>> From: Alan Tull
> >>>
> >>> Add documentation for new fpga m
On Wed, 10 Dec 2014, Steffen Trumtrar wrote:
> Hi!
>
> On Tue, Dec 09, 2014 at 02:14:46PM -0600, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add Altera FGPA manager to device tree.
> >
> > Signed-off-by: Alan Tull
> > ---
> > arch/arm/boot/dts/socfpga.dtsi | 10 +
On Wed, 10 Dec 2014, Greg KH wrote:
> On Tue, Dec 09, 2014 at 02:14:44PM -0600, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Improvements in this v3 and v4:
>
> Due to the review comments here, and all of the kbuild issues found,
> please just work on a v5 series that I can ap
On Mon, 22 Dec 2014, Rob Herring wrote:
> On Fri, Dec 19, 2014 at 10:45 AM, wrote:
> > From: Alan Tull
> >
> > New bindings document for Altera fpga manager.
> >
> > Signed-off-by: Alan Tull
> > ---
> > v5 : Move bindings to drivers/staging/fpga/Documentation/bindings
> >
> > v6 : No change in
From: Alan Tull
New bindings document for Altera fpga manager.
Signed-off-by: Alan Tull
---
v5 : Move bindings to drivers/staging/fpga/Documentation/bindings
v6 : No change in this patch for v6 of the patch set
v7 : No change in this patch for v7 of the patch set
v8 : Make compatible string
From: Alan Tull
Supports standard ops for low level FPGA drivers.
Various manufacturors' FPGAs can be supported by adding low
level drivers. Each driver needs to register its ops
using fpga_mgr_register().
Exports methods of doing operations to program FPGAs. These
should be sufficient for ind
From: Alan Tull
Add driver to fpga manager framework to allow configuration
of FPGA in Altera SoCFPGA parts.
Signed-off-by: Alan Tull
Acked-by: Michal Simek
---
v2: fpga_manager struct now contains struct device
fpga_manager_register parameters now take device
v3: skip a version to align
From: Alan Tull
v8 changes the compatible string for SOCFPGA FPGA managers
to be more chip specific.
"altr,fpga-mgr" becomes "altr,socfpga-fpga-mgr"
Thanks,
Alan
Alan Tull (4):
doc: add bindings document for altera fpga manager
fpga manager: add sysfs interface document
staging: fpga man
From: Alan Tull
Add documentation under drivers/staging for new fpga manager's
sysfs interface.
Signed-off-by: Alan Tull
---
v5 : (actually second version, but keeping version numbers
aligned with rest of patch series)
Move document to drivers/staging/fpga/Documentation/ABI
v6 :
On Tue, 6 Jan 2015, Rob Herring wrote:
> On Tue, Jan 6, 2015 at 2:13 PM, wrote:
> > From: Alan Tull
> >
> > New bindings document for Altera fpga manager.
> >
> > Signed-off-by: Alan Tull
>
> Acked-by: Rob Herring
>
> Like I said, this binding doesn't look like it will change other than
> p
On Tue, 13 Jan 2015, Pavel Machek wrote:
> On Tue 2015-01-13 09:40:18, Pantelis Antoniou wrote:
> > Hi Pavel,
> >
> > > On Jan 13, 2015, at 09:28 , Pavel Machek wrote:
> > >
> > > Hi!
> > >
> > >> +What: /sys/class/fpga_manager//firmware
> > >> +Date: Octobe
On Tue, 13 Jan 2015, Pantelis Antoniou wrote:
> Hi Alan,
>
> > On Jan 13, 2015, at 18:28 , One Thousand Gnomes
> > wrote:
> >
> > On Mon, 12 Jan 2015 14:43:14 -0700
> > Jason Gunthorpe wrote:
> >
> >> On Mon, Jan 12, 2015 at 09:01:34PM +, One Thousand Gnomes wrote:
> >>> There are plenty
On Tue, 13 Jan 2015, Jason Gunthorpe wrote:
> On Tue, Jan 13, 2015 at 04:28:47PM +, One Thousand Gnomes wrote:
>
> > There is a lot of code overlap in things like loading the bitstreams,
> > there is also some overlap because you want to be able to assign FPGA
> > resources. For example if yo
On Tue, 13 Jan 2015, Jason Gunthorpe wrote:
> On Tue, Jan 13, 2015 at 03:37:14PM -0600, atull wrote:
>
> > > I do agree with this, and I think this is where this patch set goes so
> > > wrong.
> > >
> > > Just exposing all sorts of controls to userspac
On Fri, 9 Jan 2015, Rob Herring wrote:
> On Tue, Jan 6, 2015 at 4:34 PM, atull wrote:
> > On Tue, 6 Jan 2015, Rob Herring wrote:
> >
> >> On Tue, Jan 6, 2015 at 2:13 PM, wrote:
> >> > From: Alan Tull
> >> >
> >> > New bindings d
On Wed, 7 Jan 2015, Pavel Machek wrote:
> On Tue 2015-01-06 14:13:37, at...@opensource.altera.com wrote:
> > +
> > +What: /sys/class/fpga_manager//firmware
> > +Date: October 2014
> > +KernelVersion: 3.18
> > +Contact: Alan Tull
> > +Description: Name of the
On Sat, 10 Jan 2015, Konrad Zapalowicz wrote:
> On 01/06, at...@opensource.altera.com wrote:
> > From: Alan Tull
>
> Alan, there is something wrong with your email client configuration
> and you need to fix.
>
> thanks,
> konrad
Hi Konrad,
Can you be more specific? What problem are you seein
On Sat, 10 Jan 2015, Pavel Machek wrote:
> On Sat 2015-01-10 10:10:51, Pantelis Antoniou wrote:
> > Hi Pavel,
> >
> > > On Jan 9, 2015, at 22:56 , Pavel Machek wrote:
> > >
> > > On Fri 2015-01-09 13:14:24, atull wrote:
> > >> On Wed, 7 Jan
On Wed, 21 Jan 2015, Jason Gunthorpe wrote:
> [unfutzd the cc a bit, sorry]
>
> On Wed, Jan 21, 2015 at 04:19:17PM -0600, atull wrote:
> > > If we consider a Zynq, for instance, there are a number of clock nets
> > > that the CPU drives into the FPGA fabric. T
On Tue, 17 Mar 2015, Greg Kroah-Hartman wrote:
> On Tue, Mar 17, 2015 at 03:36:47PM -0500, Alan Tull wrote:
> > Supports the Newhaven NHD‐0216K3Z‐NSW‐BBW 2x16 LCD module as i2c slave.
> > Devices will show up as /dev/ttyLCD0, etc.
> >
> > * Backspace is supported to the beginning of the current
On Tue, 26 May 2015, Dinh Nguyen wrote:
> Hi Alan,
>
> On 5/22/15 1:02 PM, Alan Tull wrote:
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > This patch assumes that u-boot has already configured sdr:
> > sdr.ctrlcfg.lowpwre
On Tue, 26 May 2015, Pavel Machek wrote:
> Hi!
>
> > Thanks for the feedback.
> >
> > Yes I agree.
> >
> > One possibility is that I could add a suspend function to EDAC that
> > always fails with a helpful message like "Suspend with EDAC not
> > supported." If someone wants to suspend, they'l
On Thu, 28 May 2015, Dinh Nguyen wrote:
> On 05/27/2015 03:25 PM, atull wrote:
> > On Tue, 26 May 2015, Dinh Nguyen wrote:
> >
> >> Hi Alan,
> >>
> >> On 5/22/15 1:02 PM, Alan Tull wrote:
> >>> Add code that requests that the sdr controller g
On Fri, 5 Jun 2015, Dinh Nguyen wrote:
> On Thu, Jun 4, 2015 at 5:35 PM, Dinh Nguyen
> wrote:
> > Hi Alan,
> >
> > On 06/02/2015 02:22 PM, Dinh Nguyen wrote:
> >> On 06/02/2015 01:35 PM, Alan Tull wrote:
> >>> Support suspend to ram on socfpga.
> >>> * allocate space in ocram using sram driver.
On Sat, 6 Jun 2015, Borislav Petkov wrote:
> On Fri, Jun 05, 2015 at 04:40:29PM -0500, Thor Thayer wrote:
> > Yes, in our case, it is a hardware issue but I'm still gathering
> > information.
> >
> > The IRQ vectors for OCRAM reside on DDR and in Suspend-to-RAM mode we're
> > executing out of OCR
On Fri, 29 May 2015, Dinh Nguyen wrote:
>
>
> On 5/28/15 4:19 PM, Alan Tull wrote:
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > Suspend-to-RAM and EDAC support are mutually exclusive on
> > SOCFPGA. If the EDAC is enabl
On Fri, 29 May 2015, Dinh Nguyen wrote:
>
>
> On 5/28/15 4:19 PM, Alan Tull wrote:
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > Suspend-to-RAM and EDAC support are mutually exclusive on
> > SOCFPGA. If the EDAC is enabl
On Wed, 20 Aug 2014, Romain Baeriswyl wrote:
> From: Romain Baeriswyl
>
> Some legacy devices support ony I2C standard mode at 100kHz.
> This patch allows to select the standard mode through the DTS
> with the use of the existing clock-frequency parameter.
>
> When clock-frequency parameter is
From: Alan Tull
Add support for simple on/off control of each channel.
To add regulator support, the pmbus part driver needs to add
regulator_desc information, of_regulator_match information,
and number of regulators to its pmbus_driver_info struct.
regulator_desc can be declared using default
From: Alan Tull
This set of patches adds regulator support for pmbus_core.c and ltc2978.c
Each output has individual on/off control.
>From PMBus_Specification_Part_II_Rev_1-3_20140318.pdf:
12.1.1. OPERATION Command Bit [7]
Bit [7] controls whether the PMBus device output is on or off.
If b
From: Alan Tull
Add two helper functions:
* pmbus_write_byte_data = paged byte write
* pmbus_update_byte_data = paged byte read/modify/write
Signed-off-by: Alan Tull
---
drivers/hwmon/pmbus/pmbus_core.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/d
From: Alan Tull
Add simple on/off regulator support for ltc2978 and
other pmbus parts supported by ltc2978.c
Signed-off-by: Alan Tull
v2: Remove '#include '
Only one regulator per pmbus device
Get regulator_init_data from pdata or device tree
v3: Support multiple regulators for each c
From: Alan Tull
Add code that requests that the sdr controller go into
self-refresh mode. This code is run from ocram.
This patch assumes that u-boot has already configured sdr:
sdr.ctrlcfg.lowpwreq.selfrfshmask = 3
sdr.ctrlcfg.lowpwrtiming.clkdisablecycles = 8
sdr.ctrlcfg.dramtiming4.sel
From: Alan Tull
patch 1: socfpga: hotplug: put cpu1 in wfi
Fix how cpu1 is hotplugged to prevent increaced power
consumption.
patch 2: socfpga: support suspend to ram
* Initialize ocram
* Add a function to do suspend to ram and
place DDR in self-refresh
* This function lives in ocr
From: Alan Tull
Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
since that results in increased power consumption.
Reset CPU1 briefly during CPU1 bootup.
This has been tested for hotplug and suspend/resume and results
in no increased power consumption.
Signed-off-by: Alan Tull
-
On Wed, 24 Sep 2014, Guenter Roeck wrote:
Hi Guenter,
> On Wed, Sep 24, 2014 at 12:57:56PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add simple on/off regulator support for ltc2978 and
> > other pmbus parts supported by ltc2978.c
> >
> > Signed-off-by: Alan Tull
>
On Wed, 24 Sep 2014, Guenter Roeck wrote:
> On Wed, Sep 24, 2014 at 12:57:55PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add support for simple on/off control of each channel.
> >
> > To add regulator support, the pmbus part driver needs to add
> > regulator_desc inf
On Wed, 24 Sep 2014, Dinh Nguyen wrote:
> Hi Alan,
>
> On 9/24/14, 12:57 PM, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add support for simple on/off control of each channel.
> >
> > To add regulator support, the pmbus part driver needs to add
> > regulator_desc information
On Wed, 24 Sep 2014, Russell King - ARM Linux wrote:
Hi Russell,
> On Wed, Sep 24, 2014 at 03:27:28PM -0500, at...@opensource.altera.com wrote:
> > diff --git a/arch/arm/mach-socfpga/platsmp.c
> > b/arch/arm/mach-socfpga/platsmp.c
> > index 5356a72..1d5f8ad 100644
> > --- a/arch/arm/mach-socfpga
Hi Steffen,
On Thu, 25 Sep 2014, Steffen Trumtrar wrote:
> Hi!
>
> On Wed, Sep 24, 2014 at 03:27:29PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > This
On Tue, 9 Sep 2014, Weike Chen wrote:
> The Synopsys DesignWare APB GPIO driver only supports open firmware devices.
> But, like Intel Quark X1000 SOC, which has a single PCI function exporting
> a GPIO and an I2C controller, it is a Multifunction device. This patch is
> to enable the current Syno
On Thu, 11 Sep 2014, Chen, Alvin wrote:
> > >
> > > Hi Alvin,
> > >
> > > I did a quick test and this looks like it works for me (with device tree).
> > > I had a couple of small fixes below.
> > It is very appreciated to help testing.
Sure. Thanks for adding features to the driver!
> >
> >
>
On Thu, 11 Sep 2014, Shevchenko, Andriy wrote:
> On Wed, 2014-09-10 at 14:11 -0500, atull wrote:
>
> []
>
> > > static int dwapb_gpio_probe(struct platform_device *pdev)
> > > {
> > > + int i;
> > > struct resource *res;
> > >
On Tue, 9 Sep 2014, Weike Chen wrote:
>
> struct dwapb_gpio;
> +struct dwapb_context;
>
> struct dwapb_gpio_port {
> struct bgpio_chip bgc;
> boolis_registered;
> struct dwapb_gpio *gpio;
> + struct dwapb_context*ctx;
Alvin,
Will th
On Fri, 12 Sep 2014, Chen, Alvin wrote:
> > On Tue, 9 Sep 2014, Weike Chen wrote:
> >
> > >
> > > struct dwapb_gpio;
> > > +struct dwapb_context;
> > >
> > > struct dwapb_gpio_port {
> > > struct bgpio_chip bgc;
> > > boolis_registered;
> > > struct dwapb_gpio
On Fri, 26 Sep 2014, Dinh Nguyen wrote:
> On 09/24/2014 03:27 PM, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add code that requests that the sdr controller go into
> > self-refresh mode. This code is run from ocram.
> >
> > This patch assumes that u-boot has already configu
On Sat, 20 Sep 2014, Wolfram Sang wrote:
> On Wed, Aug 20, 2014 at 04:29:08PM +0200, Romain Baeriswyl wrote:
> > From: Romain Baeriswyl
> >
> > Some legacy devices support ony I2C standard mode at 100kHz.
> > This patch allows to select the standard mode through the DTS
> > with the use of the e
On Tue, 16 Sep 2014, Weike Chen wrote:
One more:
> +
> + /*
> + * Only port A can provide interrupts in all configurations of
> + * the IP.
> + */
> + if (pp->idx == 0 &&
> + of_property_read_bool(port_np, "interrupt-c
From: Alan Tull
Add support for enabling or disabling all supplies.
Signed-off-by: Alan Tull
---
drivers/hwmon/pmbus/Kconfig |9 ++
drivers/hwmon/pmbus/ltc2978.c | 69 +
2 files changed, 78 insertions(+)
diff --git a/drivers/hwmon/pmbus/Kcon
From: Alan Tull
This set of patches adds regulator support to pmbus_core.c and to
ltc2978.c.
Other pmbus parts can use this to add their own regulator support.
Current ltc2978 support is limited to enable/disable.
Tested on ltc2978. Looking at the datasheets for the other parts
supported by l
From: Alan Tull
Enable pmbus device drivers to add regulator functionality.
To add a regulator, it's pretty straightforward. The pmbus
device driver needs to add regulator information to its
pmbus_driver_info struct:
* num_regulators : number of regulators
* reg_init : array of struct
On Fri, 22 Aug 2014, Mark Brown wrote:
> On Thu, Aug 21, 2014 at 05:21:26PM -0500, at...@opensource.altera.com wrote:
>
> > +config SENSORS_LTC2978_REGULATOR
> > + boolean "Regulator support for LTC2974, LTC2978, LTC3880, and LTC3883"
> > + default n
>
> No need to say default n here, it's t
From: Alan Tull
Version 2 :
* Get regulator_init_data from platform data or device tree.
* One regulator per pmbus part.
* Clean up Kconfig and #includes.
This set of patches adds regulator support to pmbus_core.c and to
ltc2978.c. Other pmbus parts can use this to add their own
regulator
From: Alan Tull
To add a regulator, the pmbus device driver needs to add
regulator_desc information to its pmbus_driver_info struct.
The regulator_init_data can be intialized from either
platform data or the device tree.
Signed-off-by: Alan Tull
v2: Remove '#include '
Only one regulator pe
From: Alan Tull
Add regulator with support for enabling or disabling all
supplies.
Signed-off-by: Alan Tull
v2: Remove '#include '
Kconfig fixes
Remove hardwired regulator_init_data
---
drivers/hwmon/pmbus/Kconfig |7 +
drivers/hwmon/pmbus/ltc2978.c | 60 +++
On Thu, 21 Aug 2014, at...@opensource.altera.com wrote:
> From: Alan Tull
>
> This set of patches adds regulator support to pmbus_core.c and to
> ltc2978.c.
>
> Other pmbus parts can use this to add their own regulator support.
>
> Current ltc2978 support is limited to enable/disable.
>
> Tes
On Fri, 22 Aug 2014, Mark Brown wrote:
> On Fri, Aug 22, 2014 at 04:11:33PM -0500, at...@opensource.altera.com wrote:
>
> > + if (pdata && pdata->reg_init_data) {
> > + config.init_data = pdata->reg_init_data;
> > + } else {
> > + config.init_data = of_get_regulator_init_d
7;t boot.
If I rebuild with only the first patch, I get only one gpio block showing up
(should
have 3 for this board) and these messages:
[ cut here ]----
WARNING: CPU: 0 PID: 1 at /home/atull/repos/linux-socfpga/fs/sysfs/dir.c:31
sysfs_warn_dup+0x58/0x74()
sysfs: cannot creat
On Wed, 27 Aug 2014, Weike Chen wrote:
> This patch enables suspend and resume mode for the power management, and
> it is based on Josef Ahmad's previous work.
>
> Reviewed-by: Hock Leong Kweh
> Reviewed-by: Shevchenko, Andriy
> Signed-off-by: Weike Chen
> ---
> drivers/gpio/gpio-dwapb.c |
On Wed, 27 Aug 2014, Weike Chen wrote:
> This patch enables 'debounce' for the designware GPIO, and
> it is based on Josef Ahmad's previous work.
>
> Reviewed-by: Hock Leong Kweh
> Reviewed-by: Shevchenko, Andriy
> Signed-off-by: Weike Chen
> ---
> drivers/gpio/gpio-dwapb.c | 42 +++
On Sun, 7 Sep 2014, Pavel Machek wrote:
> Hi!
>
> > [resend with fixed email settings]
> >
> > The idea of the framework is to provide consistent ways of
> > programming raw images into FPGA's.
> >
> > Programming from device tree overlays is supported.
> >
> > The core (fpga-mgr.c) does not i
On Mon, 18 Aug 2014, Guenter Roeck wrote:
> On Sat, Aug 16, 2014 at 02:20:50PM +0100, Mark Brown wrote:
> > On Fri, Aug 15, 2014 at 04:34:49PM -0500, atull wrote:
> >
> > > I am interested in adding functionality to be able to gate power supplies
> > > going thr
From: Alan Tull
Add "speed-mode" Device Tree property to select between
standard and fast i2c mode. Previously, driver was hardwired
as fast mode. Default to fast mode if property is not
present.
Signed-off-by: Alan Tull
---
drivers/i2c/busses/i2c-designware-platdrv.c |9 +++--
1 fil
From: Alan Tull
Add "speed-mode" Device Tree property to select between
standard and fast i2c mode. Previously, driver was hardwired
as fast mode. Default to fast mode if property is not
present.
Signed-off-by: Alan Tull
---
.../devicetree/bindings/i2c/i2c-designware.txt |3 +++
1 fi
From: Alan Tull
Use the documented, but unimplemented "clock-frequency"
Device Tree setting as a guide on whether to set the speed
mode bits in DW_IC_CON to standard or fast i2c mode.
Previously, the driver was hardwired to fast mode. Default
to fast mode if the "clock-frequency" property is no
On Tue, 19 Aug 2014, Wolfram Sang wrote:
> On Tue, Aug 19, 2014 at 01:34:35PM -0500, at...@opensource.altera.com wrote:
> > From: Alan Tull
> >
> > Add "speed-mode" Device Tree property to select between
> > standard and fast i2c mode. Previously, driver was hardwired
> > as fast mode. Defau
On Wed, 20 Aug 2014, Romain Baeriswyl wrote:
> Hi,
>
> With the patch "i2c designware add support of I2C standard mode" I already
> proposed:
> - I2C standard mode is selected with 100kHz clock frequency.
> - I2C fast mode is selected with 400kHy clock frequency.
> - EINVAL error is returned i
On Wed, 20 Aug 2014, Romain Baeriswyl wrote:
> From: Romain Baeriswyl
>
> Some legacy devices support ony I2C standard mode at 100kHz.
> This patch allows to select the standard mode through the DTS
> with the use of the existing clock-frequency parameter.
>
> When clock-frequency parameter i
y hair-splitting) preference. :)
Alan
>
> - Original Message -
> From: "atull"
> To: "Romain Baeriswyl"
> Cc: "Mark Rutland" , w...@the-dreams.de,
> bar...@tkos.co.il, "mika westerberg" ,
> "grant likely" , robh.
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