Hi Chanwoo Choi,
Ah, i am base on
https://chromium.googlesource.com/chromiumos/third_party/kernel/v4.4,
and forget to rebase on
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git, i
will fix it in next version.
I am sorry about that. And can you help to review the devfreq
Hi Chanwoo Choi,
On 2016年08月01日 16:08, Chanwoo Choi wrote:
Hi Lin,
I add the one minor comment for full name of 'DRI'.
On 2016년 08월 01일 16:41, Chanwoo Choi wrote:
Hi Lin,
Because you remove the 'RFC' prefix on patch title,
I think that you better to make the documentation as following:
- Doc
Hi Sean,
On 2016年09月07日 01:18, Sean Paul wrote:
On Mon, Sep 5, 2016 at 1:06 AM, Lin Huang wrote:
when in ddr frequency scaling process, vop can not do enable or
disable operation, since in dcf we check vop clock to see whether
vop work. If vop work, dcf do ddr frequency scaling when vop
in vbl
Hi
On 2016年09月07日 02:55, Sean Paul wrote:
On Tue, Sep 6, 2016 at 2:15 PM, hl wrote:
Hi Sean,
On 2016年09月07日 01:18, Sean Paul wrote:
On Mon, Sep 5, 2016 at 1:06 AM, Lin Huang wrote:
when in ddr frequency scaling process, vop can not do enable or
disable operation, since in dcf we check
Hi Heiko,
On 2016年08月05日 06:37, Heiko Stuebner wrote:
Am Freitag, 29. Juli 2016, 15:56:55 schrieb Lin Huang:
From: Heiko Stübner
add clock flag parameter so we can pass specific clock flag
(like CLK_GET_RATE_NOCACHE etc..)to pll driver.
Signed-off-by: Heiko Stübner
Signed-off-by: Lin Huang
Hi Chanwoo Choi,
On 2016年08月23日 13:05, Chanwoo Choi wrote:
Hi Lin,
On 2016년 08월 22일 07:16, hl wrote:
Hi Chanwoo Choi,
On 2016年08月17日 12:50, Chanwoo Choi wrote:
Hi Lin,
On 2016년 08월 17일 07:36, Lin Huang wrote:
This patch adds the documentation for rockchip rk3399 dmc driver.
Signed-off
On Wednesday, August 16, 2017 10:50 PM, Mark Brown wrote:
On Fri, Aug 11, 2017 at 03:31:28PM +0800, Lin Huang wrote:
on some board use enable pin to control dmic start and stop,
so add this feature in dmic driver.
This doens't apply against current code, please check and resend.
Oh, Thanks f
On Saturday, November 04, 2017 12:35 PM, Brian Norris wrote:
On Mon, Oct 30, 2017 at 8:03 PM, Lin Huang wrote:
Document a "reset" and "assert-reset-us", it can be used for
driver control reset property. And reuse post-power-on-delay-ms
for deassert reset delay.
Signed-off-by: Lin Huang
---
Hi Thierry Reding,
On Monday, March 12, 2018 05:21 PM, Thierry Reding wrote:
On Mon, Dec 04, 2017 at 03:17:48PM +0800, Lin Huang wrote:
Refactor Innolux P079ZCA panel driver, let it support
multi panel.
Signed-off-by: Lin Huang
---
Changes in v2:
- Change regulator property name to meet the
Hi Emil,
On Monday, March 19, 2018 09:09 PM, Emil Velikov wrote:
On 15 March 2018 at 02:35, hl wrote:
Hi Emil,
On Wednesday, March 14, 2018 08:02 PM, Emil Velikov wrote:
Hi Lin,
On 14 March 2018 at 09:12, Lin Huang wrote:
From: huang lin
Refactor Innolux P079ZCA panel driver, let it
Hi
On Tuesday, March 20, 2018 06:20 PM, Emil Velikov wrote:
On 20 March 2018 at 06:24, hl wrote:
Hi Emil,
On Monday, March 19, 2018 09:09 PM, Emil Velikov wrote:
On 15 March 2018 at 02:35, hl wrote:
Hi Emil,
On Wednesday, March 14, 2018 08:02 PM, Emil Velikov wrote:
Hi Lin,
On 14
+ Kishon
On Thursday, May 17, 2018 09:51 PM, Sean Paul wrote:
On Thu, May 17, 2018 at 05:18:00PM +0800, Lin Huang wrote:
DP firmware uses fixed phy config values to do training, but some
boards need to adjust these values to fit for their unique hardware
design. So get phy config values from d
Hi Enric,
On Wednesday, May 23, 2018 01:06 AM, Enric Balletbo Serra wrote:
Lin,
2018-05-22 9:41 GMT+02:00 Enric Balletbo Serra :
Hi Lin
2018-05-22 3:08 GMT+02:00 hl :
Hi Enric,
On Monday, May 21, 2018 11:22 PM, Enric Balletbo Serra wrote:
Hi Lin,
2018-05-21 11:37 GMT+02:00 Lin Huang
Hi Stephen,
On 04/08/15 09:14, Stephen Boyd wrote:
On 08/03/2015 06:03 PM, Lin Huang wrote:
From: huang lin
pclk_pd_pmu needs to keep running and with the upcoming gpio clock
handling this is not always the case anymore. So add it to the list
of critical clocks for now.
Signed-off-by: Heiko
Hi Heiko,
pclk_pd_pmu needs to keep running and with the upcoming gpio clock
handling this is not always the case anymore. So add it to the list
of critical clocks for now.
From: Heiko Stuebner
Signed-off-by: Lin Huang
is it the right way? if it still can not meet the requirement,
please
Hi Heiko,
On 20/11/15 05:47, Heiko Stuebner wrote:
Hi Lin,
Am Donnerstag, 19. November 2015, 18:21:10 schrieb Lin Huang:
support rk3399 dmc clock driver. Note, ddr set rate function will
use dcf controller which run in ATF, it need to fishish it when rk3399
arm trust firmware ready.
this unfi
Hi Heiko,
On 22/11/15 02:30, Heiko Stuebner wrote:
Hi Lin,
Am Freitag, 20. November 2015, 09:37:15 schrieb hl:
On 20/11/15 05:47, Heiko Stuebner wrote:
Hi Lin,
Am Donnerstag, 19. November 2015, 18:21:10 schrieb Lin Huang:
support rk3399 dmc clock driver. Note, ddr set rate function will
Hi MyungJoo,
On 23/11/15 16:09, MyungJoo Ham wrote:
+static unsigned long rk3399_dmcclk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct rk3399_dmcclk *dmc = to_rk3399_dmcclk(&hw);
+ u32 val;
+
+ /*
+*
Hi Enric,
On Monday, May 21, 2018 11:22 PM, Enric Balletbo Serra wrote:
Hi Lin,
2018-05-21 11:37 GMT+02:00 Lin Huang :
DP firmware uses fixed phy config values to do training, but some
boards need to adjust these values to fit for their unique hardware
design. So get phy config values from d
Hi Enric,
On Monday, May 07, 2018 07:27 PM, Enric Balletbo Serra wrote:
Hi Lin,
I am interested in these patches, could you cc me on newer versions? Thanks.
Some comments below.
Sure, will cc to you next version.
2018-05-04 10:08 GMT+02:00 Lin Huang :
From: Chris Zhong
We may support tr
On Monday, May 07, 2018 09:59 PM, Enric Balletbo Serra wrote:
Hi Lin,
Thanks for the patch, apart from the new build warnings introduced
some more comments below.
2018-05-04 10:08 GMT+02:00 Lin Huang :
the phy config values used to fix in dp firmware, but some boards
need change these values
On Monday, May 07, 2018 07:29 PM, Enric Balletbo Serra wrote:
Hi Lin,
Thanks for the patch.
2018-05-04 10:08 GMT+02:00 Lin Huang :
DP firware use fix phy config value to do training, but some
s/fiware/firmware/
board need to adjust these value to fit for their hardware design,
so we use n
Hi Emil,
On Wednesday, March 14, 2018 08:02 PM, Emil Velikov wrote:
Hi Lin,
On 14 March 2018 at 09:12, Lin Huang wrote:
From: huang lin
Refactor Innolux P079ZCA panel driver, let it support
multi panel.
Change-Id: If89be5e56dba8cb498e2d50c1bbeb0e8016123a2
Signed-off-by: Lin Huang
---
Cha
/patch/9443331/
I think we need to discuss it together.
Regards,
Chanwoo Choi
On 2016년 11월 24일 15:45, hl wrote:
Hi MyungJoo Ham,
On 2016年11月24日 14:14, MyungJoo Ham wrote:
On Thu, Nov 24, 2016 at 11:18 AM, hl wrote:
Hi MyungJoo Ham,
[]
We still need to sync the all status even i ca
Hi Chanwoo Choi,
On 2016年11月24日 16:16, Chanwoo Choi wrote:
Hi Lin,
On 2016년 11월 24일 16:34, hl wrote:
Hi Chanwoo Choi,
I think the dev_pm_opp_get_suspend_opp() have implement most of
the funtion, all we need is just define the node in dts, like following:
&dmc_opp_table {
o
Tested-by: Lin Huang
On 2017年01月18日 12:20, Xing Zheng wrote:
The range of the pclk_edp_div_con is [13:8] and 6 bits, not 5.
Reported-by: Lin Huang
Signed-off-by: Xing Zheng
---
drivers/clk/rockchip/clk-rk3399.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/
Hi Paul,
On 2016年07月23日 04:24, Paul Gortmaker wrote:
On Fri, Jul 22, 2016 at 5:07 AM, Lin Huang wrote:
base on dfi result, we do ddr frequency scaling, register
dmc driver to devfreq framework, and use simple-ondemand
policy.
Signed-off-by: Lin Huang
---
Changes in v3:
- operate dram setting
Hi Heiko,
On 2016年07月23日 04:50, Heiko Stübner wrote:
Hi again,
one bigger thing I noticed only now.
Am Freitag, 22. Juli 2016, 17:07:14 schrieben Sie:
diff --git a/drivers/firmware/rockchip_sip.c
b/drivers/firmware/rockchip_sip.c new file mode 100644
index 000..7756af9
--- /dev/null
+++ b
Hi Chanwoo Choi,
On 2016年07月25日 14:01, Chanwoo Choi wrote:
Hi Lin,
I'm glad to support the for dmc ddr clock scaling with devfreq/devfreq-event.
But, I think that you have to use the standard interface.
As I already mentioned[1] on previous mail, devfreq fwk support
the standard DEVFREQ_TRANSI
Hi Sudeep Holla,
On 2016年07月26日 01:36, Sudeep Holla wrote:
On 22/07/16 21:50, Heiko Stübner wrote:
Hi again,
one bigger thing I noticed only now.
Am Freitag, 22. Juli 2016, 17:07:14 schrieben Sie:
diff --git a/drivers/firmware/rockchip_sip.c
b/drivers/firmware/rockchip_sip.c new file mode
Hi Chanwoo Choi,
On 2016年07月25日 17:45, Chanwoo Choi wrote:
Hi Lin,
On 2016년 07월 25일 17:47, hl wrote:
Hi Chanwoo Choi,
On 2016年07月25日 14:01, Chanwoo Choi wrote:
Hi Lin,
I'm glad to support the for dmc ddr clock scaling with devfreq/devfreq-event.
But, I think that you have to us
Hi Doug&Heiko,
On 2016年06月01日 23:46, Heiko Stübner wrote:
Am Mittwoch, 1. Juni 2016, 08:24:48 schrieb Doug Anderson:
Lin Huang,
On Wed, Jun 1, 2016 at 2:35 AM, Lin Huang wrote:
add ddrc clock setting, so we can do ddr frequency
scaling on rk3399 platform in future.
Signed-off-by: Lin Huang
Hi Myungloo Ham,
On 2016年06月01日 18:47, MyungJoo Ham wrote:
On Wed, Jun 1, 2016 at 6:35 PM, Lin Huang wrote:
there is dfi controller on rk3399 platform, it can monitor
ddr load, register this controller to devfreq framework, and
default to use simple_ondeamnd policy, and do ddr frequency
scali
Hi Chanwoo Choi,
I just check the devfreq-event framework code, it is good,
i will do more dig to see whether it can fit for rk3399 dmc, thank you.
On 2016年06月01日 19:47, Chanwoo Choi wrote:
Hi Lin,
This patch include the two features as following:
- Monitor the ddr load
- Control the ddr's
Hi Chanwoo Choi,
On 2016年11月08日 17:32, Chanwoo Choi wrote:
Hi Lin,
On 2016년 11월 08일 18:11, Lin Huang wrote:
Add suspend frequency support and if needed set it to
the frequency obtained from the suspend opp (can be defined
using opp-v2 bindings and is optional).
Signed-off-by: Lin Huang
---
C
Hi All,
Miss something in this patch, just ignored it, sorry about that.
On 2016年11月03日 14:16, Lin Huang wrote:
Add suspend frequency support and if needed set it to
the frequency obtained from the suspend opp (can be defined
using opp-v2 bindings and is optional).
Change-Id: Iaa0d3848d63d9
Hi Chanwoo Choi,
Thanks for reviewing so carefully. And i have some question:
On 2016年08月01日 18:28, Chanwoo Choi wrote:
Hi Lin,
As I mentioned on patch5, you better to make the documentation as following:
- Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
And, I add the comments.
Hi Chanwoo Choi,
On 2016年08月02日 12:21, Chanwoo Choi wrote:
Hi Lin,
On the next version, I'd like you to add the 'linux...@vger.kernel.org'
because devfreq is a subsystem of power management.
Sure, will do it next version.
On 2016년 08월 02일 10:03, hl wrote:
Hi Chanwoo Choi,
Hi,
On 2016年08月18日 02:14, Sean Paul wrote:
On Tue, Aug 16, 2016 at 3:36 PM, Lin Huang wrote:
when in ddr frequency scaling process, vop can not do
enable or disable operation, since dcf will base on vop vblank
time to do frequency scaling and need to get vop irq if there
have vop enabled.
I'
Hi Shawn,
On 2016年06月03日 20:29, Shawn Lin wrote:
Hi Lin,
It looks good with only a few minor comments.
On 2016/6/3 17:55, Lin Huang wrote:
On new rockchip platform(rk3399 etc), there have dcf controller to
do ddr frequency scaling, and this controller will implement in
arm-trust-firmware. We
Hi Heiko,
On 2016年06月03日 20:51, Heiko Stübner wrote:
Am Freitag, 3. Juni 2016, 17:55:14 schrieb Lin Huang:
On new rockchip platform(rk3399 etc), there have dcf controller to
do ddr frequency scaling, and this controller will implement in
arm-trust-firmware. We add a special clock-type to handle
Hi Heiko,
On 2016年06月03日 20:56, Heiko Stübner wrote:
Am Freitag, 3. Juni 2016, 17:55:16 schrieb Lin Huang:
add ddrc clock setting, so we can do ddr frequency
scaling on rk3399 platform in future.
Signed-off-by: Lin Huang
---
Changes in v1:
- remove ddrc source CLK_IGNORE_UNUSED flag, Suggesti
Hi Heiko,
On 2016年06月03日 20:51, Heiko Stübner wrote:
Am Freitag, 3. Juni 2016, 17:55:14 schrieb Lin Huang:
On new rockchip platform(rk3399 etc), there have dcf controller to
do ddr frequency scaling, and this controller will implement in
arm-trust-firmware. We add a special clock-type to handle
On 2016年06月03日 18:26, Chanwoo Choi wrote:
Hi Lin,
I add the some comment on below. If you modify it,
You can add my acked-by tag. Looks good to me.
Thanks for you reviewing, i will update the code folloiwing your comment.
Acked-by: Chanwoo Choi
Also, I'd like you to add me to mail thread
o
Hi Thierry,
On 2016年06月04日 00:54, Thierry Reding wrote:
On Fri, Jun 03, 2016 at 05:55:17PM +0800, Lin Huang wrote:
[...]
+ ret = clk_prepare_enable(data->clk);
+ if (ret) {
+ dev_err(&pdev->dev, "failed to enable clk: %d\n", ret);
+ clk_disable_unprepare(
Hi All,
Since many panel power sequence request backlight stay disable
before panel power ready, but with now pwm-backlight drvier, it default to
enable backlight when pwm-backlight probe, it mess up the panel power
sequence.
So we need this patch. This patch have been fly for a long tim
Hi
On Thursday, January 04, 2018 04:22 PM, Peter Ujfalusi wrote:
Hi,
On 2018-01-04 04:18, hl wrote:
Hi All,
Since many panel power sequence request backlight stay disable
before panel power ready, but with now pwm-backlight drvier, it default to
enable backlight when pwm-backlight
On Monday, September 04, 2017 06:03 PM, Arnaud Pouliquen wrote:
Hello Lin,
Sorry for this late answer.
I'm not maintainer, just a contributor... but as some update seems
strange for me, so i prefer to highlight it to clarify them.
On 08/17/2017 04:24 AM, Lin Huang wrote:
From: huang lin
on
On Wednesday, September 20, 2017 06:08 PM, John Keeping wrote:
On Tue, Sep 19, 2017 at 01:27:40PM -0700, Sean Paul wrote:
On Tue, Sep 19, 2017 at 11:19:01AM -0700, Brian Norris wrote:
Hi Sean,
On Tue, Sep 19, 2017 at 11:00:25AM -0700, Sean Paul wrote:
On Mon, Sep 18, 2017 at 05:05:33PM +080
Hi
On Friday, December 01, 2017 10:54 AM, Brian Norris wrote:
One more comment:
On Thu, Nov 30, 2017 at 02:14:40PM +0800, Lin Huang wrote:
Support Innolux P097PFG 9.7" 1536x2048 TFT LCD panel,
it refactor Innolux P079ZCA panel driver, let it support
multi panel, and add support P097PFG panel
Hi Emil,
On Saturday, December 02, 2017 01:55 AM, Emil Velikov wrote:
On 30 November 2017 at 06:13, Lin Huang wrote:
Support Innolux P097PFG 9.7" 1536x2048 TFT LCD panel,
it refactor Innolux P079ZCA panel driver, let it support
multi panel, and add support P097PFG panel in this driver.
Coup
Hi Chanwoo Choi,
On 2016年08月17日 12:50, Chanwoo Choi wrote:
Hi Lin,
On 2016년 08월 17일 07:36, Lin Huang wrote:
This patch adds the documentation for rockchip rk3399 dmc driver.
Signed-off-by: Lin Huang
---
Changes in v6:
-Add more detail in Documentation
Changes in v5:
-None
Changes in v4:
-N
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