Hi Peter,
On 08/01/21 4:16 pm, Peter Rosin wrote:
> Hi!
>
> On 2020-12-24 12:42, Kishon Vijay Abraham I wrote:
>> AM64 has a single lane SERDES which can be configured to be used
>> with either PCIe or USB. Define the possilbe values for the SERDES
>> function in AM64 SoC here.
>>
>>
Hi Rob,
On 08/01/21 8:33 am, Rob Herring wrote:
> On Thu, Dec 24, 2020 at 05:12:47PM +0530, Kishon Vijay Abraham I wrote:
>> AM64 has a single lane SERDES which can be configured to be used
>> with either PCIe or USB. Define the possilbe values for the SERDES
>> function in AM64 SoC here.
>
>
Hi!
On 2020-12-24 12:42, Kishon Vijay Abraham I wrote:
> AM64 has a single lane SERDES which can be configured to be used
> with either PCIe or USB. Define the possilbe values for the SERDES
> function in AM64 SoC here.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
>
On Thu, Dec 24, 2020 at 05:12:47PM +0530, Kishon Vijay Abraham I wrote:
> AM64 has a single lane SERDES which can be configured to be used
> with either PCIe or USB. Define the possilbe values for the SERDES
> function in AM64 SoC here.
Doesn't look like this is used? Would the common phy modes
AM64 has a single lane SERDES which can be configured to be used
with either PCIe or USB. Define the possilbe values for the SERDES
function in AM64 SoC here.
Signed-off-by: Kishon Vijay Abraham I
---
include/dt-bindings/mux/ti-serdes.h | 4
1 file changed, 4 insertions(+)
diff --git
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