On Saturday, April 23, 2011, Rafael J. Wysocki wrote:
On Friday, April 22, 2011, Alan Stern wrote:
On Fri, 22 Apr 2011, Rafael J. Wysocki wrote:
The barrier would not prevent the race between the notifier and runtie
PM
from taking place. Why don't we do something like this
Hi Barry,
On Apr 25, 2011, at 8:49 AM, Barry Song wrote:
2011/4/25 Barry Song 21cn...@gmail.com:
2011/4/21 Andrei Warkentin andr...@motorola.com:
Hi,
On Thu, Apr 21, 2011 at 3:51 AM, Barry Song 21cn...@gmail.com wrote:
From: Bin Shi bin@csr.com
some controllers share data bus or
Hi,
On Mon, Apr 25 2011, Philip Rakity wrote:
A quirk does not seem to the right way to go since there is now 2 points of
failure
a) The quirk can be defined and host-ops-get_shared_pins may not be.
how about
if (host-ops-get_shared_pins)
Hi Shawn
I tested using ADMA with your patch...(benchmark : IOzone)
But I didn't get improvement of performance with ADMA..
(i can see improvement of performance with SDMA)
I want to know how you think about this..
Regards,
Jaehoon Chung
Andrei Warkentin wrote:
Hi Shawn,
On Sat, Apr 16,
On Tue, Apr 26, 2011 at 10:26:01AM +0900, Jaehoon Chung wrote:
Hi Shawn
I tested using ADMA with your patch...(benchmark : IOzone)
But I didn't get improvement of performance with ADMA..
(i can see improvement of performance with SDMA)
I want to know how you think about this..
It's
From: Bin Shi bin@csr.com
some controllers share data bus or other pins between
multi-controllers and need to switch the functions of shared pins
runtime.
this patch requested those shared pins before actual hardware access
and release them after access
Signed-off-by: Bin Shi bin@csr.com
Hi Barry,
On Mon, Apr 25 2011, Barry Song wrote:
From: Bin Shi bin@csr.com
some controllers share data bus or other pins between
multi-controllers and need to switch the functions of shared pins
runtime.
this patch requested those shared pins before actual hardware access
and release
Hi Barry,
How are SDIO interrupts handled ?
Philip
On Apr 25, 2011, at 8:34 PM, Barry Song wrote:
From: Bin Shi bin@csr.com
some controllers share data bus or other pins between
multi-controllers and need to switch the functions of shared pins
runtime.
this patch requested those
2011/4/26 Chris Ball c...@laptop.org:
Hi Barry,
On Mon, Apr 25 2011, Barry Song wrote:
From: Bin Shi bin@csr.com
some controllers share data bus or other pins between
multi-controllers and need to switch the functions of shared pins
runtime.
this patch requested those shared pins
From: Subhash Jadavani subha...@codeaurora.org
If platform gpio_data is not present then don't do any
gpio configuration.
Signed-off-by: Subhash Jadavani subha...@codeaurora.org
Signed-off-by: Sahitya Tummala stumm...@codeaurora.org
---
drivers/mmc/host/msm_sdcc.c |2 +-
1 files changed, 1
Signed-off-by: Sahitya Tummala stumm...@codeaurora.org
---
drivers/mmc/host/msm_sdcc.c | 14 +++---
1 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index d06539d..66ef5c3 100644
--- a/drivers/mmc/host/msm_sdcc.c
For clocks that support rates which can be set (most clocks other
than _pclk AHB clocks), a rate must be set using clk_set_rate()
before the clock is enabled for the first time with clk_enable().
Subsequent calls to clk_enable() need not be preceded with the
clk_set_rate() calls unless we wish to
On some targets, MCI_IRQ_MASK1 is not routed to the MSM in which
case only cmd_irq must be used even for PIO. With this change,
all the targets will use only cmd_irq for both CMD and PIO.
Signed-off-by: Sahitya Tummala stumm...@codeaurora.org
---
arch/arm/mach-msm/devices-msm7x00.c | 24
Not all targets have IRQ1 line routed from the SD controller to
the processor. So we cannot rely on IRQ1 for PIO interrupts.
This patch moves all PIO interrupts to IRQ0 and enables the PIO
mode.
Signed-off-by: Murali Palnati palna...@codeaurora.org
Signed-off-by: Sahitya Tummala
Intialize busclk_timer before it is accessed in probe.
Signed-off-by: Sahitya Tummala stumm...@codeaurora.org
---
drivers/mmc/host/msm_sdcc.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index
From: Subhash Jadavani subha...@codeaurora.org
If DMA resource is not available then SDCC driver
should atleast work in PIO data transfer mode.
Signed-off-by: Subhash Jadavani subha...@codeaurora.org
Signed-off-by: Sahitya Tummala stumm...@codeaurora.org
---
drivers/mmc/host/msm_sdcc.c | 15
Hi Chris,
-Original Message-
From: Chris Ball [mailto:c...@laptop.org]
Sent: Friday, April 15, 2011 7:36 PM
To: Nath, Arindam
Cc: linux-mmc@vger.kernel.org; subha...@codeaurora.org;
prak...@marvell.com; zhangfei@gmail.com; Su, Henry; Lu, Aaron;
anath@gmail.com
Subject: Re:
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