In dwc manual, the below contents are described.
"During end of packet, interrupt is not generated if threshold
programming is larger than any remaining data. It is responsibility
of host to read remaining bytes on seeing Data Transfer Done
interrupt"
We also have seen the data cannot be read fully
Thank you for review.
I'll apply.
On Tuesday, January 22, 2013 3:08 PM, Seungwon Jeon wrote:
> Kyoungil,
>
> Could you resend the following change considering Jaehoon's comment?
> - int_data_over -> dto
> - use boolean constants(true, false) for dw_mci_read_data_pio argument.
>
> Thanks,
> Seung
Kyoungil,
Could you resend the following change considering Jaehoon's comment?
- int_data_over -> dto
- use boolean constants(true, false) for dw_mci_read_data_pio argument.
Thanks,
Seungwon Jeon
On Tuesday, January 22, 2013, Jaehoon Chung wrote:
> Hi,
>
> i didn't test with this patch. But it
于 2013年01月22日 11:31, Samuel Ortiz 写道:
Hi Wei,
On Wed, Jan 16, 2013 at 05:02:37PM +0800, wwang wrote:
于 2013年01月08日 17:57, 王炜 写道:
From: Wei WANG
v2:
1. Add commit message for patch 2
2. Move pci_set_dma_mask before the pci_enable_device(pcidev) call
v3:
1. Add commit message for patch 3
2. A
Hi Wei,
On Wed, Jan 16, 2013 at 05:02:37PM +0800, wwang wrote:
> 于 2013年01月08日 17:57, 王炜 写道:
> > From: Wei WANG
> >
> > v2:
> > 1. Add commit message for patch 2
> > 2. Move pci_set_dma_mask before the pci_enable_device(pcidev) call
> >
> > v3:
> > 1. Add commit message for patch 3
> > 2. Add pat
Hi,
i didn't test with this patch. But it makes sense.
Just i have minor comment.
Acked-by: Jaehoon Chung
On 01/21/2013 09:28 PM, Kyoungil Kim wrote:
> In dwc manual, the below contents are described.
> "During end of packet, interrupt is not generated if threshold
> programming is larger than
From: Mike Lockwood
This driver handles the virtual MMC device present in the Goldfish emulator.
The patch folds together initial work from Mike Lockwood and patches by
San Mehat, Jun Nakajima and Tom Keel plus cleanups
by Alan Cox to get it all into 3.6 shape.
Signed-off-by: Mike A. Chan
[cle
From: Ulf Hansson
The cookie is now used to indicate if dma_unmap_sg shall be
done in post_request. At DMA errors, the DMA job is immediately
not only terminated but also unmapped. To indicate that this
has been done the cookie is reset to zero. post_request will
thus only do dma_umap_sg for requ
On Mon, Jan 21, 2013 at 03:16:32AM +, Vinod Koul wrote:
> On Sun, Jan 20, 2013 at 11:51:08AM -0500, Matt Porter wrote:
> > The explanation in the cover letter mentions that dmaengine_slave_config()
> > is
> > required to be called prior to dmaengine_get_channel_caps(). If we
> > switch to the
On Mon, Jan 21, 2013 at 03:15:23AM +, Vinod Koul wrote:
> On Sun, Jan 20, 2013 at 11:37:35AM -0500, Matt Porter wrote:
> > On Sun, Jan 20, 2013 at 12:37:34PM +, Vinod Koul wrote:
> > > On Thu, Jan 10, 2013 at 02:07:03PM -0500, Matt Porter wrote:
> > > > The call is implemented as follows:
>
thanks Kishore, please find my comments below:-
On Mon, Jan 21, 2013 at 8:19 PM, Kishore Kadiyala
wrote:
> Hi Shashidhar Hiremath,
>
>
>
>
>>
>> mmc0:host doesn't support card's voltages
>> set_ios invoked
>> Poweroff Done
>>
>> mmc0: error -22 whilst initializing SDIO card
>
> Could you check w
Hi Shashidhar Hiremath,
>
> mmc0:host doesn't support card's voltages
> set_ios invoked
> Poweroff Done
>
> mmc0: error -22 whilst initializing SDIO card
Could you check whether the MMC host controller regulator is
configured properly.
> eventhough I have inserted a SD card
Which SD card you
In dwc manual, the below contents are described.
"During end of packet, interrupt is not generated if threshold
programming is larger than any remaining data. It is responsibility
of host to read remaining bytes on seeing Data Transfer Done
interrupt"
We also have seen the data cannot be read fully
On Mon, Jan 21, 2013 at 7:45 PM, Will Newton wrote:
>
> On Mon, Jan 21, 2013 at 10:19 AM, Kyoungil Kim wrote:
> > In dwc manual, the below contents are described.
> > "During end of packet, interrupt is not generated if threshold
> > programming is larger than any remaining data. It is responsibi
On Mon, Jan 21, 2013 at 10:19 AM, Kyoungil Kim wrote:
> In dwc manual, the below contents are described.
> "During end of packet, interrupt is not generated if threshold
> programming is larger than any remaining data. It is responsibility
> of host to read remaining bytes on seeing Data Transfer
From: Sascha Hauer
The i.MX esdhc has a nonstandard bit layout for the SDHCI_HOST_CONTROL
register. To support 8bit bus width on i.MX populate the platform_bus_width
callback. This is tested on an i.MX25, but should according to the datasheets
work on the other i.MX using this hardware aswell. Th
It's another violation to SDHC spec that software reset on usdhc
does not reset MIX_CTRL register. Have to do it manually, otherwise
the preserving of the register bits (e.g. AC23EN) may cause mmc card
fail to be initialized.
Signed-off-by: Shawn Guo
---
drivers/mmc/host/sdhci-esdhc-imx.c |
SDHCI core will try to use Auto CMD23 for mmc card. Currently, we will
see the following message with mmc card on usdhc due to the lacking of
Auto CMD23 support in the driver.
$ mmc0: new high speed MMC card at address 0001
mmcblk1: mmc0:0001 MMC02G 1.87 GiB
mmcblk1: error -84 transferring data,
The series makes Auto CMD23 work for imx6q usdhc and then adds 8bit
mmc support.
Sascha Hauer (2):
mmc: sdhci: rename platform_8bit_width to platform_bus_width
mmc: sdhci-esdhc-imx: support 8bit mode
Shawn Guo (4):
mmc: sdhci-esdhc-imx: separate transfer mode from command write for
usdh
The combining of SDHCI_TRANSFER_MODE and SDHCI_COMMAND writes is only
required for esdhc, but not necessarily for usdhc. Different from
esdhc where the bits for transfer mode and command are all in the same
register CMD_XFR_TYP, usdhc has a newly introduced register MIX_CTRL
to hold transfer mode
From: Sascha Hauer
The 8bit in the function name is misleading. When set, it will be
used to set the bus width, regardless of whether 8bit or another
bus width is requested, so change the function name to
platform_bus_width.
Signed-off-by: Sascha Hauer
Signed-off-by: Shawn Guo
---
drivers/mmc
None of mmc drivers implements bus-width as a required device tree
property. Instead, some drivers like atmel-mci, dw_mmc, sdhci-s3c
implement it as an optional one, and will force bus width to be 1
when the property is absent. Let's change the common binding to
reflect what the drivers are usual
In dwc manual, the below contents are described.
"During end of packet, interrupt is not generated if threshold
programming is larger than any remaining data. It is responsibility
of host to read remaining bytes on seeing Data Transfer Done
interrupt"
We also have seen the data cannot be read fully
Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
devm_ioremap_resource() provides its own error messages so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: Thierry R
Hi Jens,
The sanitize feature is a mandatory feature for eMMC4.5.
This feature requires changes in the block and MMC layers to allow the
ability to trigger the sanitize request.
Chris Ball agreed to merge the MMC changes of this patch but due to the
dependency on the block layer it is on hold for
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