Hi Georgi,
I have several comments below.
On Tue, 2013-08-13 at 17:06 +0300, Georgi Djakov wrote:
This platform driver adds the support of Secure Digital Host
Controller Interface compliant controller in MSM chipsets.
CC: Asutosh Das asuto...@codeaurora.org
CC: Venkat Gopalakrishnan
This patchset adds quirks for various workarounds and performance
improvements required for Qualcomm MSM SDHCI driver.
1. Read Transfer Active/ Write Transfer Active may be not de-asserted
after end of transaction.
2. Slow interrupt clearance at 400KHz may cause host driver interrupt
The Qualcomm MSM SDHCI controller doesn't support tuning as specified
by the Standard Host Controller 3.0 spec. As a result of which, CMD CRC
errors are expected for tuning commands. Hence, add a new quirk
SDHCI_QUIRK2_IGNORE_CMDCRC_FOR_TUNING to ignore those errors for tuning
commands.
CC:
This patch adds a quirk to ignore data timeout error for R1B commands
as there will be no data associated and the busy timeout value for these
commands could be larger than the maximum timeout value that controller
can handle.
CC: Sahitya Tummala stumm...@codeaurora.org
Signed-off-by: Georgi
The SDHCI driver by default specifies a parameter that causes the core
layer to calculate a max discard value which will be set on the mmc queue.
Unfortunately the value calculated because of this would be very small
compared to what comes in by default. As a result of this, any secure
discard
Initial version of Qualcomm SDHC has a hardware issue. This patch adds
a quirk SDHCI_QUIRK2_SLOW_INT_CLR to enable a workaround.
Hardware issue: Slow interrupt clearance at 400KHz may cause host
driver interrupt handler to be called twice.
Software workaround: Add 40us delay in interrupt handler
Initial version of Qualcomm SDHC has a hardware issue. This patch adds
a quirk SDHCI_QUIRK2_RDWR_TX_ACTIVE_EOT to enable a workaround.
Hardware issue: Read Transfer Active/ Write Transfer Active may be
not de-asserted after end of transaction.
Software workaround: Set Software Reset for DAT line
Following offline discussions with Sekhar, we discussed some ideas to
change a few things in this patch series to make it fail-safe. As such,
the only changes we are making for v4 will be to not cyclically link
immediately but doing so only once the ISR has finished setup (apart
from other style
