Currently host drivers using the sdhci-pltfm code can not configure the
host based on the type of card inserted.
The sdio driver e.g. calls the card_init callback, so the host can now
know what card is used and configure itself accordingly.
Provide a callback for users of the sdhci-pltfm code to
At least the i.MX35 (there may be others) currently implements a quirk
to turn of multiblock transfers for the esdhc host.
According to the errata this is only true for SD cards and NOT for
sdio cards.
When the sdio driver initializes the card, it knows the type of card
we actually have. So now
Added MMC_DDR52 as eMMC's DDR mode distinguished from SD-UHS.
CC: Russell King li...@arm.linux.org.uk
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Ulf Hansson ulf.hans...@linaro.org
---
drivers/mmc/host/mmci.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff
These changes intend to distinguish two DDR timing modes related to eMMC UHS.
Even though two modes are different actually, UHS_DDR50 is used as eMMC DDR
mode.
MMC_TIMING_MMC_DDR52 mode is added.
Changes in V3:
(6/7) Added MMC-DDR52 mode instead of replacing UHS-DDR50 in
dw_mmc-exynos
This change distinguishes DDR timing mode of current
mixed usage to clarify device type.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Ulf Hansson ulf.hans...@linaro.org
---
drivers/mmc/core/debugfs.c |3 +++
drivers/mmc/core/mmc.c |2 +-
include/linux/mmc/host.h |
Replaced UHS_DDR50 with MMC_DDR52.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Balaji T K balaj...@ti.com
---
drivers/mmc/host/omap_hsmmc.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
Added MMC_DDR52 as eMMC's DDR mode is distinguished from SD-UHS.
CC: Wei WANG wei_w...@realsil.com.cn
CC: Samuel Ortiz sa...@linux.intel.com
Signed-off-by: Seungwon Jeon tgih@samsung.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
---
drivers/mmc/host/rtsx_pci_sdmmc.c |2 ++
1 files
Replaced UHS_DDR50 with MMC_DDR52.
CC: Guennadi Liakhovetski g.liakhovet...@gmx.de
Signed-off-by: Seungwon Jeon tgih@samsung.com
---
drivers/mmc/host/sh_mmcif.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/sh_mmcif.c
Replaced UHS_DDR50 with MMC_DDR52. And MMC_CAP_UHS_DDR50
is removed because of non-implementation of UHS signaling.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
---
drivers/mmc/host/dw_mmc-exynos.c |5 ++---
drivers/mmc/host/dw_mmc.c
Added MMC_DDR52 as eMMC's DDR mode is distinguished from SD-UHS.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Reviewed-by: Ulf Hansson ulf.hans...@linaro.org
---
drivers/mmc/host/sdhci.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Best Regards,
Jaehoon Chung
On 03/07/2014 10:31 PM, Seungwon Jeon wrote:
Replaced UHS_DDR50 with MMC_DDR52. And MMC_CAP_UHS_DDR50
is removed because of non-implementation of UHS signaling.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Best Regards,
Jaehoon Chung
On 03/07/2014 10:30 PM, Seungwon Jeon wrote:
This change distinguishes DDR timing mode of current
mixed usage to clarify device type.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Ulf Hansson
If vmmc or vqmmc regulators are controlled by an I2C device, the
request for the regulator is likely to fail because the I2C bus has
not been probed yet. The sdhci then incorrectly assumes that the user
never wanted to use a regulator anyway and continues without ever
enabling or configuring the
This series contains the change for selection of bus speed mode.
Previous implementation is complicated and some sequence is duplicated.
And specially, HS400 mode eMMC5.0 is introduced this time.
- Continued/Updated since [PATCH 0/3] mmc: update bus speed mode series.
(Applied some comments
Timing mode identifier has same role and can take the place
of speed mode. This change removes all related speed mode.
Signed-off-by: Seungwon Jeon tgih@samsung.com
Acked-by: Ulf Hansson ulf.hans...@linaro.org
---
Changes in v2:
Removed reference pointer to 'ios'.
Device types which are supported by both host and device
can be identified when EXT_CSD is read. There is no need to
check host's capability anymore.
Signed-off-by: Seungwon Jeon tgih@samsung.com
---
Changes in v2:
Just rebased with latest one.
drivers/mmc/core/mmc.c | 77
Power class is changed once only after selection of bus modes
including speed and bus-width finishes finally.
Signed-off-by: Seungwon Jeon tgih@samsung.com
---
Changes in v2:
Cleaned up some unnecessary codes.
drivers/mmc/core/mmc.c | 94
This patch adds HS400 mode support for eMMC5.0 device.
HS400 mode is high speed DDR interface timing from HS200.
Clock frequency is up to 200MHz and only 8-bit bus width is
supported. In addition, tuning process of HS200 is required
to synchronize the command response on the CMD line because
CMD
On Wednesday 05 March 2014 02:00 PM, Andreas Fenkart wrote:
Hi,
2014-02-28 18:04 GMT+01:00 Balaji T K balaj...@ti.com:
On Tuesday 25 February 2014 06:07 PM, Andreas Fenkart wrote:
For now, only support SDIO interrupt if we are booted with
DT. This is because some platforms need special
On Thursday 06 March 2014 06:40 PM, Axel Lin wrote:
This patch converts this driver to use the regmap helper functions provided by
regulator core.
This fixes a few issues in current implementation:
1) In original code, the set voltage does not check max_uV,
which means if request max_uV
2014-03-06 23:20 GMT+08:00 Balaji T K balaj...@ti.com:
On Thursday 06 March 2014 06:40 PM, Axel Lin wrote:
This patch converts this driver to use the regmap helper functions
provided by
regulator core.
This fixes a few issues in current implementation:
1) In original code, the set voltage
The is_enabled implementation is wrong in some cases:
e.g. for pbias_mmc_omap5: emable_mask is : BIT(27) | BIT(25) | BIT(26)
However, pbias_regulator_enable() only sets BIT(26) | BIT(22) bits.
So is_enabled callback will always return false in this case.
Fix the logic to compare the register value
This patch converts this driver to use the regmap helper functions provided by
regulator core.
Signed-off-by: Axel Lin axel@ingics.com
---
drivers/regulator/pbias-regulator.c | 74 ++---
1 file changed, 19 insertions(+), 55 deletions(-)
diff --git
Since commit ca5d1b3524b4d
regulator: helpers: Modify helpers enabling multi-bit control,
we can set enable_val setting for device that use multiple bits for control
when using regmap enable/disable/bypass ops.
Signed-off-by: Axel Lin axel@ingics.com
---
Note:
This patch depends on below
* Balaji T K balaj...@ti.com [140307 07:15]:
On Wednesday 05 March 2014 02:00 PM, Andreas Fenkart wrote:
2014-02-28 18:04 GMT+01:00 Balaji T K balaj...@ti.com:
I tried testing this patch series on am335x, I see throughput in the
range of KBs. Will give another try with Tony's version.
KB
Chris,
Are you interested in raw dump of extcsd data?
We need it to dump vendor specific data that happens to be in a reserved field.
Chromium.org code review is here:
https://chromium-review.googlesource.com/#/c/189002/
git magic to pull that patch is here:
git pull
On Friday 07 March 2014 09:13 PM, Axel Lin wrote:
This patch converts this driver to use the regmap helper functions provided by
regulator core.
Signed-off-by: Axel Lin axel@ingics.com
Acked-by: Balaji T K balaj...@ti.com
---
drivers/regulator/pbias-regulator.c | 74
On Friday 07 March 2014 09:20 PM, Axel Lin wrote:
Since commit ca5d1b3524b4d
regulator: helpers: Modify helpers enabling multi-bit control,
we can set enable_val setting for device that use multiple bits for control
when using regmap enable/disable/bypass ops.
Signed-off-by: Axel Lin
Hi Grant,
On Fri, Mar 07 2014, Grant Grundler wrote:
Are you interested in raw dump of extcsd data?
We need it to dump vendor specific data that happens to be in a reserved
field.
I don't see any reason to exclude it from mmc-utils, but have you seen
the debugfs node?
mount -t debugfs
On 02/24/2014 11:57 AM, Franky Lin wrote:
Hi Chris,
On 01/07/2014 10:37 AM, Franky Lin wrote:
For high clock frequency modes, ie. SDR104 and possibly SDR50, the data
window on the CMD and DAT lines needs to be tuned. Once tuned to a
sample clock rate, a re-tuning might required because of
The is_enabled implementation is wrong in some cases:
e.g. for pbias_mmc_omap5: enable_mask is : BIT(27) | BIT(25) | BIT(26)
However, pbias_regulator_enable() only sets BIT(27) | BIT(26) bits.
So is_enabled callback will always return false in this case.
Fix the logic to compare the register value
This patch converts this driver to use the regmap helper functions provided by
regulator core.
Signed-off-by: Axel Lin axel@ingics.com
Acked-by: Balaji T K balaj...@ti.com
---
v2: Add Balaji's Ack.
drivers/regulator/pbias-regulator.c | 74 ++---
1 file
NUM_GPIOS is not used after commit e19499ae
mmc: sdhci-s3c: let device core setup the default pin configuration.
Thus remove it.
Signed-off-by: Axel Lin axel@ingics.com
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
---
drivers/mmc/host/sdhci-s3c.c | 3 ---
1 file changed, 3 deletions(-)
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