2: warning: 'msm_host'
is used uninitialized in this function [-Wuninitialized]
- Add Arnd's Ack for all patches except patch3 which is new in v2
Jisheng Zhang (12):
mmc: sdhci-bcm2835: use sdhci_pltfm_init for private allocation
mmc: sdhci-esdhc-imx: use sdhci_pltfm_init for private alloca
There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host.
This patch removes the sdhci_msm_pdata member from sdhci_msm_host and
uses one static global sdhci_msm_pdata for all sdhci msm hosts. It also
marks sdhci_msm_ops as const.
Signed-off-by: Jisheng Zhang <jszh...@marvell.
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Dear Ulf,
On Wed, 6 Jan 2016 17:22:48 +0800 Jisheng Zhang wrote:
> Dear Ludovic,
>
> On Wed, 6 Jan 2016 10:02:15 +0100 Ludovic Desroches wrote:
>
> > Hi Jisheng,
> >
> > Thanks for your patch but it needs to be updated since it breaks this
> > driver.
>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-at91 driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-arasan driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
at91 runtime pm support
is newly added and intends for 4.5.
So the question is which code base should I use?
Hi Ulf,
could you please give some suggestions?
Thanks in advance,
Jisheng
>
> On Wed, Jan 06, 2016 at 11:55:59AM +0800, Jisheng Zhang wrote:
> > Commit 0e748234293f (&quo
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Now all clients migration to use sdhci_pltfm_init for private
allocation is done and there's no users of the priv variable, so we can
remove it from the sdhci_pltfm_host structure.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
driv
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-st
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-esdhc driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Now all clients migration to use sdhci_pltfm_init for private
allocation is done and there's no users of the priv variable, so we can
remove it from the sdhci_pltfm_host structure.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
driv
The sdhci_pltfm_init() function has initialized the priv member as
NULL, so there's no need to do it again.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Acked-by: Arnd Bergmann <a...@arndb.de>
---
drivers/mmc/host/sdhci-pxav2.c | 1 -
1 file changed, 1 deletion(-)
diff --git a
ta outisde of sdhci_msm_host.
This is to fix drivers/mmc/host/sdhci-msm.c:440:32: warning: 'msm_host'
is used uninitialized in this function [-Wuninitialized]
- Add Arnd's Ack for all patches except patch3 which is new in v2
Jisheng Zhang (12):
mmc: sdhci-bcm2835: use sdhci_pltfm_init f
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-bcm2835
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-at91 driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-arasan driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
> help improving the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Jisheng-Zhang/mmc-sdhci-bcm2835-use-sdhci_pltfm_init-for-private-allocation/20160105-190232
> config: arm64-allmodconfig (attached as .config)
> reproduce:
> wget
> https://gi
There's no need to allocate one sdhci_msm_pdata for each sdhci_msm_host.
This patch removes the sdhci_msm_pdata member from sdhci_msm_host and
uses one static global sdhci_msm_pdata for all sdhci msm hosts. It also
marks sdhci_msm_ops as const.
Signed-off-by: Jisheng Zhang <jszh...@marvell.
The sdhci_pltfm_init() function has initialized the priv member as
NULL, so there's no need to do it again.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/mmc/host/sdhci-pxav2.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mm
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-at91 driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-pxav3
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-st
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the sdhci
esdhc-imx driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-esdhc driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates the
sdhci-of-arasan driver to this allocation.
Signed-off-by: Jisheng Zhang <jszh..
These patches are to complete the TODO in Commit 0e748234293f ("mmc:
sdhci: Add size for caller in init+register"), I.E:
- todo: migrate clients to using allocation this way
- todo: remove priv variable once migration is complete
Jisheng Zhang (11):
mmc: sdhci-bcm2835: use sdhci_
Now all clients migration to use sdhci_pltfm_init for private
allocation is done and there's no users of the priv variable, so we can
remove it from the sdhci_pltfm_host structure.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/mmc/host/sdhci-pltfm.h | 1 -
1 file chan
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-tegra
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-bcm2835
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com&
Commit 0e748234293f ("mmc: sdhci: Add size for caller in init+register")
allows users of sdhci_pltfm to allocate private space in calls to
sdhci_pltfm_init+sdhci_pltfm_register. This patch migrates sdhci-msm
to this allocation.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
On Fri, 11 Dec 2015 21:19:59 +0800 Jisheng Zhang wrote:
> After commit 52221610dd84 ("mmc: sdhci: Improve external VDD regulator
> support"), for the VDD is supplied via external regulators, we ignore
> the code to convert a VDD voltage request into one of the standard
>
This patch restores the behavior when setting VDD through external
regulator by moving the call of mmc_regulator_set_ocr() to the end
of sdhci_set_power() function.
After this patch, the sdcard on Marvell Berlin SoCs work again.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
Fixes: 52
al vmmc.
This patch restores the behavior when setting VDD through external
regulator by moving the call of mmc_regulator_set_ocr() to the end
of sdhci_set_power() function.
After this patch, the sdcard on Marvell Berlin SoC boards work again.
Signed-off-by: Jisheng Zhang <jszh...@marvell.c
a bit strange ;)
Thanks for reviewing this patch,
Jisheng
From: Ulf Hansson
Sent: Friday, December 11, 2015 22:48
To: Jisheng Zhang; Ludovic Desroches
Cc: linux-mmc; linux-ker...@vger.kernel.org;
linux-arm-ker...@lists.infradead.org
Subject: Re: [PATCH v2
Dear Sebastian,
On Thu, 15 Oct 2015 23:41:22 +0200
Sebastian Hesselbarth <sebastian.hesselba...@gmail.com> wrote:
> On 12.10.2015 07:46, Jisheng Zhang wrote:
> > Commit 8afdc9cca27f ("mmc: sdhci-pxav3: Get optional core clock") adds
> > additional optional clo
The axi clock properties already exists, so there's no need to set this
flag for sdio0 and sdio1 clk any more.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/clk/berlin/bg2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/berlin/b
The optional axi clock is CLKID_SDIO.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
arch/arm/boot/dts/berlin2q.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 4ad585c..2f12048
Since we have added the necessary axi clk properties in dts, we can
remove the "sdio" clk's CLK_IGNORE_UNUSED flag now.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
drivers/clk/berlin/bg2q.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk
Hi Marcin,
On Sat, 10 Oct 2015 14:13:51 +0200
Marcin Wojtas wrote:
> Hi Jisheng,
>
>
> >>
> >> >>
> >> >> When using DAT3-based detection Armada 38x SDIO IP expects its internal
> >> >> clock to be always on, which had to be ensured twofold:
> >> >
> >> > What happen if
ock is really the IP's "axi"
clock which is optional.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
.../devicetree/bindings/mmc/sdhci-pxa.txt | 8 ++---
arch/arm/boot/dts/berlin2.dtsi | 6 ++--
arch/arm/boot/dts/berlin2cd.dtsi
dd the axi clock properties to bg2q dtsi, then remove
the CLK_IGNORE_UNUSED flag for sdio clk(s).
Jisheng Zhang (5):
mmc: sdhci-pxav3: fix optional clock name
ARM: dts: berlin: correct BG2Q's sdhci2 axi clock
ARM: dts: berlin: add axi clock for BG2Q sdhci0 and sdhci1
clk: berlin: bg2q: remove C
Add the axi clock for BG2Q's sdhci0 and sdhci1. This would let the axi
clock be disabled during runtime pm, so saves power a bit.
Signed-off-by: Jisheng Zhang <jszh...@marvell.com>
---
arch/arm/boot/dts/berlin2q.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Hi Marcin,
On Fri, 9 Oct 2015 16:45:25 +0200
Marcin Wojtas wrote:
> Jisheng,
>
>
> >>
> >> When using DAT3-based detection Armada 38x SDIO IP expects its internal
> >> clock to be always on, which had to be ensured twofold:
> >
> > What happen if runtime suspend disables
On Fri, 9 Oct 2015 03:03:52 +0200
Marcin Wojtas wrote:
> Marvell Armada 38x SDHCI controller enable using DAT3 pin as a hardware
> card detection. According to the SD sdandard this signal can be used for
> this purpose combined with a pull-up resistor, implying inverted
Hi Marcin,
On Tue, 6 Oct 2015 03:22:38 +0200
Marcin Wojtas wrote:
> When resuming from suspend on Armada 38x SoC MBus windows have to be
> re-configured and for that purpose mv_conf_mbus_windows function needed
> rework. MBus windows register base address obtaining was moved
On Mon, 14 Sep 2015 13:43:32 +0530
Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
>
>
> On Monday 14 September 2015 11:58 AM, Jisheng Zhang wrote:
> > On Mon, 14 Sep 2015 11:55:56 +0530
> > Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
> >
Hi Vaibhav,
On Thu, 10 Sep 2015 12:40:48 +0530
Vaibhav Hiremath wrote:
> Hi,
>
> During my testing of SDHCI-PXAV3 driver on Marvell's pxa1928
> based platform, I observed that runtime PM suspend/resume is having
> issues with card insertion and removal.
>
> Let me
Hi Russell,
On Thu, 10 Sep 2015 09:02:33 +0100
Russell King - ARM Linux <li...@arm.linux.org.uk> wrote:
> On Thu, Sep 10, 2015 at 03:31:29PM +0800, Jisheng Zhang wrote:
> > Hi Vaibhav,
> >
> > On Thu, 10 Sep 2015 12:40:48 +0530
> > Vaibhav Hiremath &l
On Thu, 10 Sep 2015 13:21:12 +0530
Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
>
>
> On Thursday 10 September 2015 01:01 PM, Jisheng Zhang wrote:
> > Hi Vaibhav,
> >
> > On Thu, 10 Sep 2015 12:40:48 +0530
> > Vaibhav Hiremath <vaibh
On Mon, 7 Sep 2015 16:48:38 +0530
Vaibhav Hiremath wrote:
> Different bus clock may need different pin setting.
> For example, fast bus clock like 208Mhz need pin drive fast
> while slow bus clock prefer pin drive slow to guarantee
> signal quality.
>
> So this
On Mon, 7 Sep 2015 16:48:38 +0530
Vaibhav Hiremath wrote:
> Different bus clock may need different pin setting.
> For example, fast bus clock like 208Mhz need pin drive fast
> while slow bus clock prefer pin drive slow to guarantee
> signal quality.
>
> So this
On Mon, 7 Sep 2015 16:48:39 +0530
Vaibhav Hiremath wrote:
> From: Kevin Liu
>
> IN case of MMC HS200 mode, current code does not enable
> SD_CE_ATA_2.MMC_HS200 & SD_CE_ATA_2.MMC_CARD bit configurations.
>
> So this patch updates the above bit
On Tue, 8 Sep 2015 15:04:41 +0530
Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
>
>
> On Tuesday 08 September 2015 12:22 PM, Jisheng Zhang wrote:
> > On Mon, 7 Sep 2015 16:48:38 +0530
> > Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
>
On Tue, 8 Sep 2015 15:32:34 +0530
Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
>
>
> On Tuesday 08 September 2015 03:22 PM, Jisheng Zhang wrote:
> > On Tue, 8 Sep 2015 15:04:41 +0530
> > Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
> >
On Mon, 7 Sep 2015 17:01:09 +0530
Vaibhav Hiremath wrote:
> There were some coding style issues where spaces have been used instead
> of tabs, for example, in macro definitions, alignment of function
> declarations/definitions, etc...
>
> This patch fixes all such
On Wed, 2 Sep 2015 13:49:53 +0530
Vaibhav Hiremath <vaibhav.hirem...@linaro.org> wrote:
>
>
> On Wednesday 02 September 2015 12:34 PM, Jisheng Zhang wrote:
> > On Wed, 2 Sep 2015 01:02:17 +0530
> > Vaibhav Hiremath <vaibhav.hirem...@linaro.
On Wed, 2 Sep 2015 00:54:13 +0530
Vaibhav Hiremath wrote:
> There were some coding style issues where spaces have been used instead
> of tabs, for example, in macro definitions, alignment of function
> declarations/definitions, etc...
>
> This patch fixes all such
On Wed, 2 Sep 2015 01:02:17 +0530
Vaibhav Hiremath wrote:
> Currently, the sdhci_do_start_signal_voltage_switch() function invokes
> controller specific voltage switch configuration only for 1.8v usecase;
> but it is required for others as well.
>
> For example, in
: clarify DDR timing mode ...)
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
Since v2:
- fix sdhci_get_preset_value for MMC_DDR52
- add typical emmc error log which this patch intends to fix
Since v1:
- correct commit-msg
drivers/mmc/host/sdhci.c | 4 +++-
1 file changed, 3 insertions
On Mon, 17 Aug 2015 19:47:21 +0800
Jisheng Zhang jszh...@marvell.com wrote:
commit bb8175a8aa42 (mmc: sdhci: clarify DDR timing mode between
SD-UHS and eMMC) added MMC_DDR52 as eMMC's DDR mode to be
distinguished from SD-UHS, but it missed setting driver type for
MMC_DDR52 timing mode
: clarify DDR timing mode ...)
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/mmc/host/sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 1dbe932..32f2a07 100644
--- a/drivers/mmc/host/sdhci.c
+++ b
On Mon, 17 Aug 2015 19:34:39 +0800
Jisheng Zhang jszh...@marvell.com wrote:
commit 08f90f14aa93ad424c20bb176b52f329583e2183 (mmc: sdhci: clarify
DDR timing mode between SD-UHS and eMMC) added MMC_DDR52 as eMMC's DDR
mode to be distinguished from SD-UHS, but it missed setting driver type
: 79f7ae7c45a6(mmc: clarify DDR timing mode between SD-UHS and eMMC)
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/mmc/host/sdhci.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 1dbe932..32f2a07 100644
device wakeup explicitly.
This patch fixes the warning as following:
[ 64.616651] [ cut here ]
[ 64.616665] WARNING: CPU: 0 PID: 79 at linux/kernel/irq/manage.c:603
irq_set_irq_wake+0xf0/0x11c()
[ 64.616667] Unbalanced IRQ 87 wake disable
Signed-off-by: Jisheng Zhang
Hi all,
Most sdhci_runtime_resume_host() users just gate their clocks in their runtime
suspend implementation, so the sdhci_runtime_resume_host() is too heavy, we only
need to restore interrupts registers.
The change is something as following:
diff --git a/drivers/mmc/host/sdhci.c
reset when switching
voltage. We fix this by following the same sequence during initialization.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/mmc/host/sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
.
This patch fix this problem by check the return value of of_property_read_u32()
to know whether the optional clk-delay-cycles is set or not.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Cc: sta...@vger.kernel.org # v3.6+
---
drivers/mmc/host/sdhci-pxav3.c | 4 ++--
1 file changed, 2 insertions
.
This patch fix this problem by check the return value of of_property_read_u32()
to know whether the optional clk-delay-cycles is set or not.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Cc: sta...@vger.kernel.org # v3.6+
---
drivers/mmc/host/sdhci-pxav3.c | 4 ++--
1 file changed, 2 insertions
Dear Ulf,
On Fri, 23 Jan 2015 00:23:29 -0800
Ulf Hansson ulf.hans...@linaro.org wrote:
On 21 January 2015 at 13:45, Jisheng Zhang jszh...@marvell.com wrote:
This patch is to fix a race condition that may cause an unhandled irq,
which results in big sdhci interrupt numbers and endless mmc1
runtime_suspended is true now
return IRQ_NONE;
Fix this race by using the core sdhci.c supplied sdhci_runtime_suspend_host()
in runtime suspend hook which will disable card interrupts. We also use the
sdhci_runtime_resume_host() in the runtime resume hook accordingly.
Signed-off-by: Jisheng Zhang jszh
runtime_suspended is true now
return IRQ_NONE;
Fix this race by using the core sdhci.c supplied sdhci_runtime_suspend_host()
in runtime suspend hook which will disable card interrupts. We also use the
sdhci_runtime_resume_host() in the runtime resume hook accordingly.
Signed-off-by: Jisheng Zhang jszh
we want a little smaller latency.
This patch can be applied after the sdhci-pxav3 unbalanced pm/clock issues
patches being merged.
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-January/313103.html
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/mmc/host/sdhci-pxav3.c | 6
These two patches fix unbalanced pm and clock issues. The clock unbalance
issue would cause power consumption regression because the clock will never
be gated at runtime PM suspend.
Jisheng Zhang (2):
mmc: sdhci-pxav3: fix unbalanced clock issues during probe
mmc: sdhci-pxav3: fix pm
problems by just incrementing the usage
counter before pm_runtime_enable(). It also adjust the order of disabling
runtime pm and storing the usage count in the error path to handle clock
gating properly.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
Cc: sta...@vger.kernel.org # v3.11+
---
drivers
This patch calls pm_runtime_put_noidle() to restore the device's usage
counter in the -remove() implementation.
Signed-off-by: Jisheng Zhang jszh...@marvell.com
---
drivers/mmc/host/sdhci-pxav3.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-pxav3
Hi,
On Thu, 17 Apr 2014 06:33:59 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Sebastian,
On Wed, Apr 16, 2014 at 04:26:06PM +0200, Sebastian Hesselbarth wrote:
On 04/16/2014 02:40 PM, Antoine Ténart wrote:
Add a Driver to support the SDHCI controller of the Marvell
Hi Antoine,
On Wed, 16 Apr 2014 05:40:10 -0700
Antoine Ténart antoine.ten...@free-electrons.com wrote:
Add the SDHCI nodes for the Marvell Berlin BG2Q, using the berlin-sdhci
driver.
Signed-off-by: Antoine Ténart antoine.ten...@free-electrons.com
---
arch/arm/boot/dts/berlin2q.dtsi | 40
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