From: ext Woodruff, Richard [EMAIL PROTECTED]
Subject: RE: [RFC][DRAFT] TODO list for TI DSP BRIDGE
Date: Wed, 20 Aug 2008 09:32:32 -0500
Hi Hiroshi,
I sent some patches based on the above suggestion.
http://marc.info/?l=linux-omapm=121922597019873w=2
On Thu, Aug 21, 2008 at 1:34 AM, Kanigeri, Hari [EMAIL PROTECTED] wrote:
Felipe,
We are trying to understand why this is not just a wrapper.
-- Thank you :)
b) the clock init does the job of obtaining the references to the
clock ids in its initialization
Those could be initialized in
Jouni,
I am having some issues applying these patches. Any idea whats wrong?
(Stripping trailing CRs from patch.)
patching file arch/arm/mach-omap2/pm34xx.c
patch: malformed patch at line 66: return 1;
regards,
Rajendra
-Original Message-
From: [EMAIL PROTECTED]
omap_wdt driver will do unhandled fault on 2420 if support for 2430 is
compiled in since wrong base address is defined in that case. Assign
omap_wdt base address runtime depending on cpu type.
---
arch/arm/plat-omap/devices.c | 30 +-
1 files changed, 13
Hi
There are at least three drivers crashing if running N800 defconfig +
CONFIG_ARCH_OMAP2430=y on N810. Here are fixes for omap2_mcspi and
omap_wdt but the musb I'll let to Felibe et al. :-)
1Unable to handle kernel NULL pointer dereference at virtual address
1pgd = c0004000
SPI driver will do unhandled fault on OMAP2420 if trying to probe
non-existing SPI busses. Register those additional busses runtime only
for cpus having them.
Signed-off-by: Jarkko Nikula [EMAIL PROTECTED]
---
arch/arm/mach-omap2/devices.c |6 --
1 files changed, 4 insertions(+), 2
Hi Eduardo,
From: Eduardo Valentin [EMAIL PROTECTED]
Subject: Re: [PATCH 1/2] CLK: Introduce virtual clock registration
Date: Wed, 20 Aug 2008 15:10:08 -0400
Hi Hiroshi,
On Wed, Aug 20, 2008 at 03:04:38PM +0300, Hiroshi DOYU wrote:
This patch provides the interface to register and
-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of ext
Tony Lindgren
Sent: 20 August, 2008 14:37
To: Hogander Jouni (Nokia-D/Tampere)
Cc: linux-omap@vger.kernel.org
Subject: Re: [PATCH 2/4] PM: Workaround for taking care of gpio clocks
* Jouni Hogander
Here are two patches adding support for OMAP2430 in McBSP driver and
adding support for 2430 and 34xx in ASoC OMAP McBSP DAI driver.
These are generated from top of currect l-o head but they apply also on
top of Hiroshi's virtual clock patches with some offsets.
If you have change to try them
Signed-off-by: Jarkko Nikula [EMAIL PROTECTED]
---
arch/arm/mach-omap2/mcbsp.c | 73 ++
arch/arm/plat-omap/include/mach/mcbsp.h |3 +
2 files changed, 66 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/mcbsp.c
Signed-off-by: Swaminathan S [EMAIL PROTECTED]
This patch adds tasklet structures to musb to enable
polling for FIFO empty status on the Mentor TX FIFO.
This is requried to enable proper functioning of
DaVinci CPPI TX DMA when performing Tx transfers.
diff --git
Signed-off-by: Swaminathan S [EMAIL PROTECTED]
This patch implements a tasklet to poll for TX Endpoint FIFO
empty status before completing a transfer. This is required
in the context of DaVinci CPPI DMA Tx transfers. CPPI
DMA engine generates completion interrupt before
Hi Jarkko,
I am not clear what this patch is doing? Is it fixing any perticular issue?
Regards,
Madhu
- Original Message -
From: Jarkko Lavinen [EMAIL PROTECTED]
To: linux-omap@vger.kernel.org
Cc: Jarkko Lavinen [EMAIL PROTECTED]
Sent: Monday, August 18, 2008 8:43 PM
Subject: [PATCH]
Hi,
2008/7/31 Girish. S. G. [EMAIL PROTECTED]:
Serial driver for OMAP Uart controllers
Signed-off-by: Girish S G [EMAIL PROTECTED]
---
+ /* Reset the UART */
+ serial_out(up, UART_OMAP_MDR1, 0x07);
+ serial_out(up, UART_OMAP_SCR, 0x08);
+ serial_out(up,
As far as I understand, you need to save the toggle bit only after an entire
URB transfer is complete. So if we know that we are transmitting 512 * N bytes.
If N is even we would know that we don't have to change the data toggle and if
it is odd we have to. So, if we start the transfer and the
Hi,
On Thu, Aug 21, 2008 at 07:28:21PM +0530, ext Swaminathan S wrote:
Signed-off-by: Swaminathan S [EMAIL PROTECTED]
This patch adds tasklet structures to musb to enable
polling for FIFO empty status on the Mentor TX FIFO.
This is requried to enable proper functioning
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Josh
Karabin
Sent: Wednesday, August 20, 2008 7:28 PM
To: linux-omap@vger.kernel.org
Subject: Re: HSMMC block transfer (CMD53) doesn't complete
Romantic, William wrote:
I'm using the OMAP35x
From: Anand Gadiyar [EMAIL PROTECTED]
If Indexed Mode register accesses are enabled, the ep0_rxstate()
function calls musb_g_ep0_giveback() before writing to the CSR
register. When control returns to this ep0_rxstate, the index
register contents are over-written. This causes the CSR register
Hi Doyu-san,
I think that this virtual clock may allow any arbitrary combination of
clocks and it may be possible to have multiple hierarchy of virtual
clocks like:
dsp_clocks
|
|-- peripheral_clocks
| |
| |-- gpt5
| ||- gpt5_ick
| |`-
From: Vikram Pandita [EMAIL PROTECTED]
Fix following compilation error when enabling CONFIG_TWL4030_BCI_BATTERY
drivers/power/twl4030_bci_battery.c: In function 'twl4030_bci_battery_probe':
drivers/power/twl4030_bci_battery.c:911: error: dereferencing pointer to
incomplete type
Signed-off-by:
This is a note to let you know that I've just added the patch titled
Subject: MUSB: Fix index register corruption seen with g_ether and Windows
host
to my gregkh-2.6 tree. Its filename is
musb-fix-index-register-corruption-seen-with-g_ether-and-windows-host.patch
This tree can be
Hi Hari,
From: ext Kanigeri, Hari [EMAIL PROTECTED]
Subject: RE: [RFC][DRAFT] TODO list for TI DSP BRIDGE
Date: Thu, 21 Aug 2008 10:37:12 -0500
Hi Doyu-san,
I think that this virtual clock may allow any arbitrary combination of
clocks and it may be possible to have multiple hierarchy of
Hi Richard,
From: ext Woodruff, Richard [EMAIL PROTECTED]
Subject: RE: [RFC][DRAFT] TODO list for TI DSP BRIDGE
Date: Thu, 21 Aug 2008 07:34:56 -0500
From: Hiroshi DOYU [mailto:[EMAIL PROTECTED]
...
A few quick comments:
- First off, I do like the idea of virtual clocks for
From: Vikram Pandita [EMAIL PROTECTED]
Add TWL4030 BCI Battery for 3430 LDP platform
Signed-off-by: Vikram Pandita [EMAIL PROTECTED]
---
arch/arm/mach-omap2/Makefile|1 +
arch/arm/mach-omap2/board-ldp.c |2 ++
arch/arm/plat-omap/include/mach/board-ldp.h |
Hi Hiroshi,
-Original Message-
From: Hiroshi DOYU [mailto:[EMAIL PROTECTED]
snip
I think that, in this virtual clock, frequency changing will be done
in the totally different path(just in a normal clock tree). This
virtual clock resides in an independent clock tree and supposed to
I tried these patches with my ASoC driver for TWL4030/Overo (the
Gumstix 35XX based board) and they appear to work for that
combination. When I get a chance I will try them with Beagle and EVM,
but I expect that should go well too.
I will submit the TWL4030 + Beagle, EVM, and Overo ASoC driver
Without these changes DMA on DaVinci has never worked traditionally.
We fixed this issue pretty early in DaVinci program ~2006 on the 2.6.10
treee. We are now in the process of forward porting the musb patches
from that tree to the git tree.
We did some performance enhancements/bug fixes on that
On Thursday 21 August 2008, Subbrathnam, Swaminathan wrote:
Without these changes DMA on DaVinci has never worked traditionally.
We fixed this issue pretty early in DaVinci program ~2006 on the 2.6.10
treee.
I remember a recommendation not to use DMA, but that was primarily
because it seemed
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