Hi,
On Fri, Jul 4, 2014 at 9:47 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Jun 30, 2014 at 12:08:57AM -0700, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140617 08:01]:
The following changes since commit
7171511eaec5bf23fb06078f59784a3a0626b38f:
Linux 3.16-rc1
Hi Daniele,
Thanks for reviewing.
On Fri, 04 Jul 2014, Daniele Forsi wrote:
2014-07-04 13:13 GMT+02:00 Peter Griffin:
+Required properties:
+ - compatible : must be st,stih407-dwc3
+ - reg : glue logic base address and USB syscfg ctrl register
offest
+ - reg-names :
This series adds support for the ST glue logic to manage the DWC3 HC
on STiH407 SoC family chipsets.
Peter Griffin (3):
usb: dwc3: add ST dwc3 glue layer to manage dwc3 HC
ARM: dts: sti: Add st-dwc3 devicetree bindings documentation
MAINTAINERS: Add dwc3-st.c file to ARCH/STI architecture
This patch adds the ST glue logic to manage the DWC3 HC
on STiH407 SoC family. It manages the powerdown signal,
and configures the internal glue logic and syscfg registers.
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 702ca10..269ad3b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1325,6 +1325,7 @@ F:drivers/pinctrl/pinctrl-st.c
F:
This patch documents the device tree documentation required for
the ST usb3 controller glue layer found in STiH407 devices.
Signed-off-by: Giuseppe Cavallaro peppe.cavall...@st.com
Signed-off-by: Peter Griffin peter.grif...@linaro.org
---
Documentation/devicetree/bindings/usb/dwc3-st.txt | 58
On Fri, Jul 4, 2014 at 11:06 PM, Olof Johansson o...@lixom.net wrote:
Hi,
On Fri, Jul 4, 2014 at 9:47 PM, Olof Johansson o...@lixom.net wrote:
On Mon, Jun 30, 2014 at 12:08:57AM -0700, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [140617 08:01]:
The following changes since commit
Hi
On Fri, 4 Jul 2014, Roger Quadros wrote:
On 07/03/2014 10:48 PM, Paul Walmsley wrote:
On Thu, 3 Jul 2014, Roger Quadros wrote:
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros rog...@ti.com
Reviewed-by: Rajendra Nayak rna...@ti.com
Tested-by:
On Wed, 25 Jun 2014, Kishon Vijay Abraham I wrote:
Added hwmod data for pcie1 and pcie2 phy present in DRA7xx SOC.
Also added the missing CLKCTRL OFFSET macro and CONTEXT OFFSET macro
for pcie1 phy and pcie2 phy.
Cc: Tony Lindgren t...@atomide.com
Cc: Russell King li...@arm.linux.org.uk
On Thu, 3 Jul 2014, Rajendra Nayak wrote:
On Friday 09 May 2014 06:07 PM, Sekhar Nori wrote:
From: Lokesh Vutla lokeshvu...@ti.com
RTCSS on DRA7 provides a precise real-time clock.
Add hwmod entry for this IP.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Sekhar
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