Lately i've been trying to track down a panic i hit when i pass the mem=256M
option to a 3.16 kernel on a bleaglebone black, and i noticed this:
dtc -I dtb ./arch/arm/boot/dts/am335x-boneblack.dtb
...
memory {
device_type = memory;
reg = 0x8000
On 01/16/2015 12:28 AM, Thomas Niederprüm wrote:
This patch fixes faulty behaviour in a setup where the input clock for
the SRG is fed through the CLKR pin but the McBSP is configured to be
master (SND_SOC_DAIFMT_CBS_CFS). In that case of course CLKR must not be
configured as output pin.
Hi
On Thu, Jan 15, 2015 at 11:28:21PM +0100, Thomas Niederprüm wrote:
This patch fixes faulty behaviour in a setup where the input clock for
the SRG is fed through the CLKR pin but the McBSP is configured to be
master (SND_SOC_DAIFMT_CBS_CFS). In that case of course CLKR must not be
Am Freitag, den 16.01.2015, 11:15 +0200 schrieb Peter Ujfalusi:
On 01/16/2015 12:28 AM, Thomas Niederprüm wrote:
This patch fixes faulty behaviour in a setup where the input clock for
the SRG is fed through the CLKR pin but the McBSP is configured to be
master (SND_SOC_DAIFMT_CBS_CFS). In
On Fri, Jan 16, 2015 at 06:09:00AM +, Ohad Ben-Cohen wrote:
On Thu, Jan 15, 2015 at 4:42 PM, Rob Herring robherri...@gmail.com wrote:
On Thu, Jan 15, 2015 at 7:55 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Jan 15, 2015 at 01:52:01PM +, Mark Rutland wrote:
On Wed, Jan 14,
On Thu, Jan 15, 2015 at 02:42:23PM +, Rob Herring wrote:
On Thu, Jan 15, 2015 at 7:55 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Jan 15, 2015 at 01:52:01PM +, Mark Rutland wrote:
On Wed, Jan 14, 2015 at 08:58:18PM +, Suman Anna wrote:
This patch adds the generic
On 01/16/2015 12:15 PM, Thomas Niederprüm wrote:
Am Freitag, den 16.01.2015, 11:15 +0200 schrieb Peter Ujfalusi:
On 01/16/2015 12:28 AM, Thomas Niederprüm wrote:
This patch fixes faulty behaviour in a setup where the input clock for
the SRG is fed through the CLKR pin but the McBSP is
Am Freitag, den 16.01.2015, 14:42 +0200 schrieb Peter Ujfalusi:
On 01/16/2015 12:15 PM, Thomas Niederprüm wrote:
Am Freitag, den 16.01.2015, 11:15 +0200 schrieb Peter Ujfalusi:
On 01/16/2015 12:28 AM, Thomas Niederprüm wrote:
This patch fixes faulty behaviour in a setup where the input
This patch is in preparation for a nicer IRQ
handling scheme where we use different IRQ
handlers for each IRQ line (as it should be).
Later, we will also drop IRQs offset 0 and 3
because they are always disabled in this driver.
Signed-off-by: Felipe Balbi ba...@ti.com
---
no changes
CPSW never uses RX_THRESHOLD or MISC interrupts. In
fact, they are always kept masked in their appropriate
IRQ Enable register.
Instead of allocating an IRQ that never fires, it's best
to remove that code altogether and let future patches
implement it if anybody needs those.
Signed-off-by:
* Russell King - ARM Linux li...@arm.linux.org.uk [150115 09:22]:
On Thu, Jan 15, 2015 at 07:28:39AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150115 02:53]:
I don't think we've proven a link there. While you're right that it
causes the wrong
On Fri, Jan 16, 2015 at 08:21:20AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150115 09:22]:
On Thu, Jan 15, 2015 at 07:28:39AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150115 02:53]:
I don't think we've proven a
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 08:33]:
On Fri, Jan 16, 2015 at 08:21:20AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150115 09:22]:
On Thu, Jan 15, 2015 at 07:28:39AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux
On Fri, Jan 16, 2015 at 08:41:06AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 08:33]:
On Fri, Jan 16, 2015 at 08:21:20AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150115 09:22]:
On Thu, Jan 15, 2015 at
On Thursday 15 January 2015 07:37:48 Tony Lindgren wrote:
* Marc Zyngier marc.zyng...@arm.com [150115 06:46]:
On Thu, Jan 15 2015 at 2:27:56 pm GMT, Arnd Bergmann a...@arndb.de wrote:
On Thursday 15 January 2015 13:42:57 Marc Zyngier wrote:
Probably there is a workable strategy, but my
On Fri, Jan 16, 2015 at 08:41:06AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 08:33]:
I would still like to understand /why/ enabling preempt causes the error.
Changing the preempt configuration really should not change what happens
on the bus.
On 16/01/15 16:56, Arnd Bergmann wrote:
On Thursday 15 January 2015 07:37:48 Tony Lindgren wrote:
* Marc Zyngier marc.zyng...@arm.com [150115 06:46]:
On Thu, Jan 15 2015 at 2:27:56 pm GMT, Arnd Bergmann a...@arndb.de wrote:
On Thursday 15 January 2015 13:42:57 Marc Zyngier wrote:
Probably
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 09:25]:
On Fri, Jan 16, 2015 at 08:41:06AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 08:33]:
I would still like to understand /why/ enabling preempt causes the error.
Changing the preempt
On 01/16/2015 04:19 AM, Mark Rutland wrote:
On Thu, Jan 15, 2015 at 02:42:23PM +, Rob Herring wrote:
On Thu, Jan 15, 2015 at 7:55 AM, Mark Rutland mark.rutl...@arm.com wrote:
On Thu, Jan 15, 2015 at 01:52:01PM +, Mark Rutland wrote:
On Wed, Jan 14, 2015 at 08:58:18PM +, Suman Anna
Hi Pankaj,
On 15/01/15 06:41, Pankaj Dubey wrote:
+CC: Thomas Abraham thomas...@samsung.com
Hi Mark,
On Monday 12 January 2015 11:56 PM, Marc Zyngier wrote:
Exynos has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to
Similar to omap_gpio_irq_type() let's make sure that the GPIO
is usable as an interrupt if the platform init code did not
call gpio_request(). Otherwise we can get invalid device access
after setup_irq():
WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:147
l3_interrupt_handler+0x214/0x340()
* Tony Lindgren t...@atomide.com [150116 09:36]:
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 09:25]:
On Fri, Jan 16, 2015 at 08:41:06AM -0800, Tony Lindgren wrote:
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 08:33]:
I would still like to understand /why/
On Fri, Jan 16, 2015 at 02:50:50PM -0800, Tony Lindgren wrote:
Similar to omap_gpio_irq_type() let's make sure that the GPIO
is usable as an interrupt if the platform init code did not
call gpio_request(). Otherwise we can get invalid device access
after setup_irq():
WARNING: CPU: 0 PID: 1
On Fri, Jan 16, 2015 at 02:52:44PM -0800, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [150116 09:36]:
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 09:25]:
So, the GPIO driver really needs fixing - and I'd suggest fixing it
first, before fixing the DMA problem,
Hi,
On Wed, Jan 14, 2015 at 09:07:17AM -0800, Tony Lindgren wrote:
STATUS register can be modified by the HW, so we
should bypass cache because of that.
In the case of INT[12] registers, they are the ones
that actually clear the IRQ source at the time they
are read.
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 15:00]:
On Fri, Jan 16, 2015 at 02:52:44PM -0800, Tony Lindgren wrote:
* Tony Lindgren t...@atomide.com [150116 09:36]:
* Russell King - ARM Linux li...@arm.linux.org.uk [150116 09:25]:
So, the GPIO driver really needs fixing -
The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672:
Linux 3.19-rc1 (2014-12-20 17:08:50 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v3.20/fixes-not-urgent-pt1
for you to fetch changes
The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672:
Linux 3.19-rc1 (2014-12-20 17:08:50 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v3.20/dt-pt1
for you to fetch changes up to
The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672:
Linux 3.19-rc1 (2014-12-20 17:08:50 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap
tags/omap-for-v3.20/cleanup-pt1
for you to fetch changes up to
On 1/16/2015 2:50 PM, Tony Lindgren wrote:
Similar to omap_gpio_irq_type() let's make sure that the GPIO
is usable as an interrupt if the platform init code did not
call gpio_request(). Otherwise we can get invalid device access
after setup_irq():
I let Linus W comment on it but IIRC we chewed
Mark,
On Fri, Jan 16, 2015 at 12:17 PM, Mark Rutland mark.rutl...@arm.com wrote:
The hwlock is a basic hardware primitive that allow synchronization
between different processors in the system, which may be running Linux
as well as other operating systems, and may have no other means of
On Fri, Jan 16, 2015 at 05:23:05PM +, Marc Zyngier wrote:
On 16/01/15 16:56, Arnd Bergmann wrote:
On Thursday 15 January 2015 07:37:48 Tony Lindgren wrote:
* Marc Zyngier marc.zyng...@arm.com [150115 06:46]:
On Thu, Jan 15 2015 at 2:27:56 pm GMT, Arnd Bergmann a...@arndb.de
wrote:
On 01/12, Tomeu Vizoso wrote:
Moves clock state to struct clk_core, but takes care to change as little API
as
possible.
struct clk_hw still has a pointer to a struct clk, which is the
implementation's per-user clk instance, for backwards compatibility.
The struct clk that
* santosh shilimkar santosh.shilim...@oracle.com [150116 16:23]:
On 1/16/2015 2:50 PM, Tony Lindgren wrote:
Similar to omap_gpio_irq_type() let's make sure that the GPIO
is usable as an interrupt if the platform init code did not
call gpio_request(). Otherwise we can get invalid device access
On 01/12, Tomeu Vizoso wrote:
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 7eddfd8..2793bd7 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1013,8 +1015,8 @@ static unsigned long clk_core_round_rate_nolock(struct
clk_core *clk,
if (clk-ops-determine_rate) {
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