On Tue, Sep 13, 2011 at 11:03 PM, Kevin Hilman wrote:
> Santosh writes:
>
>> On Tuesday 13 September 2011 02:36 AM, Kevin Hilman wrote:
>>> Santosh Shilimkar writes:
>>>
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware
Santosh writes:
> On Tuesday 13 September 2011 02:36 AM, Kevin Hilman wrote:
>> Santosh Shilimkar writes:
>>
>>> This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
>>> retention (CSWR) is not supported by hardware design.
>>>
>>> The CPUx OFF mode isn't supported on OMAP4430 E
On Tuesday 13 September 2011 02:36 AM, Kevin Hilman wrote:
Santosh Shilimkar writes:
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for h
Santosh Shilimkar writes:
> This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
> retention (CSWR) is not supported by hardware design.
>
> The CPUx OFF mode isn't supported on OMAP4430 ES1.0
>
> CPUx sleep code is common for hotplug, suspend and CPUilde.
>
> Signed-off-by: Sant
On Saturday 10 September 2011 10:24 AM, Shawn Guo wrote:
On Sat, Sep 10, 2011 at 09:08:16AM +0530, Shilimkar, Santosh wrote:
IOn Sat, Sep 10, 2011 at 5:04 AM, Shawn Guo wrote:
[...]
Also, IMO, lable "l2x_clean_inv" should be put after the "bne do_WFI".
Otherwise, my original statement (it see
On Sat, Sep 10, 2011 at 09:08:16AM +0530, Shilimkar, Santosh wrote:
> IOn Sat, Sep 10, 2011 at 5:04 AM, Shawn Guo wrote:
[...]
> > Also, IMO, lable "l2x_clean_inv" should be put after the "bne do_WFI".
> > Otherwise, my original statement (it seems l2x_clean_inv will be
> > called for case "2") st
On Sat, Sep 10, 2011 at 12:04 AM, Kevin Hilman wrote:
> Santosh writes:
>
>> On Friday 09 September 2011 08:57 PM, Shawn Guo wrote:
>>> On Fri, Sep 09, 2011 at 07:41:08PM +0530, Shilimkar, Santosh wrote:
On Fri, Sep 9, 2011 at 7:43 PM, Shawn Guo wrote:
> On Fri, Sep 09, 2011 at 01:39:51
IOn Sat, Sep 10, 2011 at 5:04 AM, Shawn Guo wrote:
> On Fri, Sep 09, 2011 at 10:29:49PM +0530, Santosh wrote:
>> On Friday 09 September 2011 08:57 PM, Shawn Guo wrote:
>> >On Fri, Sep 09, 2011 at 07:41:08PM +0530, Shilimkar, Santosh wrote:
>> >>On Fri, Sep 9, 2011 at 7:43 PM, Shawn Guo wrote:
>>
On Fri, Sep 09, 2011 at 10:29:49PM +0530, Santosh wrote:
> On Friday 09 September 2011 08:57 PM, Shawn Guo wrote:
> >On Fri, Sep 09, 2011 at 07:41:08PM +0530, Shilimkar, Santosh wrote:
> >>On Fri, Sep 9, 2011 at 7:43 PM, Shawn Guo wrote:
> >>>On Fri, Sep 09, 2011 at 01:39:51PM +0530, Santosh wrote
Santosh writes:
> On Friday 09 September 2011 08:57 PM, Shawn Guo wrote:
>> On Fri, Sep 09, 2011 at 07:41:08PM +0530, Shilimkar, Santosh wrote:
>>> On Fri, Sep 9, 2011 at 7:43 PM, Shawn Guo wrote:
On Fri, Sep 09, 2011 at 01:39:51PM +0530, Santosh wrote:
> On Friday 09 September 2011 01:
On Friday 09 September 2011 08:57 PM, Shawn Guo wrote:
On Fri, Sep 09, 2011 at 07:41:08PM +0530, Shilimkar, Santosh wrote:
On Fri, Sep 9, 2011 at 7:43 PM, Shawn Guo wrote:
On Fri, Sep 09, 2011 at 01:39:51PM +0530, Santosh wrote:
On Friday 09 September 2011 01:34 PM, Shawn Guo wrote:
Hi Santo
On Fri, Sep 09, 2011 at 07:41:08PM +0530, Shilimkar, Santosh wrote:
> On Fri, Sep 9, 2011 at 7:43 PM, Shawn Guo wrote:
> > On Fri, Sep 09, 2011 at 01:39:51PM +0530, Santosh wrote:
> >> On Friday 09 September 2011 01:34 PM, Shawn Guo wrote:
> >> >Hi Santosh,
> >> >
> >> >On Sun, Sep 04, 2011 at 07:
On Fri, Sep 9, 2011 at 7:43 PM, Shawn Guo wrote:
> On Fri, Sep 09, 2011 at 01:39:51PM +0530, Santosh wrote:
>> On Friday 09 September 2011 01:34 PM, Shawn Guo wrote:
>> >Hi Santosh,
>> >
>> >On Sun, Sep 04, 2011 at 07:24:15PM +0530, Santosh Shilimkar wrote:
>> >>This patch adds the CPU0 and CPU1 o
On Fri, Sep 09, 2011 at 01:39:51PM +0530, Santosh wrote:
> On Friday 09 September 2011 01:34 PM, Shawn Guo wrote:
> >Hi Santosh,
> >
> >On Sun, Sep 04, 2011 at 07:24:15PM +0530, Santosh Shilimkar wrote:
> >>This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
> >>retention (CSWR) i
On Friday 09 September 2011 01:09 AM, Jean Pihet wrote:
On Sun, Sep 4, 2011 at 3:54 PM, Santosh Shilimkar
wrote:
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPU
On Friday 09 September 2011 01:34 PM, Shawn Guo wrote:
Hi Santosh,
On Sun, Sep 04, 2011 at 07:24:15PM +0530, Santosh Shilimkar wrote:
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on
Hi Santosh,
On Sun, Sep 04, 2011 at 07:24:15PM +0530, Santosh Shilimkar wrote:
> This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
> retention (CSWR) is not supported by hardware design.
>
> The CPUx OFF mode isn't supported on OMAP4430 ES1.0
>
> CPUx sleep code is common for
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for hotplug, suspend and CPUilde.
Signed-off-by: Santosh Shilimkar
Cc: Kevin Hilman
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