On Mon, 2012-04-23 at 12:07 +0200, Mohammed, Afzal wrote:
> Hi Tero,
>
> With "this branch" you meant,
>
> HEAD @ 297624c ARM: OMAP3: PM: Remove IO Daisychain control from cpuidle,
>
> right ? (the one Paul suggested to try)
Yeah, thats right. My patch applies right on top of it.
-Tero
>
> R
On Mon, 2012-04-23 at 12:43 +0200, Mohammed, Afzal wrote:
> Hi Tero,
>
> On Mon, Apr 23, 2012 at 15:43:22, Kristo, Tero wrote:
> > > > can you try the attached patch with this branch and omap3evm board? I
> > > > don't have the board myself so I can't test it myself (I tested this
> > > > with oma
On Tue, 2012-04-24 at 16:08 +0530, Santosh Shilimkar wrote:
> + Tero
>
> On Tuesday 24 April 2012 03:20 PM, Jean Pihet wrote:
> > Hi Grazvydas, Kevin,
> >
> > I did some gather some performance measurements and statistics using
> > custom tracepoints in __omap3_enter_idle.
> > All the details are
On Tue, 2012-04-24 at 14:00 +0200, Mohammed, Afzal wrote:
> Hi Tero,
>
> On Mon, Apr 23, 2012 at 17:29:48, Kristo, Tero wrote:
> > Okay thats good (although I wonder why the attachment got corrupted.)
> > Did you check if the device suspends / resumes properly also? Can you
> > check what do you h
On Tue, 2012-04-24 at 14:50 +0200, Jean Pihet wrote:
> Hi Tero,
>
> On Tue, Apr 24, 2012 at 2:21 PM, Tero Kristo wrote:
> > On Tue, 2012-04-24 at 16:08 +0530, Santosh Shilimkar wrote:
> >> + Tero
> >>
> >> On Tuesday 24 April 2012 03:20 PM, Je
On Mon, 2012-04-23 at 10:52 -0500, Jon Hunter wrote:
> Hi Tero,
>
> On 04/20/2012 04:19 AM, Tero Kristo wrote:
> > From: Rajendra Nayak
> >
> > On OMAP4 most modules/hwmods support module level context status. On
> > OMAP3 and earlier, we relyed on the
On Tue, 2012-04-24 at 09:35 -0700, Tony Lindgren wrote:
> * Tero Kristo [120420 02:39]:
> > +
> > +static int omap4_sar_not_accessible(void)
> > +{
> > + u32 usbhost_state, usbtll_state;
> > +
> > + /*
> > +* Make sure that USB host and
On Tue, 2012-04-24 at 09:39 -0700, Tony Lindgren wrote:
> * Tero Kristo [120420 02:39]:
> > @@ -384,6 +386,17 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned
> > int power_state)
> > set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
> >
> > if (om
On Tue, 2012-04-24 at 13:22 -0500, Jon Hunter wrote:
> Hi Tero,
>
> On 04/20/2012 04:33 AM, Tero Kristo wrote:
> > From: Santosh Shilimkar
> >
> > Work around for Errata ID: i632 "LPDDR2 Corruption After OFF Mode
> > Transition When CS1 Is Used On EMIF&q
On Tue, 2012-04-24 at 12:46 -0500, Jon Hunter wrote:
> Hi Tero,
>
> On 04/20/2012 04:33 AM, Tero Kristo wrote:
> > This patch adds device off support to OMAP4 device type.
> >
> > OFF mode is disabled by default, however, there are two ways to enable
> > OFF mod
On Tue, 2012-04-24 at 12:50 -0500, Jon Hunter wrote:
> Hi Tero,
>
> On 04/20/2012 04:33 AM, Tero Kristo wrote:
> > From: Santosh Shilimkar
> >
> > The ROM BUG is when MPU Domain OFF wake up sequence that can compromise
> > IVA and Tesla execution.
> >
On Tue, 2012-04-24 at 12:57 -0500, Jon Hunter wrote:
> Hi Tero,
>
> On 04/20/2012 04:33 AM, Tero Kristo wrote:
> > From: Rajendra Nayak
> >
> > On HS devices on the way out of MPU OSWR and OFF ROM code wrongly
> > overwrites the CM L3INSTR registers. So to avoi
On Mon, 2012-04-23 at 11:09 -0500, Jon Hunter wrote:
> Hi Tero,
>
> On 04/20/2012 04:33 AM, Tero Kristo wrote:
>
> [...]
>
> > +/**
> > + * omap4_dpll_print_reg - dump out a single DPLL register value
> > + * @dpll_reg: register to dump
> > + *
n the MPU
> pwrdm. Remove these since they are not necessary and cause unwanted
> latency in the idle path.
>
> Cc: Tero Kristo
> Signed-off-by: Kevin Hilman
> ---
> arch/arm/mach-omap2/pm34xx.c |4
> 1 file changed, 4 deletions(-)
>
> diff --git a/arch/arm/ma
On Tue, 2012-04-24 at 10:07 -0700, Kevin Hilman wrote:
> Hi Tero,
>
> Tero Kristo writes:
>
> > On Fri, 2012-04-06 at 07:52 +, Mohammed, Afzal wrote:
> >> Hi Paul,
> >>
> >> On Fri, Apr 06, 2012 at 12:43:06, Paul Walmsley wrote:
> >> &
Hi Neil,
As I am supposed to be acting as a maintainer for the drivers/mfd/twl-*,
you can add an ack from me for the twl-core.c part. It looks kind of
okay, even if I would eventually like to remove/fix the ugly regulator
init from twl-core.
Just a question, who is going to merge all this seeing
On Fri, 2012-04-27 at 16:15 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > On Tue, 2012-04-24 at 10:07 -0700, Kevin Hilman wrote:
>
> [...]
>
> >> > From 26733dd988ccc9e72355a39e01b2d6e9215a892d Mon Sep 17 00:00:00 2001
> >> > From: Tero K
On Wed, 2012-05-02 at 07:48 +0200, Mohammed, Afzal wrote:
> Hi Kevin,
>
> On Tue, May 01, 2012 at 19:38:00, Hilman, Kevin wrote:
> > >> Afzal, care to give this one a test as well? It should have the same
> > >> result but is a more targetted fix. With and ack from Tero and a
> > >> Tested-by fr
On Wed, 2012-05-02 at 10:45 +0200, Bedia, Vaibhav wrote:
> Hi Tero,
>
> On Fri, Apr 20, 2012 at 14:49:49, Kristo, Tero wrote:
> > From: Axel Haslam
> >
> > On OMAP4, there is no support to read previous logic state
> > or previous memory state achieved when a power domain transitions
> > to RET.
> > @@ -274,8 +278,16 @@ static int __init pm_dbg_init(void)
> >
> >pwrdm_for_each(pwrdms_setup, (void *)d);
> >
> > - (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUSR, d,
> > - &enable_off_mode, &pm_dbg_option_fops);
> > + if (
Hi,
This set adds support for TPS62361 PMIC, which is used to power
MPU voltagedomain on OMAP4460 boards. These patches apply on top
of 3.4 + my voltagedomain fixes set to avoid adding redundant code.
Working tree available here for interested parties:
git://gitorious.org/~kristo/omap-pm/omap-pm-
Current I2C timing parameters do not work with Panda board at least.
Parameters updated based on TI recommendation.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/vc.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2
support where there is a mixture of
PMIC combinations used.
Signed-off-by: Nishanth Menon
[t-kri...@ti.com: moved code under twl-common, other minor cleanups]
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap_twl.c | 81 ++
arch/arm/mach-omap2/pm.h
, OMAP4_VP_VSTEPMIN_VSTEPMIN,
OMAP4_VP_VSTEPMAX_VSTEPMAX, OMAP4_VP_VLIMITTO_TIMEOUT_US
[n...@ti.com: cleaned up TPS to handle board variations]
Signed-off-by: Nishanth Menon
Signed-off-by: Vishwanath BS
[t-kri...@ti.com: minor cleanup, added panda board support]
Signed-off-by: Tero Kristo
---
arch/arm/mach
On Fri, 2012-05-04 at 17:00 -0500, Nishanth Menon wrote:
> On 16:57-20120504, Tero Kristo wrote:
> > From: Vishwanath BS
> >
> > TPS62361 is a new PMIC used with OMAP4460 on SDP4430 platform
> > and panda board ES to supply MPU VDD.
> > Rest of the VDDs co
On Mon, 2012-05-07 at 17:30 +0530, Vishwanath Sripathy wrote:
> Hi Tero,
>
> > -Original Message-
> > From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-
> > ow...@vger.kernel.org] On Behalf Of Tero Kristo
> > Sent: Friday, May 04, 2012 7:27 PM
>
On Mon, 2012-05-07 at 17:19 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > From: Axel Haslam
> >
> > On OMAP4, there is no support to read previous logic state
> > or previous memory state achieved when a power domain transitions
> > to RET. In
On Mon, 2012-05-07 at 17:19 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > From: Axel Haslam
> >
> > On OMAP4, there is no support to read previous logic state
> > or previous memory state achieved when a power domain transitions
> > to RET. In
On Tue, 2012-05-08 at 14:27 +0530, Rajendra Nayak wrote:
> On Tuesday 08 May 2012 02:06 PM, Tero Kristo wrote:
> > On Mon, 2012-05-07 at 17:19 -0700, Kevin Hilman wrote:
> >> Tero Kristo writes:
> >>
> >>> From: Axel Haslam
> >>>
> >>
On Tue, 2012-05-08 at 14:45 +0530, Rajendra Nayak wrote:
> On Tuesday 08 May 2012 02:39 PM, Tero Kristo wrote:
> > On Tue, 2012-05-08 at 14:27 +0530, Rajendra Nayak wrote:
> >> On Tuesday 08 May 2012 02:06 PM, Tero Kristo wrote:
> >>> On Mon, 2012-05-07 at 1
On Fri, 2012-04-20 at 09:55 -0700, Tony Lindgren wrote:
> * Tero Kristo [120420 01:24]:
> > Hi,
> >
> > What happened with this pull request? It doesn't seem to be in 3.4 at
> > least.
>
> There was a boot issue on omap3 evm and that branch got dropped
On Thu, 2012-05-10 at 00:14 +0100, Russell King - ARM Linux wrote:
> On Wed, May 09, 2012 at 03:46:02PM -0700, Kevin Hilman wrote:
> > Tero Kristo writes:
> >
> > > Hi,
> > >
> > > First version for this work. Applies on top of mainline + iochain set
On Wed, 2012-05-09 at 16:27 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > From: Rajendra Nayak
> >
> > Restore all CM1/2 module registers as they are lost in OFF mode.
>
> Except they are still lost since nobody calls these new functions (in
> this pa
Hi,
Changes compared to previous version:
- Patch 6 now adds support for reading prev logic and mem states
instead of tweaking the _update_logic_membank_counters function
directly.
- Some version of "[PATCH] OMAP2+: UART: Add mechanism to probe uart
pins and configure rx wakeup" from Govin
From: Rajendra Nayak
Remove the FIXME's in the suspend sequence since
we now intend to support system level RET support.
Signed-off-by: Rajendra Nayak
Signed-off-by: Tero Kristo
Reviewed-by: Santosh Shilimkar
---
arch/arm/mach-omap2/pm44xx.c |6 --
1 files changed, 0 inser
http://marc.info/?l=linux-omap&m=133040749621183&w=2
Just provided for testing purposes.
Signed-off-by: Rajendra Nayak
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/a
this procedure, the GIC configuration done between the
CPU0 wakeup and CPU1 wakeup will not be lost but during this
short windows, the CPU0 will not receive interrupts
Signed-off-by: Santosh Shilimkar
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/common.h |2 +
arch/arm/mach-omap2
Paul Walmsley
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap_hwmod.c | 44 +++--
arch/arm/plat-omap/include/plat/omap_hwmod.h |8 +++-
2 files changed, 46 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-
.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/powerdomain44xx.c | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c
b/arch/arm/mach-omap2/powerdomain44xx.c
index 601325b..ab00736 100644
--- a/arch/arm
This will make it easier to handle next logic states for power domains
during suspend. With this patch, the parameter is also programmed to
retention for every powerdomain, thus all powerdomains enter CSWR
state after this patch.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/pm44xx.c
From: Rajendra Nayak
On OMAP4 most modules/hwmods support module level context status. On
OMAP3 and earlier, we relyed on the power domain level context status.
Identify all such modules using a 'HWMOD_CONTEXT_REG' flag, all such
hwmods already have a valid 'context_offs' populated in .prcm struc
PM debug now contains a file that can be used to control OSWR support
enable / disable on OMAP4. Also removed the off_mode_enable file for
the same platform as it is unsupported.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/pm-debug.c | 20
arch/arm/mach-omap2/pm.h
Hi,
Changes compared to previous version:
- generic: dropped a few redundant cpu_is_omapXxxx checks
- generic: changed the ordering of patches a bit to allow new
code + their users to be added in the same patch
- patch 3: removed dpll/cm/sar calls from this patch
- patch 4: added call to dpll s
, these custom function implementation will be
abstracted and might be done in hwmod or in other layer.
Signed-off-by: Santosh Shilimkar
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/powerdomain44xx.c | 41 +++
arch/arm/mach-omap2/powerdomains44xx_data.c
Added in preparation for device off mode. SAR ROM contains the mapping
from SAR RAM to IO registers, and this will eventually be parsed during
init time to do the reverse before device off.
Signed-off-by: Tero Kristo
---
arch/arm/plat-omap/include/plat/omap44xx.h |1 +
1 files changed, 1
able_off_mode
(conversely echo '0' will disable it as well).
Signed-off-by: Santosh Shilimkar
[t-kri...@ti.com: largely re-structured the code]
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 10 -
arch/arm/mach-omap2/omap-wakeupgen.c | 47
d-off-by: Rajendra Nayak
Signed-off-by: Santosh Shilimkar
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/cm44xx.h |5 +
arch/arm/mach-omap2/dpll44xx.c| 271 +
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 14 +-
3 files changed
From: Rajendra Nayak
Restore all CM1/2 module registers as they are lost in OFF mode.
[n...@ti.com: minor clean ups]
Signed-off-by: Nishanth Menon
Signed-off-by: Rajendra Nayak
Signed-off-by: Santosh Shilimkar
Signed-off-by: Axel Haslam
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2
omap_sar_overwrite() now uses offsets detected during init time from
the SAR ROM contents.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-sar.c | 159 +---
1 files changed, 115 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-omap2/omap
needed
with subsequent patches that generate the layouts based on SAR ROM
contents, also dropped unnecessary dmm-44xx.h header file.]
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/cm1_44xx.h |2 +
arch/arm/mach-omap2
Added similar PM errata flag support as omap3 has. A few errata flags
will be added in subsequent patches.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/pm.h |7 +++
arch/arm/mach-omap2/pm44xx.c |1 +
2 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/arch/arm
-by: Santosh Shilimkar
[t-kri...@ti.com: added omap4 pm errata support]
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 35 -
arch/arm/mach-omap2/pm.h |1 +
arch/arm/mach-omap2/pm44xx.c |8 ++
3 files
IO address for save / restore
sar_layout_generate() parses this info and stores the resulting data to
a list of sar_ram_entry structs, which in turn will be used by sar_save.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-sar.c | 270
support]
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 53 +
arch/arm/mach-omap2/pm.h |2 +
arch/arm/mach-omap2/pm44xx.c | 11 ++
3 files changed, 66 insertions(+), 0 deletions(-)
diff --git a/arch
neeth Bajjuri
Signed-off-by: Bryan Buckley
[t-kri...@ti.com: merged the two patches into one]
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/include/mach/omap-secure.h |1 +
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 13 +
arch/arm/mach-omap2/pm.h |
...@ti.com: fixed commit message, merged multiple patches to one]
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/common.h |1 +
arch/arm/mach-omap2/omap-wakeupgen.c | 21 +
arch/arm/mach-omap2/omap4-common.c |5 +
arch/arm/mach-omap2/omap4-sar
save_secure_all needs l3_main_3_ick and l4_secure_clkdm enabled,
otherwise the secure ROM code will crash.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-wakeupgen.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap
OMAP4470.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-wakeupgen.c | 14 ++
arch/arm/mach-omap2/omap4-sar-layout.h |1 +
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c
b/arch/arm/mach-omap2/omap-wakeupgen.c
index
If AUX_CORE_BOOT0 does not indicate wakeup request for cpu1, put it back
to off. This is needed during wakeup from device off to prevent cpu1
from being stuck indefinitely in the wakeup loop and also to prevent
wakeup problem on GP chips with device off mode.
Signed-off-by: Tero Kristo
---
arch
not prevent voltage scaling done by voltdm->scale / DVFS.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/pm44xx.c | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index dfaa254..5d97
uration
is not set properly, we apply the required workaround allowing
the restore sequence to work properly.
Signed-off-by: Santosh Shilimkar
[t-kri...@ti.com: moved workaround from omap-sar.c to pm44xx.c]
Signed-off-by: Tero Kristo
---
.../include/mach/ctrl_module_wkup_44xx.h |2 +
powerdomain struct for context loss
register, which is checked during pwrdm_post_transition to see if
a device off type context loss has happened. If this is the case,
the counters + timers for OFF state are touched instead of RETENTION.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap-mpuss
On Tue, 2012-05-15 at 12:52 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > From: Rajendra Nayak
> >
> > Remove the FIXME's in the suspend sequence since
> > we now intend to support system level RET support.
>
> minor: this should probably go
On Tue, 2012-05-15 at 14:44 -0700, Kevin Hilman wrote:
> Santosh,
>
> Tero Kristo writes:
>
> > From: Santosh Shilimkar
> >
> > GIC distributor control register has changed between CortexA9 r1pX and
> > r2pX. The Control Register secure banked v
On Tue, 2012-05-15 at 15:36 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > On OMAP4, there is no support to read previous logic state
> > or previous memory state achieved when a power domain transitions
> > to RET. Instead there are module level context regist
On Tue, 2012-05-15 at 15:41 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > PM debug now contains a file that can be used to control OSWR support
> > enable / disable on OMAP4. Also removed the off_mode_enable file for
> > the same platform as it is unsupporte
On Wed, 2012-05-16 at 11:28 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > Added in preparation for device off mode. SAR ROM contains the mapping
> > from SAR RAM to IO registers, and this will eventually be parsed during
> > init time to do the reverse before de
On Wed, 2012-05-16 at 15:36 -0700, Kevin Hilman wrote:
> +Jean for functional power states
>
> Tero Kristo writes:
>
> > This patch adds device off support to OMAP4 device type.
>
> Description is rather thin for a patch that is doing so much.
>
> > OFF mode
On Wed, 2012-05-16 at 15:42 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > From: Rajendra Nayak
> >
> > SAR/ROM code restores only CORE DPLL to its original state
> > post wakeup from OFF mode.
> > The rest of the DPLL's in OMAP4 platform (MPU/IV
On Thu, 2012-05-17 at 09:37 -0700, Kevin Hilman wrote:
> "Shilimkar, Santosh" writes:
>
> > On Thu, May 17, 2012 at 12:34 PM, Shilimkar, Santosh
> > wrote:
> >> On Thu, May 17, 2012 at 4:12 AM, Kevin Hilman wrote:
> >>> Tero Kristo writes:
>
On Fri, 2012-05-18 at 11:23 +0530, Shilimkar, Santosh wrote:
> On Thu, May 17, 2012 at 10:12 PM, Kevin Hilman wrote:
> > "Shilimkar, Santosh" writes:
> >
> >> On Thu, May 17, 2012 at 4:28 AM, Kevin Hilman wrote:
> >>> Tero Kristo writes:
> >
On Wed, 2012-05-16 at 16:07 -0700, Kevin Hilman wrote:
> On 05/16/2012 04:05 PM, Kevin Hilman wrote:
> > Tero Kristo writes:
> >
> >> From: Santosh Shilimkar
> >>
> >> The ROM BUG is when MPU Domain OFF wake up sequence that can compromise
> >>
On Wed, 2012-05-16 at 17:33 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > Without this, CPU0 will crash in the ROM code during wakeup from
> > device off. This patch also clears the GIC save area, to prevent
> > ROM code from writing garbage to the GIC register
On Wed, 2012-05-16 at 16:36 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > From: Carlos Leija
> >
> > At wakeup from OFF/OSWR CPU1 will call secure HAL service through a local
> > secure dispatcher with MMU off,
>
> Reviewers who are uninitaited in
On Wed, 2012-05-16 at 16:48 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > From: Axel Haslam
> >
> > ROM code restores part of the GIC context during wakeup from device
> > off mode from the SAR RAM. If the PPI and SPI interrupts are not
> > ma
On Wed, 2012-05-16 at 18:17 -0600, Paul Walmsley wrote:
> Hi Tero
>
> On Mon, 14 May 2012, Tero Kristo wrote:
>
> > save_secure_all needs l3_main_3_ick and l4_secure_clkdm enabled,
> > otherwise the secure ROM code will crash.
>
> Do we know why the l3_main_3 inter
On Wed, 2012-05-16 at 17:06 -0700, Kevin Hilman wrote:
> +Benoit
>
> Tero Kristo writes:
>
> > save_secure_all needs l3_main_3_ick and l4_secure_clkdm enabled,
> > otherwise the secure ROM code will crash.
> >
> > Signed-off-by: Tero Kristo
>
> I t
On Wed, 2012-05-16 at 17:31 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > If AUX_CORE_BOOT0 does not indicate wakeup request for cpu1, put it back
> > to off.
>
> Why is it waking up then? (I know the answer, but will forget. The
> changelog serves as my l
On Wed, 2012-05-16 at 11:15 +0530, Rajendra Nayak wrote:
> On Wednesday 16 May 2012 10:54 AM, Rajendra Nayak wrote:
> > On Wednesday 16 May 2012 03:52 AM, Kevin Hilman wrote:
> >> "Cousson, Benoit" writes:
> >>
> >>> On 4/24/2012 4:46 PM, Tero Krist
On Tue, 2012-05-29 at 14:32 -0500, Menon, Nishanth wrote:
> On Mon, May 14, 2012 at 5:03 AM, Tero Kristo wrote:
> [...]
> > +/**
> > * _enable - enable an omap_hwmod
> > * @oh: struct omap_hwmod *
> > *
> > @@ -1599,6 +1629,8 @@ stat
On Tue, 2012-05-29 at 14:29 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > Hi,
> >
> > This set adds support for TPS62361 PMIC, which is used to power
> > MPU voltagedomain on OMAP4460 boards. These patches apply on top
> > of 3.4 + my voltagedomain
On Tue, 2012-05-29 at 11:31 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > On Wed, 2012-05-16 at 15:36 -0700, Kevin Hilman wrote:
> >> +Jean for functional power states
> >>
> >> Tero Kristo writes:
> >>
> >>
On Tue, 2012-05-29 at 15:10 -0500, Menon, Nishanth wrote:
> On Mon, May 14, 2012 at 5:18 AM, Tero Kristo wrote:
> > Added similar PM errata flag support as omap3 has. A few errata flags
> > will be added in subsequent patches.
>
> Considering that we might have erratas fo
On Tue, 2012-05-29 at 13:15 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > On Wed, 2012-05-16 at 17:06 -0700, Kevin Hilman wrote:
> >> +Benoit
> >>
> >> Tero Kristo writes:
> >>
> >> > save_secure_all needs l3_main_3_ick
On Tue, 2012-05-29 at 15:48 -0500, Menon, Nishanth wrote:
> On Tue, May 29, 2012 at 3:15 PM, Kevin Hilman wrote:
> > Tero Kristo writes:
> >
> >> On Wed, 2012-05-16 at 17:06 -0700, Kevin Hilman wrote:
> >>> +Benoit
> >>>
> >>&
On Tue, 2012-05-29 at 14:30 -0700, Kevin Hilman wrote:
> Tero Kristo writes:
>
> > Current I2C timing parameters do not work with Panda board at least.
> > Parameters updated based on TI recommendation.
> >
> > Signed-off-by: Tero Kristo
>
> Let's f
On Wed, 2012-05-30 at 16:08 -0500, Menon, Nishanth wrote:
> On Mon, May 14, 2012 at 5:18 AM, Tero Kristo wrote:
> > Currently device off does not have any counters / timers of its own
> > and it is impossible to track the time spent in this state. In device
> > off, MPU / CO
and autoidle flag for clocks that
are hardware controlled and should be skipped in usecount
calculations.
Signed-off-by: Tero Kristo
Cc: Paul Walmsley
Cc: Kevin Hilman
---
arch/arm/mach-omap2/clkt_iclk.c | 21 +
arch/arm/mach-omap2/clockdomain.c | 38
dpll3, dpll4 and sdrc_ick are controlled automatically by hardware.
Thus, reflect this with the autoidle flags, the clocks will no longer
show as active in usecount dumps and will allow the voltdm->sleep /
wakeup calls to work properly.
Signed-off-by: Tero Kristo
Cc: Paul Walmsley
Cc: Ke
Some clockdomains can't support manual domain transitions triggered by
clock framework, and must be prevented from doing so. Added clkdm flag
CLKDM_SKIP_MANUAL_TRANS for doing this.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/clockdomain.c |6 ++
arch/arm/mach-omap2/clockdom
DPLL4 (PER DPLL) disable can cause issues on omap3, thus prevent
disable / enable by setting the clkops as core_dpll_ops. Also, prevent
l3 / l4 core clkdomain manual transitions as these can cause issues also.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/clock3xxx_data.c|2
y to do printk dumps from kernel code,
by calling the pm_dbg_dump_X functions. The plan is to call these
functions once an error condition is detected, e.g. failed suspend.
Signed-off-by: Tero Kristo
Cc: Paul Walmsley
Cc: Kevin Hilman
---
arch/arm/mach-oma
igned-off-by: Tero Kristo
---
arch/arm/mach-omap2/clockdomains3xxx_data.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c
b/arch/arm/mach-omap2/clockdomains3xxx_data.c
index 6038adb..0dae4c8 100644
--- a/arch/arm/mach-
This works similarly to e.g. pwrdm_for_each(). Needed by enhanced
usecounting debug functionality that will be added to pm-debug.
Signed-off-by: Tero Kristo
Cc: Paul Walmsley
Cc: Kevin Hilman
---
arch/arm/plat-omap/clock.c | 33 +++
arch/arm/plat
allow vc
callbacks to be triggered at right point of time.
Signed-off-by: Tero Kristo
Cc: Paul Walmsley
Cc: Kevin Hilman
---
arch/arm/mach-omap2/pm34xx.c |3 ++
arch/arm/mach-omap2/pm44xx.c |3 ++
arch/arm/mach-omap2/powerdomain.c | 54
Hi,
Refreshed the patches against latest mainline kernel, and did some
updates mainly proposed by Nishanth Menon . Changes compared
to previous version:
patch 1:
- added check against null pointer
patch 2:
- added BUG_ON in case clkdm / pwrdm usecount goes negative
patch 3:
- added BUG_ON in
These are updated based on powerdomain usecounts. Also added support
for voltdm->sleep and voltdm->wakeup calls that will be invoked once
voltagedomain enters sleep or wakes up based on usecount numbers. These
will be used for controlling voltage scaling functionality.
Signed-off-by: Tero
Hi,
This set applies on top of the pwrdm / voltdm usecounting fixes set.
Contains some fixes proposed mainly by Nishanth Menon .
http://marc.info/?l=linux-omap&m=133847159830867&w=2
Changes compared to previous version:
- huge patch #3 in set v5 was split into patches 3...6
- dropped omap4 pmic
s to set a cap if the voltage is out of
reach for the PMIC.
Reported-by: Jon Hunter
Signed-off-by: Nishanth Menon
Signed-off-by: Vishwanath BS
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap_twl.c | 17 -
arch/arm/mach-omap2/voltage.h | 22 --
These are now called vddmin and vddmax, as these fields will be used
globally for selecting voltage ranges for a pmic channel, and not
only for voltage processor.
Signed-off-by: Tero Kristo
---
arch/arm/mach-omap2/omap_twl.c | 28 ++--
arch/arm/mach-omap2/voltage.h
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