Multicast Filtering - mlx4_SET_MCAST_FLTR

Hi, I was going through the mlx4 code and noticed that this function mlx4_SET_MCAST_FLTR calls the mlx4_SET_MCAST_FLTR_wrapper which in turns has an empty body. So, I was just wondering if the multicast filtering functionality is disabled? Is QP_ATTACH the replacement for this? Couldn't

mlx4 VLAN filtering support: mlx4_SET_VLAN_FLTR_wrapper

Hi, I was going through the code and noticed that this function mlx4_SET_VLAN_FLTR_wrapper has an empty body and returns success. Also this function mlx4_common_set_vlan_fltr doesn't have an implementation. I was going through the 3.19 Linux kernel. So, does that mean VLAN filtering is not

Re: mlx4: having trouble getting mlx4_NOP to succeed in the VF driver

appreciate the help. I really hope I get past this error.. Thank you... Best Regards, Bob On Wed, Dec 31, 2014 at 2:55 PM, Jack Morgenstein ja...@dev.mellanox.co.il wrote: On Wed, 31 Dec 2014 02:26:07 +0530 Bob Biloxi iambobbil...@gmail.com wrote: Hi, I was going through the mlx4 source code

mlx4: having trouble getting mlx4_NOP to succeed in the VF driver

Hi, I was going through the mlx4 source code and had a few questions regarding the generation of interrupts upon execution of the NOP command from the VF driver. If i am running as a dedicated driver, then NOP seems to work fine(I get an interrupt) But if I enable SRIOV and then from the VF

Re: Query regarding MAD_DEMUX and Secure Host

+0530 Bob Biloxi iambobbil...@gmail.com wrote: am I correct in my understanding when i say that MAD_DEMUX feature is not required to be supported/implemented in Mellanox RoCE Drivers? It is required only for Infiniband drivers? Actually, you will need to support MAD_DEMUX anyway

Query regarding MAD_DEMUX and Secure Host

Hi, I was going through the mlx4 code for Secure Host and MAD_DEMUX feature. I had a few queries..hoping that i can get these clarified. If i understand correctly mlx4 codebase (mlx4_core/mlx4_en/mlx4_ib drivers) take care of both RoCE and Infiniband adapters ( in both dedicated and

Re: FMR Support in multi-function environment

understanding. Best Regards, Bob On Tue, Nov 11, 2014 at 4:24 PM, Jack Morgenstein ja...@dev.mellanox.co.il wrote: On Mon, 10 Nov 2014 19:58:46 +0530 Bob Biloxi iambobbil...@gmail.com wrote: Hi, Is FMR (Fast Memory Regions) supported in a multi-function mode? In SRIOV, FMR is supported only

FMR Support in multi-function environment

Hi, Is FMR (Fast Memory Regions) supported in a multi-function mode? If yes, I couldn't find the source code for the same in the mlx4 codebase. Can anyone please point me to the right location... What I was trying to understand is this: Suppose a VF driver wants to register large amount of

mlx4: RoCE support in SRIOV environment

Hi, I was going through the mlx4 code and previous mailing lists when I came across the following thread: http://marc.info/?l=linux-rdmam=134398354428293w=2 In that thread, it is mentioned as follows: Some Limitations 1. FMRs are not currently supported on slaves. This will

Re: mlx4: RoCE support in SRIOV environment

On Tue, Nov 11, 2014 at 11:46 AM, Jack Morgenstein ja...@dev.mellanox.co.il wrote: On Mon, 10 Nov 2014 20:05:54 +0530 Bob Biloxi iambobbil...@gmail.com wrote: Hi, I was going through the mlx4 code and previous mailing lists when I came across the following thread: http://marc.info/?l=linux

Re: FMR Support in multi-function environment

management extensions support Thanks so much for the detailed information. This is very much helpful. I will go through these. Best Regards, Bob On Tue, Nov 11, 2014 at 11:55 AM, Or Gerlitz ogerl...@mellanox.com wrote: On 11/10/2014 4:28 PM, Bob Biloxi wrote: Suppose a VF driver wants to register

mlx4 roce PF driver responsibilities

Hi All, I was going through the mlx4 RoCE driver. I wanted to understand the functionality that is implemented only by the Physical Function Driver (PF Driver). Assuming there is no RDMA stack, can anyone please tell me what all a PF driver needs to take care of? Is it sufficient if it only

issue while executing RST2INIT_QP

Hi All, I ran into an issue while executing RST2INIT_QP HCR command on mlx4. The command gets completed, but returns a status 3 instead of 0. The 3 indicates that the QP number is reserved. I did allocate ICM for all the QPs. I am using SRIOV mode. The reserved number of QPs obtained from

Re: Can a PF driver access the VF config space, BAR(MMIO) etc?

mapping PF's pci_dev-resource[PCI_IOV_RESOURCES] and using above formula to get exact MMIO base for corresponding VF. Regards, Sunil. On Wed, Sep 24, 2014 at 10:10 PM, Bob Biloxi iambobbil...@gmail.com wrote: Hi, I am new to writing pci sriov drivers. So i could use your help and expertise

Can a PF driver access the VF config space, BAR(MMIO) etc?

Hi, I am new to writing pci sriov drivers. So i could use your help and expertise here As I understand once sriov is enabled, the PF driver can access the PF(Physical Function) configuration space, BAR(MMIO) etc and the VF driver can access the VF(Virtual Function) configuration space,

Re: mlx4 query in sriov mode

+0530, Bob Biloxi wrote: Hi All, I really appreciate this wonderful community which has immensely helped me broaden my knowledge and understanding. I was going through the mlx4 sriov code, trying to understand the communication between the VF driver and the PF driver. I was having a few queries

mlx4 query in sriov mode

Hi All, I really appreciate this wonderful community which has immensely helped me broaden my knowledge and understanding. I was going through the mlx4 sriov code, trying to understand the communication between the VF driver and the PF driver. I was having a few queries..hoping to get a

Re: mlx4: using dma_sync_single_for_cpu/dma_sync_single_for_cpu for writing MTT instead of WRITE_MTT hcr command

Hi Jack, Thanks so much for the response.. This is really helpful! Best Regards, Marc On Thu, Jul 10, 2014 at 1:25 PM, Jack Morgenstein ja...@dev.mellanox.co.il wrote: On Wed, 9 Jul 2014 18:40:46 +0530 Bob Biloxi iambobbil...@gmail.com wrote: Hi, I was going through the mr.c file as part

mlx4: using dma_sync_single_for_cpu/dma_sync_single_for_cpu for writing MTT instead of WRITE_MTT hcr command

Hi, I was going through the mr.c file as part of understanding WRITE_MTT command in the mlx4 code. I could see that instead of issuing the WRITE_MTT HCR command, in case of SRIOV, we're directly accessing the ICM space for the MTT Table, taking the ownership and updating it. We're doing this

Re: mlx4 - query regarding PF VF functionality division

is supposed to be called by VF. But from the code even the PF makes the call. So i was somewhat confused. It would be of immense help if I could understand this somehow.. On Thu, Jun 26, 2014 at 2:13 AM, Or Gerlitz or.gerl...@gmail.com wrote: On Tue, Jun 24, 2014 at 4:42 PM, Bob Biloxi iambobbil

Re: mlx4 - query regarding PF VF functionality division

...@gmail.com wrote: On Mon, Jun 23, 2014 at 12:33 PM, Bob Biloxi iambobbil...@gmail.com wrote: [...] Is there any way we can clearly separate the files that are used by PF vs the files that are used by VF in the (drivers/net/ethernet/mlx4 sub-directory)? [...] Not really, but let's take EIM approach

mlx4 - query regarding PF VF functionality division

Hi All, I was going through the Mellanox driver (mlx4) and then I had difficulty understanding which portion of code corresponds to the one executed by the PF(Physical Function Driver) and which portion of code by (Virtual Function Driver) in the SRIOV mode. My confusion is because, I was of the

DMA window vs actual allocatable DMA memory

Hi All, I am having trouble understanding DMA window and actual amount of addressable DMA memory. I hope someone explains me. Let me put my understanding and doubts here: Let's say I am writing code for an ethernet device driver in the virtualisation(hypervisor) environment. Now, if the

Re: DMA window vs actual allocatable DMA memory

...@google.com wrote: On Wed, Jun 11, 2014 at 12:23 PM, Bob Biloxi iambobbil...@gmail.com wrote: Hi All, I am having trouble understanding DMA window and actual amount of addressable DMA memory. I hope someone explains me. Let me put my understanding and doubts here: Let's say I am writing code

Re: mlx4 qp allocation

Hi Jack, Thanks so much for clarifying my understanding!! Best Regards, Bob On Thu, Feb 13, 2014 at 7:08 PM, Jack Morgenstein ja...@dev.mellanox.co.il wrote: On Thu, 13 Feb 2014 00:18:22 +0530 Bob Biloxi iambobbil...@gmail.com wrote: The VFs need to allocate the memory for Send Queue Buffer

Re: mlx4 qp allocation

them? I would really appreciate your help! Thanks so much.. Best Regards, Bob On Tue, Feb 11, 2014 at 5:01 PM, Jack Morgenstein ja...@dev.mellanox.co.il wrote: On Wed, 29 Jan 2014 15:52:09 +0530 Bob Biloxi iambobbil...@gmail.com wrote: These paths are taken based on the return value

mlx4 qp allocation

Hi, I was going through the linux/drivers/net/ethernet/mellanox/mlx4/qp.c Got a few questions. Would really appreciate if someone can clarify: In the function, mlx4_qp_alloc_icm, To allocate a QP, there are 2 paths taken: using the ALLOC_RES virtual command using the MAP_ICM These paths are