From: Kuninori Morimoto
commit 1a653aa44725 ("ASoC: core: replace aux_comp_list to ...")
tried to replace aux_comp_list to component_dev_list,
but it failed because of binding timing. Thus, Sylwester fixuped it by
commit d2e3a1358c37 ("ASoC: Fix binding and probing of auxiliary...").
One of mai
Hi Simon
> > Kuninori Morimoto (4):
> > ARM: dts: r8a7790: Tidyup Audio-DMAC channel for DVC
> > ARM: dts: r8a7791: Tidyup Audio-DMAC channel for DVC
> > ARM: dts: r8a7793: Tidyup Audio-DMAC channel for DVC
> > arm64: renesas: r8a7795: Tidyup Audio-DMAC channel for DVC
(snip)
> I have que
Hi Niklas,
thanks for your work!
On Mon, Mar 06, 2017 at 09:03:59PM +0100, Niklas Söderlund wrote:
> Enable hardware trip points by implementing the set_trips callback. The
> thermal core will take care of setting the initial trip point window and
> to update it once the driver reports a TSC have
On Mon, Mar 06, 2017 at 09:04:00PM +0100, Niklas Söderlund wrote:
> The device match data needs to be accessible outside the probe function,
> store it in the private data structure.
>
> Signed-off-by: Niklas Söderlund
Reviewed-by: Wolfram Sang
On Mon, Mar 06, 2017 at 09:04:01PM +0100, Niklas Söderlund wrote:
> To restore operation it's easiest to reinitialise all TSC. In order to
> do this the current trip window needs to be stored in the TSC structure
> so that it can be restored upon resume.
>
> Signed-off-by: Niklas Söderlund
Revie
On Mon, Mar 06, 2017 at 09:03:58PM +0100, Niklas Söderlund wrote:
> The struct rcar_gen3_thermal_tsc benefits from knowing which TSC it
> represent. Record this at probe time before this information is lost.
>
> Signed-off-by: Niklas Söderlund
See next review. I don't think this is needed.
On Mon, Mar 06, 2017 at 09:03:57PM +0100, Niklas Söderlund wrote:
> There is no point in protecting a register read with a lock. This is
> most likely a leftover from when the driver was reworked before submitted
> for upstream.
>
> Signed-off-by: Niklas Söderlund
Yes, a left over.
Reviewed-by:
From: Konstantin Kozhevnikov
The image renderer, or the distortion correction engine, is a drawing
processor with a simple instruction system capable of referencing video
capture data or data in an external memory as the 2D texture data and
performing texture mapping and drawing with respect to a
On Mon, Mar 06, 2017 at 09:03:56PM +0100, Niklas Söderlund wrote:
> If the memory resource for a TSC is unviable probe should fail not try
> to go ahead with the remaining TSC. This fix is aligned with other
> checks in probe where probe fails if they are unavailable.
>
> Signed-off-by: Niklas Söd
On Mon, Mar 06, 2017 at 09:03:55PM +0100, Niklas Söderlund wrote:
> The .thermal_init needs to be delayed a short amount of to allow for the
> TEMP register to contain something useful. If it's not delayed theses
> warnings are common during boot:
>
> thermal thermal_zone0: failed to read out ther
Hi Jonathan,
+ Neil Amstrong from Baylibre
On 05/03/2017 11:49, Jonathan Cameron wrote:
On 27/02/17 09:09, jacopo mondi wrote:
Hi Jonathan,
On 25/02/2017 17:09, Jonathan Cameron wrote:
On 24/02/17 15:05, Jacopo Mondi wrote:
Hello!
This series adds driver and documentation for Maxim max96
Hi Simon, Magnus,
This patch series adds the second Cortex-A57 CPU core, the Cortex-A57
PMU, and the Cortex-A53 L2 cache-controller, CPU, and PMU nodes on the
Renesas R-Car M3-W SoC to its DTS file.
Note that these patches add hardware description; actual enabling of the
CPU depends on th
Add a device node for the Cortex-A53 L2 cache-controller.
The L2 cache for the Cortex-A53 CPU cores is 512 KiB large (organized as
32 KiB x 16 ways).
Extracted from a patch by Takeshi Kihara in the BSP.
Signed-off-by: Geert Uytterhoeven
---
v2:
- Drop unit address and reg property for integra
From: Takeshi Kihara
This patch adds Cortex-A57 CPU cores to R8A7796 SoC for a total of
2 x Cortex-A57.
Signed-off-by: Takeshi Kihara
[geert: Rebased]
Signed-off-by: Geert Uytterhoeven
---
v2:
- No changes.
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 20 ++--
1 file chang
This patch adds Cortex-A53 CPU cores of R8A7796 SoC, and sets a total of
6 cores (2 x Cortex-A57 + 4 x Cortex-A53).
Based on a patch by Takeshi Kihara in the BSP.
Signed-off-by: Geert Uytterhoeven
---
v2:
- No changes.
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 46
Enable the performance monitor unit for the Cortex-A53 cores on the
R8A7796 SoC.
Extracted from a patch by Takeshi Kihara in the BSP.
Signed-off-by: Geert Uytterhoeven
---
v2:
- New.
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a
On Mon, Mar 6, 2017 at 9:03 PM, Niklas Söderlund
wrote:
> The struct rcar_gen3_thermal_tsc benefits from knowing which TSC it
> represent. Record this at probe time before this information is lost.
>
> Signed-off-by: Niklas Söderlund
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
From: Takeshi Kihara
Enable the performance monitor unit for the Cortex-A57 cores on the
R8A7796 SoC.
Signed-off-by: Takeshi Kihara
Signed-off-by: Geert Uytterhoeven
---
v2:
- New.
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/
Add support for allocating physically contiguous DMA buffers on arm64
systems with an IOMMU. This can be useful when two or more devices
with different memory requirements are involved in buffer sharing.
Note that as this uses the CMA allocator, setting the
DMA_ATTR_FORCE_CONTIGUOUS attribute has
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
topic/renesas-overlays
head: b4a161ee9ee38a2396d64d3ed345341410b71ac1
commit: 5ec47e147859cf571034795c7ff5b01013a40a89 [17/88] of: changesets:
Introduce changeset helper methods
config: i386-tinyconfig (attached
On Mon, Mar 6, 2017 at 9:04 PM, Niklas Söderlund
wrote:
> The device match data needs to be accessible outside the probe function,
> store it in the private data structure.
>
> Signed-off-by: Niklas Söderlund
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Hi Niklas,
On Mon, Mar 6, 2017 at 9:03 PM, Niklas Söderlund
wrote:
> The struct rcar_gen3_thermal_tsc benefits from knowing which TSC it
> represent. Record this at probe time before this information is lost.
>
> Signed-off-by: Niklas Söderlund
> ---
> drivers/thermal/rcar_gen3_thermal.c | 5 ++
On Tue, Dec 13, 2016 at 7:38 PM, Kieran Bingham
wrote:
> The following changes since commit 69973b830859bc6529a7a0468ba0d80ee5117826:
>
> Linux 4.9 (2016-12-11 11:17:54 -0800)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/kbingham/rcar.git
> vsp
Hi Kieran,
On Mon, Feb 13, 2017 at 11:03 AM, Geert Uytterhoeven
wrote:
> On Fri, Feb 10, 2017 at 9:36 PM, Kieran Bingham
> wrote:
>> The following changes since commit 0c3b6ad6a559391f367879fd4be6d2d85625bd5a:
>>
>> v4l: vsp1: Remove redundant context variables (Tue, 1 Nov 2016 15:01:02
>> +
and (b) branches with driver code submitted
or planned for submission to maintainers into the development branch of
Simon Horman's renesas.git tree.
Today's version is based on renesas-devel-20170307-v4.11-rc1.
Included branches with driver code:
- clk-renesas-for-v4.12
On Mon, Mar 6, 2017 at 9:03 PM, Niklas Söderlund
wrote:
> Enable hardware trip points by implementing the set_trips callback. The
> thermal core will take care of setting the initial trip point window and
> to update it once the driver reports a TSC have moved outside it.
has moved
> The interru
On Mon, Mar 6, 2017 at 9:03 PM, Niklas Söderlund
wrote:
> The .thermal_init needs to be delayed a short amount of to allow for the
of ... (thx Sergei ;-)
> TEMP register to contain something useful. If it's not delayed theses
these
> warnings are common during boot:
>
> thermal thermal_zone0:
On Mon, Mar 6, 2017 at 9:04 PM, Niklas Söderlund
wrote:
> To restore operation it's easiest to reinitialise all TSC. In order to
TSCs
> do this the current trip window needs to be stored in the TSC structure
> so that it can be restored upon resume.
>
> Signed-off-by: Niklas Söderlund
Reviewed
On Mon, Mar 6, 2017 at 9:03 PM, Niklas Söderlund
wrote:
> If the memory resource for a TSC is unviable probe should fail not try
unavailable
> to go ahead with the remaining TSC. This fix is aligned with other
TSCs
> checks in probe where probe fails if they are unavailable.
>
> Signed-off-by:
On Mon, Mar 6, 2017 at 9:03 PM, Niklas Söderlund
wrote:
> There is no point in protecting a register read with a lock. This is
> most likely a leftover from when the driver was reworked before submitted
> for upstream.
>
> Signed-off-by: Niklas Söderlund
Reviewed-by: Geert Uytterhoeven
Gr{oetj
Hi Sergei,
On Tue, Mar 7, 2017 at 10:27 AM, Sergei Shtylyov
wrote:
> On 3/6/2017 7:58 PM, Geert Uytterhoeven wrote:
>> Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
>> so it can be power managed using that clock in the future.
>>
>> Note that currently the GIC-400 driver
On 2017-03-06 21:03:55 +0100, Niklas Söderlund wrote:
> The .thermal_init needs to be delayed a short amount of to allow for the
> TEMP register to contain something useful. If it's not delayed theses
> warnings are common during boot:
>
> thermal thermal_zone0: failed to read out thermal zone (-5
HI Sergei,
Thanks will update for v2.
On 2017-03-07 12:49:25 +0300, Sergei Shtylyov wrote:
> On 3/6/2017 11:03 PM, Niklas Söderlund wrote:
>
> > The .thermal_init needs to be delayed a short amount of to allow for the
>
>Amount of what? :-)
>
> > TEMP register to contain something useful.
On 3/6/2017 11:03 PM, Niklas Söderlund wrote:
The .thermal_init needs to be delayed a short amount of to allow for the
Amount of what? :-)
TEMP register to contain something useful. If it's not delayed theses
These.
warnings are common during boot:
thermal thermal_zone0: failed to
From: Kuninori Morimoto
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends
From: Kuninori Morimoto
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends
Hello!
On 3/6/2017 7:58 PM, Geert Uytterhoeven wrote:
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled a
From: Kuninori Morimoto
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1.
Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0.
Because of this, current platform board (using SRC/DVC/SSI)
Playback/Capture both will use same Audio-DMAC0
(but it depends
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