Hi Geert,
Thanks for the feedback.
> -Original Message-
> From: devicetree-ow...@vger.kernel.org ow...@vger.kernel.org> On Behalf Of Geert Uytterhoeven
> Sent: 03 August 2018 10:10
> To: Biju Das
> Cc: Rob Herring ; Mark Rutland
> ; Simon Horman ; Magnus
> Damm ; Linux-Renesas
Hi Geert,
> Subject: Re: [PATCH v2 1/5] gpio: rcar: Add GPIO hole support
> On Thu, Aug 2, 2018 at 4:17 PM Biju Das wrote:
> > GPIO hole is present in RZ/G1C SoC. Valid GPIO pins on bank3 are in
> > the range GP3_0 to GP3_16 and GP3_27 to GP3_29. The GPIO pins
> between
> > GP3_17 to GP3_26 are
On 08/03/2018 12:48 PM, Wolfram Sang wrote:
>
>>> Wolfram: do you like i2c slaves connected to multiple buses?
>
> 'Like' would be an exaggeration, but if they are connected to multiple
> busses, this might be a reason to describe that. People could then in
> userspace bind/unbind to the bus
On Mon, Jul 2, 2018 at 9:01 PM Rob Landley wrote:
> On 07/02/2018 04:50 AM, Geert Uytterhoeven wrote:
> > On Sun, Jul 1, 2018 at 7:27 PM Rob Landley wrote:
> >> On 06/29/2018 09:25 AM, Geert Uytterhoeven wrote:
> >>> The RX FIFO timer may be armed when the port is shut down, hence the
> >>>
> > Wolfram: do you like i2c slaves connected to multiple buses?
'Like' would be an exaggeration, but if they are connected to multiple
busses, this might be a reason to describe that. People could then in
userspace bind/unbind to the bus they want? Not pretty, but there might
be reasons for
Hi Biju,
On Thu, Aug 2, 2018 at 4:17 PM Biju Das wrote:
> Describe GPIO blocks in the R8A77470 device tree.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Thanks for your patch!
Reviewed-by: Geert Uytterhoeven
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++
Hi Biju,
On Thu, Aug 2, 2018 at 5:03 PM Biju Das wrote:
> Add RZ/G2M (R8A774A1) Clock Pulse Generator / Module Standby and Software
> Reset support.
>
> Based on the Table 8.2b of "RZ/G Series, 2nd Generation User's Manual:
> Hardware ((Rev. 0.61, June 12, 2018)".
>
> Signed-off-by: Biju Das
>
Hi Biju,
On Thu, Aug 2, 2018 at 5:02 PM Biju Das wrote:
> Add all RZ/G2M Clock Pulse Generator Core Clock Outputs, as listed in
> Table 8.2b ("List of Clocks [RZ/G2M]") of the RZ/G2M Hardware User's
> Manual.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
> Reviewed-by: Geert
On Thu, Aug 2, 2018 at 4:17 PM Biju Das wrote:
> Update the DT bindings documentation with the optional gpio-reserved-ranges
> properties.
>
> Signed-off-by: Biju Das
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert
Hi Biju,
On Thu, Aug 2, 2018 at 4:17 PM Biju Das wrote:
> GPIO hole is present in RZ/G1C SoC. Valid GPIO pins on bank3 are in the
> range GP3_0 to GP3_16 and GP3_27 to GP3_29. The GPIO pins between GP3_17
> to GP3_26 are unused. Add support for handling unused GPIO's.
>
> Signed-off-by: Biju Das
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