From: Hoan Nguyen An
Signed-off-by: Hoan Nguyen An
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 9c4f405..bef519f 100644
---
From: Hoan Nguyen An
These patches add fdp1 device support for M3-N r8a77965 board.
Please review for me, thank you!
Hoan Nguyen An (2):
arm64: dts: r8a77965: add FDP1 device nodes
clk: renesas: r8a77965: Add FDP clock
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 10 ++
From: Hoan Nguyen An
Signed-off-by: Hoan Nguyen An
---
drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c
b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index 312f9fe..d0847dc 100644
---
Hi Eugeniu,
On 23/08/18 18:14, Eugeniu Rosca wrote:
> Dear reviewers,
>
> On Thu, Aug 23, 2018 at 11:01:46AM +0200, Geert Uytterhoeven wrote:
>> Hi Sergei,
>>
>> On Thu, Aug 23, 2018 at 10:56 AM Sergei Shtylyov
>> wrote:
>>> On 8/23/2018 11:52 AM, Geert Uytterhoeven wrote:
>> According to
Dear reviewers,
On Thu, Aug 23, 2018 at 11:01:46AM +0200, Geert Uytterhoeven wrote:
> Hi Sergei,
>
> On Thu, Aug 23, 2018 at 10:56 AM Sergei Shtylyov
> wrote:
> > On 8/23/2018 11:52 AM, Geert Uytterhoeven wrote:
> > >>> According to R-Car Gen3 HW manual rev1.00, R-Car M3-N has two CAN
> > >>>
Define the Condor/V3HSK board dependent parts of the DU and LVDS device
nodes. Also add the device nodes for Thine THC63LVD1024 LVDS decoder and
Analog Devices ADV7511W HDMI transmitter...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
On 08/22/2018 12:55 PM, Simon Horman wrote:
>>> Define the Condor/V3HSK board dependent parts of the DU and LVDS device
>>> nodes. Also add the device nodes for Thine THC63LVD1024 LVDS decoder and
>>> Analog Devices ADV7511W HDMI transmitter...
>>>
>>> Based on the original (and large) patch by
From: Chris Paterson
Add the device nodes for both RZ/G2M CAN channels.
Signed-off-by: Chris Paterson
Reviewed-by: Biju Das
---
This patch depends on:
https://lkml.org/lkml/2018/8/23/1049
https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30550.html
Add GPIO device nodes to the DT of the r8a774a1 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
This patch depends on:
https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30549.html
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 120 ++
1
This patch adds pinctrl device node for R8A774A1 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
This patch depends on:
https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30339.html
https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30539.html
Add FCPF and FCPV instances to the r8a774a1 dtsi, similarly
to what was done for the r8a7796 with commits 41dbbf0c5 ("arm64: dts:
r8a7796: Add FCPF and FCPV instances"), 69490bc96 ("arm64: dts:
renesas: r8a7796: Point FDP1 via FCPF to IPMMU-VI0"), and cef942d0b
("arm64: dts: renesas: r8a7796:
This patch adds PWM[0123456] device nodes to the RZ/G2M (a.k.a R8A774A1)
device tree.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 70 +++
1 file changed, 70 insertions(+)
diff --git
From: Biju Das
Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1).
This work is based on similar work done on the R8A7796 SoC
by Kuninori Morimoto .
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 275 ++
1
From: Biju Das
This patch adds definitions for L2 cache for the Cortex-A53 CPU
cores (512 KiB in size, organized as 32 KiB x 16 ways), adds
Cortex-A53 CPU cores (setting a total of 6 cores, 2 x Cortex-A57
+ 4 x Cortex-A53), and finally enables the performance monitor
unit for the Cortex-A53
From: Biju Das
Add the device nodes for all MSIOF SPI controllers on RZ/G2M SoC.
Based on several similar patches of the R8A7796 device tree
by Geert Uytterhoeven
and Simon Horman .
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 62
Add r8a774a1 IPMMU nodes.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 73 +++
1 file changed, 73 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
From: Biju Das
Add thermal support for R8A774A1 (RZ/G2M) SoC.
Based on the work done for r8a7796 SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 60 +++
1 file changed, 60 insertions(+)
diff --git
Add SDHI nodes to the DT of the r8a774a1 SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 48 +++
1 file changed, 48 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
From: Biju Das
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774a1 device tree.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 142 ++
1 file changed, 142 insertions(+)
Dear All,
This series adds SDHI, I2C, IIC, Thermal, IPMMU, MSIOF, A53, PWM,
Audio and FCP support to the r8a774a1 SoC dtsi.
There is a dependency with:
https://www.mail-archive.com/linux-renesas-soc@vger.kernel.org/msg30528.html
Thanks,
Fab
Biju Das (5):
arm64: dts: renesas: r8a774a1: Add
On 08/23/2018 01:43 PM, Ulf Hansson wrote:
>> The DM_CM_RST register actually has bits 0-31 defaulting to 1s and bits
>> 32-63 defaulting to 0s -- fix off-by-one in #define RST_RESERVED_BITS.
>>
>> Signed-off-by: Sergei Shtylyov
>
> Reviewed-by: Wolfram Sang
>
>
On 22 August 2018 at 22:03, Sergei Shtylyov
wrote:
> On 08/22/2018 10:45 PM, Wolfram Sang wrote:
>
> The DM_CM_RST register actually has bits 0-31 defaulting to 1s and bits
> 32-63 defaulting to 0s -- fix off-by-one in #define RST_RESERVED_BITS.
>
> Signed-off-by: Sergei Shtylyov
On 22 August 2018 at 22:07, Sergei Shtylyov
wrote:
> On 08/22/2018 10:37 PM, Wolfram Sang wrote:
>
>>> I have encountered an interrupt storm during the eMMC chip probing (and
>>> the chip finally didn't get detected). It turned out that U-Boot left
>>> the SDHI DMA interrupts enabled while the
Hi Laurent,
On Sun, Aug 19, 2018 at 9:44 PM Laurent Pinchart
wrote:
> The Salvator-X and XS boards have a 4 lines DIP switch and 3 push
> buttons connected to SoC GPIOs, meant to be used as general-purpose test
> keys. Add a corresponding node in DT, mapping (semi-randomly) the DIP
> switch to
Hi Simon,
On Wed, Aug 22, 2018 at 12:30 PM Simon Horman wrote:
> On Sun, Aug 19, 2018 at 10:44:55PM +0300, Laurent Pinchart wrote:
> > The Salvator-X and XS boards have a 4 lines DIP switch and 3 push
> > buttons connected to SoC GPIOs, meant to be used as general-purpose test
> > keys. Add a
Add a device node for the Watchdog Timer (RWDT) controller on the Renesas
RZ/G2M (r8a774a1) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
Add support for the Interrupt Controller for External Devices
(INTC-EX) on RZ/G2M.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
From: Fabrizio Castro
This patch adds the SoC specific part of the Ethernet AVB
device tree node.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 45 +++
1 file changed, 45 insertions(+)
diff --git
From: Fabrizio Castro
Add the device nodes for all RZ/G2M SCIF and HSCIF serial ports,
incl. clocks, power domains and DMAs.
According to the HW user manual, SCIF[015] and HSCIF[012] are
connected to both SYS-DMAC1 and SYS-DMAC2, while SCIF[34] and
HSCIF[34] are connected to SYS-DMAC0.
Add sys-dmac[0-2] device nodes for RZ/G2M (r8a774a1) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 102 ++
1 file changed, 102 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
This patch series aims to add support for SYS-DMAC/INTC-EX/SCIF/HSCIF/
EAVB/RWDT on RZ/G2M SoC dtsi.
THis patch series based on renesas-devel-20180822-v4.18.
Biju Das (3):
arm64: dts: renesas: r8a774a1: Add SYS-DMAC controller nodes
arm64: dts: renesas: r8a774a1: Add INTC-EX device node
Hi Sergei,
On Thu, Aug 23, 2018 at 10:56 AM Sergei Shtylyov
wrote:
> On 8/23/2018 11:52 AM, Geert Uytterhoeven wrote:
> >>> According to R-Car Gen3 HW manual rev1.00, R-Car M3-N has two CAN
> >>> interfaces, similar to H3, M3-W and other SoCs from the same family.
> >>>
> >>> Add CAN placeholder
On 8/23/2018 11:52 AM, Geert Uytterhoeven wrote:
According to R-Car Gen3 HW manual rev1.00, R-Car M3-N has two CAN
interfaces, similar to H3, M3-W and other SoCs from the same family.
Add CAN placeholder nodes to avoid below DTC errors:
Error: arch/arm64/boot/dts/renesas/ulcb-kf.dtsi:19.1-6
On Fri, Aug 17, 2018 at 3:53 PM Kieran Bingham
wrote:
> On 12/08/18 14:31, Eugeniu Rosca wrote:
> > According to R-Car Gen3 HW manual rev1.00, R-Car M3-N has two CAN
> > interfaces, similar to H3, M3-W and other SoCs from the same family.
> >
> > Add CAN placeholder nodes to avoid below DTC
Hi Uli,
(with Khiem's address fixed (hopefully))
On Thu, Aug 23, 2018 at 10:22 AM Geert Uytterhoeven
wrote:
> On Fri, Aug 17, 2018 at 3:19 PM Ulrich Hecht wrote:
> > This series adds CPU idle support for H3 and M3-W. It's a straight
> > up-port from the BSP.
>
> Thanks for your series!
>
> >
Hi Uli,
On Fri, Aug 17, 2018 at 3:19 PM Ulrich Hecht wrote:
> This series adds CPU idle support for H3 and M3-W. It's a straight
> up-port from the BSP.
Thanks for your series!
> The part that disables cpuidle for the CA53 cores on M3ULCB is a bit
> dodgy. Is it a valid assumption that all
This patch adds DU pins, groups and function for the R8A77990 (E3) SoC.
Signed-off-by: Laurent Pinchart
---
drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 101 ++
1 file changed, 101 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
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