The "compatible" property description contradicts even the example given:
it only says that there must be a single value while the example has the
fallback value too -- which makes much more sense. Moreover, the generic
property value is misdocumented as being R-Car (and RZ/G1) specific...
Fixes:
Add I2C4 support to RZ/G1C (a.k.a. r8a77470) SoC specific
device tree.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
arch/arm/boot/dts/r8a77470.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
From: Biju Das
Document i2c Device Tree support for RZ/G1N (R8A7744) SoC, which is
compatible with R-Car Gen2 SoC family.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Biju Das
Document i2c Device Tree support for RZ/G1N (R8A7744) SoC, which is
compatible with R-Car Gen2 SoC family.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Although the I2C IP found in the RZ/G1C is not exactly the same
as the one found in the R-Car Gen2 family or R-Car Gen3 family,
it can still be considered as compatible with R-Car Gen2 from
a software perpective.
This patch therefore documents the SoC specific compatible string,
and the
Dear All,
this series documents the I2C controllers found in the RZ/G1C and
RZ/G1N, and also adds I2C4 support to the RZ/G1C SoC specific dtsi.
Thanks,
Fab
Biju Das (2):
dt-bindings: i2c: rcar: Document r8a7744 support
dt-bindings: i2c: sh_mobile: Document r8a7744 support
Fabrizio Castro
On Fri, Sep 21, 2018 at 08:49:03PM +0900, Nguyen An Hoan wrote:
> @@ -66,8 +66,15 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
> /* Locate the DRM bridge from the encoder DT node. */
> bridge = of_drm_find_bridge(enc_node);
> if (!bridge) {
> +#if
On Fri, Sep 21, 2018 at 08:49:02PM +0900, Nguyen An Hoan wrote:
> From: Hoan Nguyen An
>
> Skip return EPROBE_DEFER when DRM_RCAR_DW_HDMI is disabled in case HDMI
> initialize.
> At this time, the rcar-du driver not be able to successfully initialize
> if disable DRM_RCAR_DW_HDMI (rcar_du_probe
Document APMU and SMP enable method for RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/power/renesas,apmu.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.txt
Hello Wolfram,
Thank you for your feedback!
> -Original Message-
> From: Wolfram Sang
> Sent: 21 September 2018 16:48
> To: Geert Uytterhoeven
> Cc: Fabrizio Castro ; Laurent Pinchart
> ; Geert Uytterhoeven
> ; Linus Walleij ;
> Linux-Renesas ; open
> list:GPIO SUBSYSTEM ; Simon
Hi Sergei,
Thanks for the feedback.
> Subject: Re: [PATCH net-next] dt-bindings: net: ravb: Add support for
> r8a7744 SoC
>
> Hello!
>
> On 09/21/2018 05:25 PM, Biju Das wrote:
>
> > Document RZ/G1N (R8A7744) SoC bindings.
> >
> > Signed-off-by: Biju Das
> > Reviewed-by: Fabrizio Castro
>
>
> > 2) Specify SH_PFC_PIN_CFG_IO_VOLTAGE for every line that belongs to
> > the interface, keep the SD card pin groups as specified by this
> > patch, map all of the pins to the same bit in the POC register (as
> > per pin_to_pocctrl is concerned), and the board specific device tree
> >
Renesas RZ/G1N (R8A7744) SoC GPIO blocks are identical to the R-Car Gen2
family. Add support for its GPIO controllers.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
ostm module clocks to be registers early in boot.
Signed-off-by: Chris Brandt
---
drivers/clk/renesas/r7s9210-cpg-mssr.c | 141 +
1 file changed, 90 insertions(+), 51 deletions(-)
diff
Add support for SoCs that need to register core and module clocks early in
order to use OF drivers that exclusively use macros such as
TIMER_OF_DECLARE.
Signed-off-by: Chris Brandt
---
drivers/clk/renesas/renesas-cpg-mssr.c | 106 ++---
The OSTM timer driver for RZ/A2 uses TIMER_OF_DECLARE which requires the
ostm module clocks to be registers early in boot.
This series add early clock support to cpg-mssr
Here are some notes I took:
* Switched to using
of_iomap(cpg_np, 0)
instead of
platform_get_resource(pdev,
RZ/G1N (R8A7744) SoC also has the R-Car gen2 compatible SCIF, SCIFA,
SCIFB, and HSCIF ports, so document the SoC specific bindings.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 4
1 file changed, 4 insertions(+)
PCIe is not populated by default on iWave RZ/G1N board. RZ/G1N board
is almost identical to RZ/G1M. In order to reuse the common dtsi for
both the boards, it is required to move pcie node from common dtsi
to board specific dts.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
---
This patch set is based on the linux-phy / next branch (the commit id is
53706a1168631fa5bf2e6d47de4647ea7e69f270).
Since all R-Car Gen3 SoCs have dedicated otg pins in fact,
the previous code was not good to handle it. So, this patch set
changes the design for all R-Car Gen3 SoCs.
Yoshihiro
This patch changes a condition about dr_mode. If a device node has
any dr_mode ("host", "peripheral" or "otg"), this driver allows to
set "is_otg_channel" to true. Also, this patch keeps the dr_mode
value for future use.
Signed-off-by: Yoshihiro Shimoda
---
Add SoC specific device tree definitions for the SDHI2 interface.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
arch/arm/boot/dts/r8a77470.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
Add uSD card support to the iwg23s single board computer powered
by the RZ/G1C SoC (a.k.a. r8a77470).
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
Hello Simon,
this patch can only be taken after patch "pinctrl: sh-pfc: r8a77470:
Add SDHI2 voltage switch" from this series appears on
Add SH_PFC_PIN_CFG_IO_VOLTAGE definition for the SDHI2 pins
capable of switching voltage. Please note that with the
RZ/G1C only 1 bit of the POC Control Register is used to
control each interface.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
drivers/pinctrl/sh-pfc/pfc-r8a77470.c |
Even if a board doesn't have otg pins connection, this hardware can
change the role by a register setting. So, this patch adds
"is_otg_channel" for it.
Signed-off-by: Yoshihiro Shimoda
---
drivers/phy/renesas/phy-rcar-gen3-usb2.c | 22 +-
1 file changed, 17 insertions(+), 5
Dear All,
this series adds SDHI2 support to the iwg23s.
The RZ/G1C (the SoC powering the iwg23s) is slightly different from
the other R-Car and RZ/G1 devices, in the sense that this device uses
only one bit of the POC Control Register to control the voltage of the
entire interface, as opposed to
If uses_otg_pins is set to false, this driver 1) should disable otg
related interruptions, and 2) should not get ID pin signal, to avoid
unexpected behaviors. So, this patch adds conditions for it.
Signed-off-by: Yoshihiro Shimoda
---
drivers/phy/renesas/phy-rcar-gen3-usb2.c | 5 -
1 file
This patch fixes and issue that the vbus_ctrl is disabled by
rcar_gen3_init_from_a_peri_to_a_host(), so a usb host cannot
supply the vbus.
Note that this condition will exit when the otg irq happens
even if we don't apply this patch.
Fixes: 9bb86777fb71 ("phy: rcar-gen3-usb2: add sysfs for usb
Document SDHI support for the RZ/G1C (a.k.a. R8A77470) SoC.
Signed-off-by: Fabrizio Castro
Reviewed-by: Biju Das
---
Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
Hello Geert,
Thank you for your feedback!
> Subject: Re: [PATCH 4/5] pinctrl: sh-pfc: r8a77470: Add SDHI2 pin groups
>
> Hi Fabrizio,
>
> CC wolfram
>
> On Wed, Sep 19, 2018 at 12:19 PM Fabrizio Castro
> wrote:
> > Although this patch is pretty much standard, I would like to start a
> >
From: Hoan Nguyen An
Skip return EPROBE_DEFER when DRM_RCAR_DW_HDMI is disabled in case HDMI
initialize.
At this time, the rcar-du driver not be able to successfully initialize
if disable DRM_RCAR_DW_HDMI (rcar_du_probe return error),
so can not use other features such as RGB Analog, this patch
From: Hoan Nguyen An
Skip return EPROBE_DEFER when DRM_RCAR_DW_HDMI is disabled in case HDMI
initialize.
At this time, the rcar-du driver not be able to successfully initialize
if disable DRM_RCAR_DW_HDMI (rcar_du_probe return error),
so can not use other features such as RGB Analog, this patch
On 9/21/2018 10:35 AM, Simon Horman wrote:
Describe TPU in the R8A779{7|8}0 device trees.
Based on the original (and large) patches by Vladimir Barinov.
Signed-off-by: Vladimir Barinov
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-20180919-v4.19-rc4' branch of
Hi Simon-san,
> From: Simon Horman, Sent: Friday, September 21, 2018 4:37 PM
>
> On Thu, Sep 20, 2018 at 05:55:00AM +, Yoshihiro Shimoda wrote:
> > Hi Simon-san,
> >
> > > From: Simon Horman, Sent: Wednesday, September 5, 2018 7:33 PM
> > >
> > > On Fri, Aug 31, 2018 at 05:20:51PM +0900,
R-Car Gen3 SoCs need to enable/deassert clocks/resets of both usb 2.0
host (included phy) and peripheral. Otherwise, other side device
cannot work correctly. So, this patch revises properties of clocks
and resets. After that, each device driver can enable/deassert
clocks/resets by its self.
Hi,
I would like to stop accepting non-bug-fix patches for v4.20 on Wednesday
26th September (next week)
and get the last pull requests posted by the end of next week.
This is in order for them to be sent before the release of v4.19-rc6, the
deadline set by the ARM SoC maintainers. As patches
On Thu, Sep 20, 2018 at 05:55:00AM +, Yoshihiro Shimoda wrote:
> Hi Simon-san,
>
> > From: Simon Horman, Sent: Wednesday, September 5, 2018 7:33 PM
> >
> > On Fri, Aug 31, 2018 at 05:20:51PM +0900, Yoshihiro Shimoda wrote:
> > > R-Car Gen3 needs to enable/deassert clocks/resets of both usb
On Wed, Sep 19, 2018 at 11:21:49PM +0300, Sergei Shtylyov wrote:
> On 09/19/2018 11:02 PM, Sergei Shtylyov wrote:
>
> > Describe TPU in the R8A779{7|8}0 device trees.
> >
> > Based on the original (and large) patches by Vladimir Barinov.
> >
> > Signed-off-by: Vladimir Barinov
> >
On Wed, Sep 19, 2018 at 09:10:40PM +0300, Sergei Shtylyov wrote:
> The TPU0 clock wasn't present in the original R8A77970 patch by Daisuke
> Matsushita, it was added in a later BSP version...
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
>
On Wed, Sep 19, 2018 at 04:50:42PM +0200, Geert Uytterhoeven wrote:
> PLL0 runs at 4.8 GHz, i.e. EXTAL x 100.
>
> Signed-off-by: Geert Uytterhoeven
Reviewed-by: Simon Horman
> ---
> To be queued in clk-renesas-for-v4.20.
>
> drivers/clk/renesas/r8a77990-cpg-mssr.c | 4 ++--
> 1 file
Hi Fabrizio, Hi Geert,
On Wed, Sep 19, 2018 at 10:21:13AM +, Fabrizio Castro wrote:
> Hello Geert,
>
> Thank you for your feedback.
>
> > Subject: Re: [PATCH 2/2] ARM: dts: r8a77470: Add APMU node and second CPU
> > core
> >
> > Perhaps "ARM: dts: r8a77470: Add SMP support"?
>
> Your
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