Hi Sergei,
Thanks for keep working on this patch.
On 2018-10-10 22:18:11 +0300, Sergei Shtylyov wrote:
> Describe THS/CIVM in the R8A77980 device trees.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-20181008-v4.19-rc7' tag of Simon
> Horman's 'renesas.gi
Describe THS/CIVM in the R8A77980 device trees.
Signed-off-by: Sergei Shtylyov
---
This patch is against the 'renesas-devel-20181008-v4.19-rc7' tag of Simon
Horman's 'renesas.git' repo.
Changes in version 2:
- renamed the thermal device node label;
- renamed the thermal zone nodes;
- added the
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git
sh-pfc-for-v4.20
head: ef26d96023a4c34b1bcc4294f570df2b63a1b952
commit: 4e53b5004745ef26a37bca4933b2d3ea71313f2a [24/25] pinctrl: renesas:
Renesas RZ/N1 pinctrl driver
coccinelle warnings: (new ones prefixed by
From: kbuild test robot
drivers/pinctrl/pinctrl-rzn1.c:935:3-8: No need to set .owner here. The core
will do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Fixes: 4e53b5004745 ("pinctrl: renesas: Renesas R
The SDHI/MMC controller in the RZ/A2 is almost the same as R-Car gen3, but
with some minor differences.
Signed-off-by: Chris Brandt
---
v3:
* Removed extra space in Kconfig
* Removed unneeded parentheses
v2:
* Made comment clearer
---
drivers/mmc/host/Kconfig | 5 +++--
Add SDHI clocks for RZ/A2
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
drivers/clk/renesas/r7s9210-cpg-mssr.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c
b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index 5135f13ec628..9056da15
Document support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
v2:
* Documented that R7S9210 has 2 clocks
---
Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/de
Basically the same HW block that was used in R-Car Gen 3 is used in
RZ/A2 (with only a couple small differences).
Not sure if you're going to like the Kconfig change or not.
Chris Brandt (3):
clk: renesas: r7s9210: Add SDHI clocks
mmc: renesas_sdhi_internal_dmac: Add R7S9210 support
dt-bind
On Wednesday, October 10, 2018 1, Sergei Shtylyov wrote:
> > config MMC_SDHI_INTERNAL_DMAC
> > tristate "DMA for SDHI SD/SDIO controllers using on-chip bus
> mastering"
> > - depends on ARM64 || COMPILE_TEST
> > + depends on ARM64 || ARCH_R7S9210 || COMPILE_TEST
>
>Double space hardl
Hello!
On 10/10/2018 03:37 PM, Chris Brandt wrote:
> The SDHI/MMC controller in the RZ/A2 is almost the same as R-Car gen3, but
> with some minor differences.
>
> Signed-off-by: Chris Brandt
> ---
> v2:
> * Made comment clearer
> ---
> drivers/mmc/host/Kconfig | 5 +++--
On Tue, Oct 9, 2018 at 9:39 AM Yoshihiro Kaneko wrote:
> This patch adds DMA properties to the MSIOF device nodes of R8A77990 SoC.
>
> Signed-off-by: Yoshihiro Kaneko
Reviewed-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven
on Ebisu using a 25LC040 EEPROM
https://git.kernel.org/pub/scm/li
Add SDHI clocks for RZ/A2
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
drivers/clk/renesas/r7s9210-cpg-mssr.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c
b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index 5135f13ec628..9056da15
Basically the same HW block that was used in R-Car Gen 3 is used in
RZ/A2 (with only a couple small differences).
Not sure if you're going to like the Kconfig change or not.
Chris Brandt (3):
clk: renesas: r7s9210: Add SDHI clocks
mmc: renesas_sdhi_internal_dmac: Add R7S9210 support
dt-bind
The SDHI/MMC controller in the RZ/A2 is almost the same as R-Car gen3, but
with some minor differences.
Signed-off-by: Chris Brandt
---
v2:
* Made comment clearer
---
drivers/mmc/host/Kconfig | 5 +++--
drivers/mmc/host/renesas_sdhi_internal_dmac.c | 28 +++
Document support for the RZ/A2 (R7S9210) SoC.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
---
v2:
* Documented that R7S9210 has 2 clocks
---
Documentation/devicetree/bindings/mmc/tmio_mmc.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/de
> I will move this patch back to the top of the reset series as it would
> IMHO create the least amount of code churn. Another option is to merge
> this version now and move it once the reset series is accepted.
Less code churn sounds good to me.
Thanks, Niklas!
signature.asc
Description: P
On 10/10/2018 01:57 PM, Niklas Söderlund wrote:
>> Describe THS/CIVM in the R8A77980 device trees.
>>
>> Signed-off-by: Sergei Shtylyov
>>
>> ---
>> This patch is against the 'renesas-devel-20181008-v4.19-rc7' tag of Simon
>> Horman's 'renesas.git' repo.
>>
>> The thermal driver/bindings patches
Hi Wolfram,
Thanks for our feedback.
On 2018-10-10 01:53:58 +0200, Wolfram Sang wrote:
> Hi Niklas,
>
> > There are already checks for TMIO_MMC_MIN_RCAR2 inside
> > tmio_mmc_host_probe(), but I agree with you it would be good if instead
> > of adding to that start to move Renesas specific code
Hi Biju,
On Wed, Oct 10, 2018 at 11:50 AM Biju Das wrote:
> > > Note:-
> > >
> > > For R-Car M3-W board, inconsistency-check and nanosleep tests are
> > working fine.
> > >
> > > However there is a failure with clocksource_switch "asynchronous" test.
> > > The inconsistency-check is failing f
Hi Geert,
On Wednesday, October 10, 2018, Geert Uytterhoeven wrote:
> Thanks for your patch!
Thanks for your review!
> > +/* RZ/A2 does not have this bit (not safe to set it) */
>
> This comment confused me, as SDHI_INTERNAL_DMAC_ADRR_MODE_FIXED is
> set for RZ/A2.
>
> s/this bit/the ADDR_MOD
Hi Sergei,
Thanks for your work.
On 2018-10-09 22:37:47 +0300, Sergei Shtylyov wrote:
> Describe THS/CIVM in the R8A77980 device trees.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-20181008-v4.19-rc7' tag of Simon
> Horman's 'renesas.git' repo.
>
> The
Hi Sergei,
On 2018-10-10 13:47:36 +0300, Sergei Shtylyov wrote:
> On 10/10/2018 11:36 AM, Simon Horman wrote:
>
> >> Describe THS/CIVM in the R8A77980 device trees.
> >>
> >> Signed-off-by: Sergei Shtylyov
> >>
> >> ---
> >> This patch is against the 'renesas-devel-20181008-v4.19-rc7' tag of Sim
On 10/10/2018 11:36 AM, Simon Horman wrote:
>> Describe THS/CIVM in the R8A77980 device trees.
>>
>> Signed-off-by: Sergei Shtylyov
>>
>> ---
>> This patch is against the 'renesas-devel-20181008-v4.19-rc7' tag of Simon
>> Horman's 'renesas.git' repo.
>>
>> The thermal driver/bindings patches have
Hi Sergei,
Thanks for your patch.
On 2018-10-09 22:11:51 +0300, Sergei Shtylyov wrote:
> Add the R-Car V3H (R8A77980) SoC support to the R-Car gen3 thermal driver.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Niklas Söderlund
>
> ---
> drivers/thermal/rcar_gen3_thermal.c |1 +
> 1 f
Hi Sergei,
Thanks for your work.
On 2018-10-09 22:10:14 +0300, Sergei Shtylyov wrote:
> Document the R-Car V3H (R8A77980) SoC in the Renesas R-Car gen3 thermal
> bindings.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Niklas Söderlund
>
> ---
> Documentation/devicetree/bindings/thermal/r
Hi Geert,
Thanks for the feedback.
> Subject: Re: [PATCH] clocksource/drivers/sh_cmt: wait for CMCNT on init
>
> > What should we do next for fixing this error? Adding unconditional delays
> also fixes the issue.
>
> I'd add 50 µs delays after the three register writes.
It make sense to me as w
Hello Geert,
Thank you for your feedback!
> Subject: Re: [PATCH v3 2/6] pinctrl: sh-pfc: r8a77470: Add SDHI support
>
> Hi Fabrizio,
>
> On Mon, Oct 8, 2018 at 10:52 AM Fabrizio Castro
> wrote:
> > Add SH_PFC_PIN_CFG_IO_VOLTAGE definition for the SDHI pins
> > capable of switching voltage, also
On Mon, Oct 8, 2018 at 11:53 AM Fabrizio Castro
wrote:
> Add device tree nodes for the I2C[0123] controllers. Also, add
> the aliases node.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
Geert
--
Geert U
On Fri, Oct 5, 2018 at 1:57 PM Geert Uytterhoeven
wrote:
> The following changes since commit a97f340c0a071bcb32ff68f3d19cf56a76887288:
>
> pinctrl: sh-pfc: rcar: Rename automotive-only arrays to automotive
> (2018-09-28 09:49:15 +0200)
>
> are available in the Git repository at:
>
> git://g
Hi Biju,
On Tue, Oct 9, 2018 at 3:02 PM Biju Das wrote:
> What should we do next for fixing this error? Adding unconditional delays
> also fixes the issue.
I'd add 50 µs delays after the three register writes.
> But I do not have the setup to verify this on gen1/gen2/gen3 variants.
>
> I have
Hi Chris,
On Mon, Oct 8, 2018 at 6:24 PM Chris Brandt wrote:
> Document support for the RZ/A2 (R7S9210) SoC.
>
> Signed-off-by: Chris Brandt
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> +++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
> @@ -13,6 +
Hi Chris,
On Mon, Oct 8, 2018 at 6:24 PM Chris Brandt wrote:
> The SDHI/MMC controller in the RZ/A2 is almost the same as R-Car gen3, but
> with some minor differences.
>
> Signed-off-by: Chris Brandt
Thanks for your patch!
> --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> +++ b/drivers/
[+ Niklas]
On Tue, Oct 09, 2018 at 10:37:47PM +0300, Sergei Shtylyov wrote:
> Describe THS/CIVM in the R8A77980 device trees.
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-20181008-v4.19-rc7' tag of Simon
> Horman's 'renesas.git' repo.
>
> The thermal dr
On Mon, Oct 8, 2018 at 6:24 PM Chris Brandt wrote:
> Add SDHI clocks for RZ/A2
>
> Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
i.e. will queue in clk-renesas-for-v4.21.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia3
On Tue, Oct 09, 2018 at 10:11:51PM +0300, Sergei Shtylyov wrote:
> Add the R-Car V3H (R8A77980) SoC support to the R-Car gen3 thermal driver.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Simon Horman
On Tue, Oct 09, 2018 at 10:10:14PM +0300, Sergei Shtylyov wrote:
> Document the R-Car V3H (R8A77980) SoC in the Renesas R-Car gen3 thermal
> bindings.
>
> Signed-off-by: Sergei Shtylyov
Reviewed-by: Simon Horman
On Mon, Oct 8, 2018 at 11:30 AM Fabrizio Castro
wrote:
> Add QSPI1 pin groups and function to the RZ/G1C (a.k.a. R8A77470)
> pinctrl driver.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
Gr{oetje,eeting}s
On Mon, Oct 08, 2018 at 10:52:38AM +0100, Fabrizio Castro wrote:
> Add device tree nodes for the I2C[0123] controllers. Also, add
> the aliases node.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Thanks,
This looks fine to me but I will wait to see if there are other reviews
befor
On Mon, Oct 8, 2018 at 11:30 AM Fabrizio Castro
wrote:
> Add VIN[01] pin groups and functions to the RZ/G1C (a.k.a.
> R8A77470) pinctrl driver.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
Gr{oetje,eeting}s,
On Mon, Oct 8, 2018 at 11:30 AM Fabrizio Castro
wrote:
> Add DU1 pin groups and function to the RZ/G1C (a.k.a. R8A77470)
> pinctrl driver.
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lo
On Mon, Oct 8, 2018 at 11:30 AM Fabrizio Castro
wrote:
> This patch adds I2C[0123] groups and functions to the RZ/G1C
> (a.k.a. R8A77470) pinctrl driver.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Geert Uytterhoeven
i.e. will queue in sh-pfc-for-v4.21.
Gr{oetje,ee
Hi Fabrizio,
On Mon, Oct 8, 2018 at 10:52 AM Fabrizio Castro
wrote:
> Add SH_PFC_PIN_CFG_IO_VOLTAGE definition for the SDHI pins
> capable of switching voltage, also add pin groups and functions
> for SDHI0 and SDHI1. Please note that with the RZ/G1C only 1
> bit of the POC Control Register is us
On Tue, Oct 9, 2018 at 9:50 PM Sergei Shtylyov
wrote:
> Describe THS/CIVM in the R8A77970 device tree.
>
> Based on the original (and large) patches by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov
> Signed-off-by: Sergei Shtylyov
>
> ---
> This patch is against the 'renesas-devel-201810
Hi Sergei,
On Mon, Oct 8, 2018 at 8:04 PM Sergei Shtylyov
wrote:
> On 10/08/2018 07:40 PM, Geert Uytterhoeven wrote:
> Describe THS/CIVM in the R8A77970 device trees.
> Based on the original (and large) patches by Vladimir Barinov.
> + 0 0xe6190100 0
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