On Sat, Jul 17, 2010 at 1:09 PM, Kyungmin Park
wrote:
> I don't say LSI need to support early chip. you focus on the your selected
> SoC.
> The remaining will be done by us.
Of course, you can do whatever you want.
I only worry that this mindless rush to push support for such obscure and rare
ma
On Sat, Jul 17, 2010 at 12:43 PM, Jassi Brar wrote:
> On Fri, Jul 16, 2010 at 9:22 PM, Kukjin Kim wrote:
>> MyungJoo Ham wrote:
>>>
>>> CPUFREQ of S5PV210 uses different APLL settings and we provide
>>> such values for CPUFREQ at pll.h. We have been using differently
>>> between EVT0 and EVT1 mac
To Ben,
Now you are working on make a single kernel for s5p series at your git.
The v310 or c210 chip also included in these works.
Previous time Marek sent the mail if you are busy with other works, he
can help it.
Give your opinions.
TO Changhwan or Kukjin
Did you see the ben's work? If yes,
On Fri, Jul 16, 2010 at 9:22 PM, Kukjin Kim wrote:
> MyungJoo Ham wrote:
>>
>> CPUFREQ of S5PV210 uses different APLL settings and we provide
>> such values for CPUFREQ at pll.h. We have been using differently
>> between EVT0 and EVT1 machines. Although this version of kernel
>> assumes that the C
On Fri, Jul 16, 2010 at 9:22 PM, Kukjin Kim wrote:
> MyungJoo Ham wrote:
>>
>> CPUFREQ of S5PV210 uses different APLL settings and we provide
>> such values for CPUFREQ at pll.h. We have been using differently
>> between EVT0 and EVT1 machines. Although this version of kernel
>> assumes that the C
> -Original Message-
> From: Kukjin Kim [mailto:kgene@samsung.com]
> Sent: Friday, July 16, 2010 1:39 PM
> To: 'Sylwester Nawrocki'; linux-samsung-soc@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org
> Cc: p.osc...@samsung.com; m.szyprow...@samsung.com;
> kyungmin.p...@samsung.c
> -Original Message-
> From: Maurus Cuelenaere [mailto:mcuelena...@gmail.com]
> Sent: Friday, July 16, 2010 3:36 PM
> To: Sylwester Nawrocki
> Cc: 'Kukjin Kim'; Pawel Osciak; Marek Szyprowski;
> kyungmin.p...@samsung.com; linux-me...@vger.kernel.org; linux-samsung-
> s...@vger.kernel.org; l
Hello,
> -Original Message-
> From: Kukjin Kim [mailto:kgene@samsung.com]
> Sent: Friday, July 16, 2010 12:08 PM
> To: 'Sylwester Nawrocki'; linux-samsung-soc@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org
> Cc: p.osc...@samsung.com; m.szyprow...@samsung.com;
> kyungmin.p...@
On Fri, Jul 16, 2010 at 10:13 PM, Kukjin Kim wrote:
> From: Naveen Krishna Ch
>
> This patch adds support I2C-0/1/2 devices to the SMDKV210/SMDKC110.
>
> Signed-off-by: Naveen Krishna Ch
> Signed-off-by: Kukjin Kim
> ---
> arch/arm/mach-s5pv210/Kconfig | 8
> arch/arm/mach-
On Fri, Jul 16, 2010 at 10:13 PM, Kukjin Kim wrote:
> From: Naveen Krishna Ch
>
> This patch is to select support I2C channels 0, 1 and 2 for S5PV210 and
> S5P6440.
>
> Signed-off-by: Naveen Krishna Ch
> Signed-off-by: Kukjin Kim
> ---
> drivers/i2c/busses/Kconfig | 2 +-
> 1 files changed
Maybe it requires the s5pc210(s5pv310) support also.
As you know s5pc210 has 8 I2Cs. the problem is that current
implementation need each i2c device gpio setup and Kconfig
Do you think it's reasonable?
I think we need to find a good way to solve this issue. do you have any idea?
Thank you,
Kyungm
Op 16-07-10 15:30, Sylwester Nawrocki schreef:
> Hi,
>
> thank you for the review. Please se my comments below.
>
>> -Original Message-
>> From: Kukjin Kim [mailto:kgene@samsung.com]
>> Sent: Friday, July 16, 2010 11:45 AM
>> To: 'Sylwester Nawrocki'; linux-samsung-soc@vger.kernel.org;
Hi,
thank you for the review. Please se my comments below.
> -Original Message-
> From: Kukjin Kim [mailto:kgene@samsung.com]
> Sent: Friday, July 16, 2010 11:45 AM
> To: 'Sylwester Nawrocki'; linux-samsung-soc@vger.kernel.org; linux-arm-
> ker...@lists.infradead.org
> Cc: p.osc...@sa
From: Naveen Krishna Ch
This patch adds support I2C-0/1/2 devices to the SMDKV210/SMDKC110.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5pv210/Kconfig |8
arch/arm/mach-s5pv210/mach-smdkc110.c | 28
arch/arm
From: Naveen Krishna Ch
This patch adds helper functions for I2C channel 0 and 1, GPIO
configurations for I2C on S5P6440 and support I2C-0/1 devices
on SMDK6440.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5p6440/Kconfig|7 +++
arch/arm/ma
From: Naveen Krishna Ch
This patch is to select support I2C channels 0, 1 and 2 for S5PV210 and S5P6440.
Signed-off-by: Naveen Krishna Ch
Signed-off-by: Kukjin Kim
---
drivers/i2c/busses/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/busses/Kconf
This patches is to support I2C devices on SMDK6440, SMDKC110 and SMDKV210.
S5P6440 can support I2C channel 0 and 1, and S5PV210/S5PC110 can support
I2C channel 0, 1 and 2.
[PATCH 1/3] ARM: S5P6440: Add support for I2C channel 0 and 1 on SMDK6440
[PATCH 2/3] ARM: S5PV210: Add support for I2C device
MyungJoo Ham wrote:
>
> This patch prepares CPUFREQ support for S5PV210 by adding definitions
> for S5P_VA_DMCx accessed by CPUFREQ, which were not defined previously.
>
> Signed-off-by: MyungJoo Ham
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/mach-s5pv210/cpu.c | 12 +++
MyungJoo Ham wrote:
>
> CPUFREQ of S5PV210 uses different APLL settings and we provide
> such values for CPUFREQ at pll.h. We have been using differently
> between EVT0 and EVT1 machines. Although this version of kernel
> assumes that the CPU is EVT1, users may use code for EVT0 later.
>
> Note t
On Fri, Jul 16, 2010 at 05:58:28PM +0900, Kukjin Kim wrote:
> diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c
> new file mode 100644
> index 000..9325ac2
> --- /dev/null
> +++ b/arch/arm/mach-s5pv310/platsmp.c
> @@ -0,0 +1,212 @@
> +/* linux/arch/arm/mach-s5pv310/
Sylwester Nawrocki wrote:
>
Hi,
Samsung S.LSI hardly recommends DMA mode to implement the feature not FIFO
mode because of H/W limitation.
> This driver exports two video device nodes per each FIMC device,
> one for for memory to memory (color conversion, image resizing,
> flipping and rotation)
Op 16-07-10 10:01, MyungJoo Ham schreef:
> S5PV210 CPUFREQ Support.
>
> This CPUFREQ may work without PMIC's DVS support. However, it is not
> as effective without DVS support as supposed. AVS is not supported in
> this version.
>
> Note that CLK_SRC of some clocks including ARMCLK, G3D, G2D, MFC,
On Fri, Jul 16, 2010 at 5:58 PM, Kukjin Kim wrote:
> From: Changhwan Youn
>
> This patch adds Samsung's S5PV310/S5PC210 CPU support.
> The S5PV310/S5PC210 integrates a ARM Cortex A9 multi-core.
>
> Signed-off-by: Changhwan Youn
> Signed-off-by: Jongpill Lee
> Signed-off-by: Kukjin Kim
> ---
>
On Fri, Jul 16, 2010 at 5:58 PM, Kukjin Kim wrote:
> From: Changhwan Youn
>
> This patch adds Samsung SMDKV310 board support file.
>
> Signed-off-by: Changhwan Youn
> Signed-off-by: Kukjin Kim
> ---
> arch/arm/mach-s5pv310/Makefile | 4 ++
> arch/arm/mach-s5pv310/mach-smdkv310.c |
On Fri, Jul 16, 2010 at 5:58 PM, Kukjin Kim wrote:
> From: Changhwan Youn
>
> This patch adds timer support for S5PV310.
> Until now, all S5P SoCs use CONFIG_ARCH_USES_GETTIMEOFFSET macro as a default
> configuration. Instead, S5PV310 implements clocksource and clock_event_device
> to support the
Sylwester Nawrocki wrote:
>
> Add camera interface SoC resource definitions and setup code
> for FIMC/FB fifo links.
>
> Signed-off-by: Sylwester Nawrocki
> Signed-off-by: Marek Szyprowski
> Signed-off-by: Kyungmin Park
> ---
> arch/arm/mach-s5pc100/Kconfig | 15 ++
> a
Sylwester Nawrocki wrote:
>
> FIMC device is a camera interface embedded in S3C/S5P Samsung SOC series.
> It supports ITU-R BT.601/656 and MIPI-CSI2 standards, memory to memory
> operations, color conversion, resizing and rotation.
>
> Signed-off-by: Sylwester Nawrocki
> Signed-off-by: Marek Szy
From: Changhwan Youn
This patch adds Samsung's S5PV310/S5PC210 CPU support.
The S5PV310/S5PC210 integrates a ARM Cortex A9 multi-core.
Signed-off-by: Changhwan Youn
Signed-off-by: Jongpill Lee
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5pv310/cpu.c | 122 +
From: Changhwan Youn
This patch adds the Kconfig and Makefile for the new S5PV310 SoC.
It also updates arch/arm Kconfig, Makefile and arch/arm/mm/Kconfig
to include support for the new S5PV310.
Signed-off-by: Changhwan Youn
Signed-off-by: Kukjin Kim
---
arch/arm/Kconfig|
From: Changhwan Youn
This patch adds Samsung SMDKV310 board support file.
Signed-off-by: Changhwan Youn
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5pv310/Makefile|4 ++
arch/arm/mach-s5pv310/mach-smdkv310.c | 92 +
2 files changed, 96 insertions
From: Changhwan Youn
This patch adds clock and pll support for S5PV310.
Signed-off-by: Changhwan Youn
Signed-off-by: Kukjin Kim
---
arch/arm/mach-s5pv310/clock.c | 544 +++
arch/arm/mach-s5pv310/include/mach/regs-clock.h | 60 +++
arch/arm/plat-s5p/inc
From: Changhwan Youn
This patch adds timer support for S5PV310.
Until now, all S5P SoCs use CONFIG_ARCH_USES_GETTIMEOFFSET macro as a default
configuration. Instead, S5PV310 implements clocksource and clock_event_device
to support the high resolution timer and tickless system.
Signed-off-by: Cha
From: Changhwan Youn
This patch adds IRQ support for S5PV310.
ARM GIC is installed in S5PV310 instead of VIC which is in every other CPUs
in S5P series. Several irq combiners are used to resolve the lack of irq
lines in current implementation.
Signed-off-by: Changhwan Youn
Signed-off-by: Hyuk L
From: Jongpill Lee
This patch adds UART serial port support for S5PV310.
In the case of that serial device has just one clock source, driver can not
control clock source. So add check function in get_clksrc and set_clksrc.
Signed-off-by: Jongpill Lee
Acked-by: Changhwan Youn
Signed-off-by: Kuk
From: Changhwan Youn
The uart offset between channels has been 0x400 for all S5P series
and to present virtual and physical offsets, both number 0x400 and
S3C_UART_OFFSET have been used together.
This patch removes the use of the number 0x400 and expands the virtual
mapping size of S3C_VA_UART fr
This patch set adds support for Samsung S5PV310/S5PC210. The S5PV310
integrates a ARM Cortex A9 microprocessor with several other peripherals
to support features such as multimedia, storage, graphics and gaming.
The S5PV310 can be used in products such as Netbooks and Mobile devices.
Changes since
On Fri, Jul 16, 2010 at 05:01:17PM +0900, MyungJoo Ham wrote:
> S5PV210 CPUFREQ Support.
>
> This CPUFREQ may work without PMIC's DVS support. However, it is not
> as effective without DVS support as supposed. AVS is not supported in
> this version.
Especially in terms of the regulator API usage:
From: Jongpill Lee
Add support for the FRACVAL register on the newer UART blocks which provides
the same function as UDIVSLOT register but the FRACVAL is easier to implement.
To support UDIVSLOT register, UDIVSLOT table search is necessary though
supporting FRACVAL only needs the index value of U
Hello,
On Friday, July 16, 2010 10:09 AM MyungJoo Ham wrote:
> Two issues are addressed for max8998_set_voltage function.
>
> 1. Min/Max Voltage.
>
> max8998_set_voltage had been using the voltage value of
>
> min ( voltage[i] >= max_vol , i )
>
> This is corrected to use:
>
On Fri, Jul 16, 2010 at 05:09:20PM +0900, MyungJoo Ham wrote:
> Two issues are addressed for max8998_set_voltage function.
Acked-by: Mark Brown
Ideally you should've submitted this as two separate patches.
--
To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
the bod
Two issues are addressed for max8998_set_voltage function.
1. Min/Max Voltage.
max8998_set_voltage had been using the voltage value of
min ( voltage[i] >= max_vol , i )
This is corrected to use:
min ( voltage[i] >= min_vol , i )
2. Ramp Up Delay.
max89
S5PV210 CPUFREQ Support.
This CPUFREQ may work without PMIC's DVS support. However, it is not
as effective without DVS support as supposed. AVS is not supported in
this version.
Note that CLK_SRC of some clocks including ARMCLK, G3D, G2D, MFC,
and ONEDRAM are modified directly without updating cl
This patch prepares CPUFREQ support for S5PV210 by adding definitions
for S5P_VA_DMCx accessed by CPUFREQ, which were not defined previously.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Park
---
arch/arm/mach-s5pv210/cpu.c | 12 +++-
arch/arm/mach-s5pv210/include/
CPUFREQ of S5PV210 uses different APLL settings and we provide
such values for CPUFREQ at pll.h. We have been using differently
between EVT0 and EVT1 machines. Although this version of kernel
assumes that the CPU is EVT1, users may use code for EVT0 later.
Note that at 1GHz of ARMCLK, APLL should
Previously, most of CLK_DIV/SRC register accessing mask and shift
values were used at arch/arm/mach-s5pv210/clock.c only; thus we
had not been using macros for these. However, as CPUFREQ uses
those shift and mask values as well, we'd better define them at a single
location, whose proper location wo
S5PV210 requires msys/dsys info as well; thus, we've included those at
struct s3c_freq, which is used by CPUFREQ of S5PV210.
Signed-off-by: MyungJoo Ham
Signed-off-by: Kyungmin Park
---
arch/arm/plat-samsung/include/plat/cpu-freq.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
S5PV210 CPUFREQ Initial Support.
This is a series of patches to enable CPUFREQ for S5PV210.
Although this works without PMIC's DVS support, it is not
as effective without DVS support as supposed. AVS is not
supported in this version.
MyungJoo Ham (5):
ARM: Samsung SoC: added hclk/pclk info to
Two issues are addressed for max8998_set_voltage function.
1. Min/Max Voltage.
max8998_set_voltage had been using the voltage value of
min ( voltage[i] >= max_vol , i )
This is corrected to use:
min ( voltage[i] >= min_vol , i )
2. Ramp Up Delay.
max89
48 matches
Mail list logo
