The SROM register difinitions of S5PV310/S5PC210 (mach/regs-srom.h)
can be used to other S5P SoCs such as S5PV210/S5PC110. So moved into
plat/regs-srom.h of plat-s5p directory.
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/mach-s5pv310/include/mach/regs-srom.h | 50
From: Thomas Abraham thomas...@samsung.com
This patch adds the SROM controller clock to the list of clocks to be enabled at
boot time. It is required to be enabled at boot time since the modules connected
over the SROM interface such as the Ethernet controller need an operational
SROM.
From: Thomas Abraham thomas...@samsung.com
This patch adds shift macros for the SROM Bus width and control
register to represent the shift count for the 5th and 6th SROM
banks. Some of the S5P SOCs have them.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Kukjin Kim
From: Thomas Abraham thomas...@samsung.com
This patch adds DM9000 Ethernet Controller device support for SMDKV210.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
arch/arm/mach-s5pv210/include/mach/map.h |2 +
This patch moves regarding SROMC support code to plat-s5p for common usage of
S5P SoCs.
And adds support DM9000 Ethernet Controller for SMDKV210 board.
[PATCH 1/6] ARM: S5P: Move the SROM register definitions to plat-s5p
[PATCH 2/6] ARM: S5P: Add SROM control register shift macros for other
From: Thomas Abraham thomas...@samsung.com
Some of the S5P platforms like S5PC100 and S5PV210 include SROM banks
4 and 5 in addition to SROM banks 0 to 3. This patch adds register
offsets for SROM bank 4 and 5.
Signed-off-by: Thomas Abraham thomas...@samsung.com
Signed-off-by: Kukjin Kim
From: Changhwan Youn chaos.y...@samsung.com
The irqs from SPI(0) to SPI(39) and SPI(51), SPI(53) are connected to the
interrupt combiner. This patch limits the irqs which should be initialized
to support cascade interrupt.
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
Signed-off-by:
From: Changhwan Youn chaos.y...@samsung.com
This patch adds IRQ_MCT0, IRQ_MCT1, IRQ_MCT_L0, and IRQ_MCT_L1.
(MCT: Multi-Core Timer). And updated MAX_COMBINER_NR.
Signed-off-by: Changhwan Youn chaos.y...@samsung.com
Signed-off-by: Kukjin Kim kgene@samsung.com
---
From: Changhwan Youn chaos.y...@samsung.com
The 4 combiner groups use same registers to handle the interrupt.
In previous implementation, the whole registers are checked to find
which interupt is occurred and thus interrupt in other groups can
be detected. This patch adds irq_mask to solve this
On Thu, Dec 02, 2010 at 03:19:05PM +, Catalin Marinas wrote:
On 1 December 2010 00:25, Russell King - ARM Linux
li...@arm.linux.org.uk wrote:
On Tue, Nov 30, 2010 at 11:32:04PM +, Russell King - ARM Linux wrote:
Note that I'll go with factoring this out into arch/arm/kernel/smp_scu.c
Hello,
the following patch series adds S5P platform support for MIPI-CSI2 devices.
It has been rebased onto next-samsung branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
[PATCH 1/4] mach-s5pv210: Add platform definitions for mipi-csis
[PATCH 2/4] mach-s5pv310:
Added resource definitions for mipi-csis interface, naming
changed for consistency with s5pv310 where there are two
instances of the device.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Add IRQ and register base address definitions for mipi-csis devices.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-s5pv310/include/mach/irqs.h |3 +++
arch/arm/mach-s5pv310/include/mach/map.h |5 +
2
There may be up to 2 MIPI-CSI2 interfaces depending on SoC version.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/plat-s5p/Kconfig | 10
arch/arm/plat-s5p/Makefile|2 +
MIPI DPHY control register requires special handling since
it is shared between CSI (camera serial interface) and DSI
(display serial interface). By creating this clock
a serialized interface is provided for mipi-csi and mipi-dsi
drivers, so DPHYs may be safely controlled by both drivers.
Hi Sylwester,
On Thu, Dec 02, 2010 at 05:37:41PM +0100, Sylwester Nawrocki wrote:
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
new file mode 100644
index 000..2b1ba43
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-csis0.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C)
Hi Jamie,
On 12/02/2010 06:15 PM, Jamie Iles wrote:
Hi Sylwester,
On Thu, Dec 02, 2010 at 05:37:41PM +0100, Sylwester Nawrocki wrote:
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
new file mode 100644
index 000..2b1ba43
--- /dev/null
+++
On Thu, Dec 02, 2010 at 06:39:50PM +0100, Sylwester Nawrocki wrote:
On 12/02/2010 06:15 PM, Jamie Iles wrote:
On Thu, Dec 02, 2010 at 05:37:41PM +0100, Sylwester Nawrocki wrote:
[...]
+static struct resource s5p_csis_resource[] = {
+ [0] = {
+ .start = S5P_PA_CSIS0,
+
register
--
tarek
--
To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Dec 3, 2010 at 2:39 AM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
Hi Jamie,
On 12/02/2010 06:15 PM, Jamie Iles wrote:
Hi Sylwester,
On Thu, Dec 02, 2010 at 05:37:41PM +0100, Sylwester Nawrocki wrote:
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
Sylwester Nawrocki wrote:
Hello,
Hi :-)
the following patch series adds S5P platform support for MIPI-CSI2
devices.
It has been rebased onto next-samsung branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git
It would be more helpful to me to use the 'for-next'
Sylwester Nawrocki wrote:
Added resource definitions for mipi-csis interface, naming
changed for consistency with s5pv310 where there are two
instances of the device.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Sylwester Nawrocki wrote:
Add IRQ and register base address definitions for mipi-csis devices.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/mach-s5pv310/include/mach/irqs.h |3 +++
On Fri, Dec 3, 2010 at 1:36 PM, Kukjin Kim kgene@samsung.com wrote:
Sylwester Nawrocki wrote:
Add IRQ and register base address definitions for mipi-csis devices.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
On Fri, Dec 3, 2010 at 1:59 PM, Jassi Brar jassisinghb...@gmail.com wrote:
On Fri, Dec 3, 2010 at 1:36 PM, Kukjin Kim kgene@samsung.com wrote:
Sylwester Nawrocki wrote:
Add IRQ and register base address definitions for mipi-csis devices.
Signed-off-by: Sylwester Nawrocki
On Fri, Dec 3, 2010 at 2:14 PM, Jassi Brar jassisinghb...@gmail.com wrote:
On Fri, Dec 3, 2010 at 1:37 AM, Sylwester Nawrocki
s.nawro...@samsung.com wrote:
There may be up to 2 MIPI-CSI2 interfaces depending on SoC version.
Signed-off-by: Sylwester Nawrocki s.nawro...@samsung.com
26 matches
Mail list logo