Hi Pankaj,
On 30 April 2014 10:47, Pankaj Dubey pankaj.du...@samsung.com wrote:
As machine function ops are used only in this file let's make
them static.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
arch/arm/mach-exynos/exynos.c |6 +++---
1 file changed, 3 insertions(+),
On Fri, Mar 28, 2014 at 05:52:54PM +0100, Lucas Stach wrote:
The new bindings drops one clock, renames the others and
drops the old interrupt mapping.
Signed-off-by: Lucas Stach l.st...@pengutronix.de
It does not apply on my branch, and I had to apply it manually. Please
check my imx/dt
Hi Pankaj,
On Wed, Apr 30, 2014 at 10:47 AM, Pankaj Dubey pankaj.du...@samsung.com wrote:
This patch modifies Exynos Power Management Unit (PMU) initialization
implementation in following way:
- Added platform_device support by registering static platform device.
- Added platform struct
On Tue, Apr 29, 2014 at 10:17:01AM -0600, Stephen Warren wrote:
On 04/28/2014 06:02 PM, Simon Horman wrote:
On Mon, Apr 28, 2014 at 08:30:32PM +0100, Russell King wrote:
Since we now automatically enable early BRESP in core L2C-310 code when
we detect a Cortex-A9, we don't need
After applying PM / OPP: Add support for descending order for cpufreq
table
,to make the table descending we can use OPP_TABLE_ORDER_DESCEND flag.
Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
---
drivers/cpufreq/exynos5440-cpufreq.c | 22 +-
1 file changed, 1
In dev_pm_opp_init_cpufreq_table, flags parameter is added to
indicate descending order. If flags is zero, it is a ascending
order.
Signed-off-by: Jonghwan Choi jhbird.c...@samsung.com
---
drivers/cpufreq/arm_big_little.c |2 +-
drivers/cpufreq/cpufreq-cpu0.c |2 +-
Hi,
On Sat, Apr 26, 2014 at 5:02 PM, Tomasz Figa tomasz.f...@gmail.com wrote:
Hi Arun,
On 24.04.2014 06:17, Arun Kumar K wrote:
Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Doug Anderson
Hi Tomasz,
I have tested your patches for exynos5250 and 5420. Works fine. Are
you planning to post v3? If you want I can share hand with you for v3.
Regards,
Rahul Sharma
On 9 April 2014 17:17, Andreas Oberritter o...@saftware.de wrote:
Hello Andrzej,
On 09.04.2014 10:37, Andrzej Hajda
On Tuesday, April 29, 2014 11:48 PM, Catalin Marinas wrote:
On Tue, Apr 29, 2014 at 05:59:27AM +0100, Jungseok Lee wrote:
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -8,10 +8,11 @@ This document describes the virtual memory layout
used by the AArch64
Hi Sachin,
On 04/30/2014 03:00 PM, Sachin Kamat wrote:
Hi Pankaj,
On 30 April 2014 10:47, Pankaj Dubey pankaj.du...@samsung.com wrote:
As machine function ops are used only in this file let's make
them static.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
Hi Tomasz,
On 04/26/2014 09:25 AM, Tomasz Figa wrote:
Hi Chanwoo,
On 25.04.2014 03:16, Chanwoo Choi wrote:
This patch decide proper lowpower mode of either a15 or a9 according to own
ID
from Main ID register.
Cc: Arnd Bergmann a...@arndb.de
Cc: Marc Zynigier marc.zyng...@arm.com
Hi,
On 04/23/2014 02:52 PM, Leela Krishna Amudala wrote:
A common macro v7_exit_coherency_flush available which does the below tasks in
the seqeunce.
-clearing C bit
-clearing L1 cache
-exit SMP
-instruction and data synchronization
So removing the local functions which does the same
Hello Kgene,
Can you please pick this patch to your tree ?
Best Wishes,
Leela Krishna.
On Wed, Apr 30, 2014 at 1:32 PM, Chanwoo Choi cw00.c...@samsung.com wrote:
Hi,
On 04/23/2014 02:52 PM, Leela Krishna Amudala wrote:
A common macro v7_exit_coherency_flush available which does the below
Hi Rahul,
I will prepare we v3 version.
Do you want me to add your patches for exynos5?50 to the patchset?
Regards,
Tomasz Stanislawski
On 04/30/2014 08:37 AM, Rahul Sharma wrote:
Hi Tomasz,
I have tested your patches for exynos5250 and 5420. Works fine. Are
you planning to post v3? If you
Hi Pankaj,
On 30 April 2014 10:47, Pankaj Dubey pankaj.du...@samsung.com wrote:
Many files under arm/mach-exynos are having file path in file
comment section which is invalid now.
So for better code maintainability let's remove them.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
Sure (5250, 5420). I will wait for the same to update DT patches, if any.
Regards,
Rahul Sharma.
On 30 April 2014 14:02, Tomasz Stanislawski t.stanisl...@samsung.com wrote:
Hi Rahul,
I will prepare we v3 version.
Do you want me to add your patches for exynos5?50 to the patchset?
Regards,
Add required device node for ehci and ohci controllers to
enable USB 2.0 support.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 36 +++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git
Add required device node for usb2phy to let enable USB 2.0
support.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dts/exynos5420.dtsi
Next version for earlier patch-series:
[PATCH v7 0/2] dts: Add usb2phy to Exynos 5250
Based on 'for-next' branch of Kgene's linux-samsung tree.
Tested with driver side patches:
[PATCH v2 1/4] usb: ohci-exynos: Use struct device instead of platform_device
[PATCH v2 2/4] usb: ehci-exynos: Use
From: Kamil Debski k.deb...@samsung.com
Add support to PHY of USB2 of the Exynos 5250 SoC.
Signed-off-by: Kamil Debski k.deb...@samsung.com
[gautam.vi...@samsung.com: Split the usb phy entries from
syscon entries from earlier patch: dts: Add usb2phy to Exynos 5250]
[gautam.vi...@samsung.com:
This patch adds sysreg-syscon node to exynos5250 and exynos5420 device
tree, to access System Register's registers using syscon driver.
Signed-off-by: Kamil Debski k.deb...@samsung.com
[gautam.vi...@samsung.com: Split this syreg-syscon dts entry from
dts: Add usb2phy to Exynos 5250 patch]
From: Naveen Krishna Ch ch.nav...@samsung.com
Using pdev-dev with device_for_each_child() would iterate over all
of the children of the platform device and delete them.
Thus, causing crashes during module unload.
We should be using the indio_dev-dev structure for
registering/unregistering child
Add reinit_completion() before the wait_for_completion_timeout in
raw_read() call.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes since v2:
None
Changes since v1:
None
v0:
This change is a part of the patch reviewed at
Do a soft reset software if a timeout happens.
This is applicable only for ADC_V2.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes since v2:
None
Changes since v1:
None
v0:
This change is a part of the patch reviewed at
This patchset fixes the
1. bug causing a crash during module removal for exynos_adc.ko.
- The bug was seen by Doug, while trying to compile the whole IIO subsystem
as module @ https://lkml.org/lkml/2014/4/21/481 from Doug.
2. rearrange the clock and regulator enable/disable calls during
ADC module on Exynos5 SoCs runs at 600KSPS. At this conversion rate,
waiting for 1000 msecs is wasteful (incase of h/w failure).
Hence, reduce the time out to 100msecs and use
wait_for_completion_timeout() instead of
wait_for_completion_interruptible_timeout()
Signed-off-by: Naveen Krishna
From: Naveen Krishna Ch ch.nav...@samsung.com
This patch maintains the following order in
probe(), remove(), resume() and suspend() calls
regulator enable, clk prepare enable
...
clk disable unprepare, regulator disable
While at it,
1. enable the regulator before the iio_device_register()
2.
Am Mittwoch, den 30.04.2014, 14:02 +0800 schrieb Shawn Guo:
On Fri, Mar 28, 2014 at 05:52:54PM +0100, Lucas Stach wrote:
The new bindings drops one clock, renames the others and
drops the old interrupt mapping.
Signed-off-by: Lucas Stach l.st...@pengutronix.de
It does not apply on my
Hi Vivek,
On 04/30/14 14:25, Vivek Gautam wrote:
Add required device node for usb2phy to let enable USB 2.0
support.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
Hi Arun,
On Wed, Apr 30, 2014 at 3:55 PM, Arun Kumar K arunkk.sams...@gmail.com wrote:
Hi Vivek,
On 04/30/14 14:25, Vivek Gautam wrote:
Add required device node for usb2phy to let enable USB 2.0
support.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
On 04/24/2014 11:46 AM, Tushar Behera wrote:
The audio codec on Snow board, MAX98095 is connected on I2C7 bus.
Also it requires the GPX1-7 line to be pulled up.
Updated Snow DTS file to incorporate above changes and added a
sound node to instantiate the I2S-based sound card.
On Wednesday 30 April 2014 09:39:54 Sachin Kamat wrote:
On 16 April 2014 22:55, Heiko Stübner he...@sntech.de wrote:
Am Mittwoch, 16. April 2014, 16:35:36 schrieb Arnd Bergmann:
On Wednesday 16 April 2014 17:20:51 Sachin Kamat wrote:
Instead of hardcoding the SYSRAM details for each SoC,
On Mon, Apr 28, 2014 at 2:04 PM, Arnd Bergmann a...@arndb.de wrote:
On Sunday 27 April 2014 13:07:32 Shaik Ameer Basha wrote:
The current exynos-iommu(System MMU) driver does not work autonomously
since it is lack of support for power management of peripheral blocks.
For example, MFC device
Hello All,
On 28 April 2014 16:14, Naveen Krishna Chatradhi ch.nav...@samsung.com wrote:
SSS module on Exynos4210, Exynos5250 and Exynos5420 SoCs has added
features to the one on S5PV210. However with minor changes the s5p-sss.c
driver can be reused to support SSS modules on Exynos4 and 5
Hi Shaik
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch modifies the defined parent clock names as per the
exynos5420 datasheet.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
Changes from v2
--
- Use reference based node addressing in board dts file
as suggested by Tomasz.
- Included patch to update 5420.dtsi with node references
for all existing nodes.
Changes from v1
--
- Addressed review comments from Doug, Sachin Tushar
- Removed adc
Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/Makefile |1 +
arch/arm/boot/dts/exynos5420-peach-pit.dts | 156
Adding references to nodes which do not have it yet
in exynos5420.dtsi. This is done so as to use reference
based node updation in board files.
Signed-off-by: Arun Kumar K arun...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 26 +-
1 file changed, 13
HI shaik,
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch includes,
1] renaming of the HSI2C clocks
2] renaming of spi clocks according to the datasheet
3] fixes for child-parent relationships
4] adding of more clocks related to
Hi Shaik,
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch fixes some parent-child relationships according
to the latest datasheet and adds more clocks related to
PERIS and GEN blocks.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Hi Shaik,
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch adds missing clocks from WCORE block.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
Reviewed-by: Alim Akhtar
On 04/30/2014 03:59 AM, Mark Brown wrote:
On Fri, Apr 25, 2014 at 09:46:11AM +0530, Tushar Behera wrote:
On 04/24/2014 07:09 PM, Mark Brown wrote:
defined. Why is that? Also, why is the secondary I2S playback stream
not supported (this may be a reason to restrict to only the one I2S
On Wed, Apr 30, 2014 at 04:38:05PM +0530, Naveen Krishna Ch wrote:
Hello All,
On 28 April 2014 16:14, Naveen Krishna Chatradhi ch.nav...@samsung.com
wrote:
SSS module on Exynos4210, Exynos5250 and Exynos5420 SoCs has added
features to the one on S5PV210. However with minor changes the
Hello Herbert,
On 30 April 2014 17:44, Herbert Xu herb...@gondor.apana.org.au wrote:
On Wed, Apr 30, 2014 at 04:38:05PM +0530, Naveen Krishna Ch wrote:
Hello All,
On 28 April 2014 16:14, Naveen Krishna Chatradhi ch.nav...@samsung.com
wrote:
SSS module on Exynos4210, Exynos5250 and
Hi Hans,
On 04/22/14 18:22, Hans Verkuil wrote:
On 04/21/2014 11:26 AM, Arun Kumar K wrote:
From: Pawel Osciak posc...@chromium.org
This event indicates that the decoder has reached a point in the stream,
at which the resolution changes. The userspace is expected to provide a new
set of
Hi,
On Tue, Apr 15, 2014 at 4:24 AM, Olof Johansson o...@lixom.net wrote:
Hi Sachin,
On Mon, Apr 14, 2014 at 6:16 AM, Sachin Kamat sachin.ka...@linaro.org wrote:
From: Doug Anderson diand...@chromium.org
Added nodes for ptn3460 driver to Snow board.
Signed-off-by: Doug Anderson
On Wed, Apr 30, 2014 at 07:41:40AM +0100, Jungseok Lee wrote:
On Tuesday, April 29, 2014 11:48 PM, Catalin Marinas wrote:
On Tue, Apr 29, 2014 at 05:59:27AM +0100, Jungseok Lee wrote:
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -8,10 +8,11 @@ This
Hi Shaik,
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch corrects the wrong parent-child relationship
between sysmmu-mfc clocks.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
Hoping you have tested vedio playback with this patch,
From: Rahul Sharma rahul.sha...@samsung.com
While testing S2R on exynos board, system is hanging and
rebooting due to nested mutex_lock calls in exynos drm
resume callback. Changing the order of the calls is fixing
the issue.
Signed-off-by: Rahul Sharma rahul.sha...@samsung.com
---
Based on
Hi shaik,
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch fixes the wrong register offset for sclk_bpll clock.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
Reviwed-by: Alim Akhtar alim.akh...@samsung.com
Hi Shaik
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch adds more register offsets to the restore list.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
Reviewed-by: Alim Akhtar alim.akh...@samsung.com
Generic framework for tracking internal interfaces
==
Summary
---
interface_tracker is a generic framework which allows to track appearance
and disappearance of different interfaces provided by kernel/driver code inside
the kernel. Examples of
Hi Shaik
On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha
shaik.am...@samsung.com wrote:
This patch adds clock ID for mout_sclk_vpll clock
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/clk/samsung/clk-exynos5420.c |2 +-
include/dt-bindings/clock/exynos5420.h
drm_panel framework allows only query for presence of given panel.
It also does not protect panel module from unloading and does not
provide solution for driver unbinding. interface_tracker
should solve both issues.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
---
Panel is powered off already by connector during drm_panel_remove call.
Signed-off-by: Andrzej Hajda a.ha...@samsung.com
---
drivers/gpu/drm/panel/panel-ld9040.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-ld9040.c
b/drivers/gpu/drm/panel/panel-ld9040.c
index
exynos_dpi uses connector polling for tracking panel presence,
this solution introduces unnecessary 10s delay before panel activation.
Moreover it is unsafe, module unloading or driver unbinding can
cause system crash. interface_tracker support solves both problems.
Signed-off-by: Andrzej Hajda
interface_tracker is a generic framework which allows to track appearance
and disappearance of different interfaces provided by kernel/driver code inside
the kernel. Examples of such interfaces: clocks, phys, regulators, drm_panel...
Interface is specified by a pair of object pointer and interface
On 04/30/2014 12:38 PM, Arun Kumar K wrote:
Hi Hans,
On 04/22/14 18:22, Hans Verkuil wrote:
On 04/21/2014 11:26 AM, Arun Kumar K wrote:
From: Pawel Osciak posc...@chromium.org
This event indicates that the decoder has reached a point in the stream,
at which the resolution changes. The
Hi Shaik,
On 24 April 2014 18:33, Shaik Ameer Basha shaik.am...@samsung.com wrote:
This patch fixes the wrong register offset for sclk_bpll clock.
Since this patch is a fix, it is better to send it separately so that
it gets into one of
the upcoming RCs (and if needed to stable).
Hi Shaik,
On 24 April 2014 18:33, Shaik Ameer Basha shaik.am...@samsung.com wrote:
This patch fixes some parent-child relationships according
to the latest datasheet and adds more clocks related to
PERIS and GEN blocks.
Again, it is better to split up the fixes from other stuff so that it
can
On Wed, Apr 30, 2014 at 04:02:50PM +0200, Andrzej Hajda wrote:
Generic framework for tracking internal interfaces
==
Summary
---
interface_tracker is a generic framework which allows to track appearance
and disappearance of different
Hi Vivek,
On 30 April 2014 14:25, Vivek Gautam gautam.vi...@samsung.com wrote:
From: Kamil Debski k.deb...@samsung.com
Add support to PHY of USB2 of the Exynos 5250 SoC.
Signed-off-by: Kamil Debski k.deb...@samsung.com
[gautam.vi...@samsung.com: Split the usb phy entries from
syscon
On 30 April 2014 14:25, Vivek Gautam gautam.vi...@samsung.com wrote:
Add required device node for ehci and ohci controllers to
enable USB 2.0 support.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
---
arch/arm/boot/dts/exynos5420.dtsi | 36 +++-
1
Arun,
On Wed, Apr 23, 2014 at 9:17 PM, Arun Kumar K arun...@samsung.com wrote:
Adds the google peach-pit board dts file which uses
exynos5420 SoC.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
---
Changes from v1
---
-
On ARM Chromebooks we have a few devices that are accessed by both the
AP (the main Application Processor) and the EC (the Embedded
Controller). These are:
* The battery (sbs-battery).
* The power management unit tps65090.
On the original Samsung ARM Chromebook these devices were on an I2C
bus
The cros_ec_spi transfer had two problems with its timeout code:
1. It looked at the timeout even in the case that it found valid data.
2. If the cros_ec_spi code got switched out for a while, it's possible
it could get a timeout after a single loop. Let's be paranoid and
make sure we do
We're adding i2c tunneling to the list of things that goes over
cros_ec. i2c tunneling can be slooow, so increase our deadline to
100ms to account for that.
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Lee Jones lee.jo...@linaro.org
Reviewed-by: Simon Glass s...@chromium.org
The main transfer function for cros_ec_spi can be called by more than
one client at a time. Make sure that those clients don't stomp on
each other by locking the bus for the duration of the transfer
function.
Signed-off-by: Doug Anderson diand...@chromium.org
Acked-by: Lee Jones
This adds the EC i2c tunnel (and devices under it) to the
tegra124-venice2 device tree.
Signed-off-by: Doug Anderson diand...@chromium.org
Tested-by: Andrew Bresticker abres...@chromium.org
Tested-by: Stephen Warren swar...@nvidia.com
---
Changes in v3: None
Changes in v2:
- Removed i2c20 alias
This series adds the most critical cros_ec changes for newer boards
using cros_ec. Specifically:
* Fixes timing/locking issues with the previously upstreamed (but
never used upstream) cros_ec_spi driver.
* Updates the cros_ec header file to the latest version which allows
us to use newer EC
From: David Hendricks dhend...@chromium.org
To avoid spamming the EC we calculate the time between the previous
transfer and the current transfer and force a delay if the time delta
is too small.
However, a small miscalculation causes the delay period to be
far too short. Most noticably this
From: Bill Richardson wfric...@chromium.org
This just updates include/linux/mfd/cros_ec_commands.h to match the
latest EC version (which is the One True Source for such things). See
https://chromium.googlesource.com/chromiumos/platform/ec
[dianders: took today's ToT version from the Chromium OS
On Wed, Apr 30, 2014 at 05:30:39PM +0530, Tushar Behera wrote:
XCLKOUT mux register (0x10040a00) is not part of core clock SFR range,
rather it is part of pmu-system-controller node.
One option would be to add a clock provider for XCLKOUT. That would
require me to extend current clock driver
Hi Thierry,
On Monday 28 April 2014 23:25:50 Thierry Reding wrote:
On Mon, Apr 28, 2014 at 05:05:24PM +0200, Laurent Pinchart wrote:
On Tuesday 22 April 2014 10:24:39 YoungJun Cho wrote:
On 04/22/2014 08:00 AM, Laurent Pinchart wrote:
Hi YoungJun,
Thank you for the patch.
Hi Naveen, Herbert,
On 04/30/14 15:14, Herbert Xu wrote:
On Wed, Apr 30, 2014 at 04:38:05PM +0530, Naveen Krishna Ch wrote:
Hello All,
On 28 April 2014 16:14, Naveen Krishna Chatradhich.nav...@samsung.com wrote:
SSS module on Exynos4210, Exynos5250 and Exynos5420 SoCs has added
features to
From: Byungho An bh74...@samsung.com
Date: Tue, 29 Apr 2014 13:15:17 +0900
This patch adds rxqueue enable function according to number of rxqueue
and adds rxqueue disable function for removing.
Signed-off-by: Byungho An bh74...@samsung.com
Applied.
--
To unsubscribe from this list: send
From: Byungho An bh74...@samsung.com
Date: Tue, 29 Apr 2014 13:15:15 +0900
This patch moves sw reset to probe function because
sw reset is needed early stage before open function.
Signed-off-by: Byungho An bh74...@samsung.net
Applied.
--
To unsubscribe from this list: send the line
From: Byungho An bh74...@samsung.com
Date: Tue, 29 Apr 2014 13:15:27 +0900
This patch adds set_rx_int_on_com function for interrupt when
dma is completed.
Signed-off-by: Byungho An bh74...@samsung.com
Applied.
--
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On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:
From: Naveen Krishna Ch ch.nav...@samsung.com
Using pdev-dev with device_for_each_child() would iterate over all
of the children of the platform device and delete them.
Thus, causing crashes during module unload.
We should be using the
On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:
From: Naveen Krishna Ch ch.nav...@samsung.com
This patch maintains the following order in
probe(), remove(), resume() and suspend() calls
regulator enable, clk prepare enable
...
clk disable unprepare, regulator disable
While at it,
1. enable
On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:
ADC module on Exynos5 SoCs runs at 600KSPS. At this conversion rate,
waiting for 1000 msecs is wasteful (incase of h/w failure).
Hence, reduce the time out to 100msecs and use
wait_for_completion_timeout() instead of
On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:
Do a soft reset software if a timeout happens.
This is applicable only for ADC_V2.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Applied to the togreg branch of iio.git
Thanks,
On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:
Add reinit_completion() before the wait_for_completion_timeout in
raw_read() call.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Doug Anderson diand...@chromium.org
Applied to the togreg branch of iio.git
I wasn't
Hi Greg,
Thanks for comments. I CC Laurent, I hope it could be interesting for
him also.
Greg Kroah-Hartman wrote, On 30.04.2014 17:49:
On Wed, Apr 30, 2014 at 04:02:50PM +0200, Andrzej Hajda wrote:
Generic framework for tracking internal interfaces
Mike,
On 08.04.2014 17:45, Tomasz Figa wrote:
Hi,
On 04.04.2014 16:53, Tomasz Stanislawski wrote:
This patch adds support for propagation of setup of clock's parent one
level
up.
This feature is helpful when a driver changes topology of its clocks
using
clk_set_parent(). The problem occurs
On Wed, Apr 30, 2014 at 11:42:09PM +0200, Andrzej Hajda wrote:
The main problem with component framework is that componentization
significantly changes every driver and changes it in a way which is not
compatible with traditional drivers, so devices which are intended to
work with
On 15.04.2014 18:30, Sylwester Nawrocki wrote:
Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock
defined exactly in same way in documentation. Using different
names for these clocks is a bit misleading. Since there is no users
of CLK_MDMA2 in existing dts files this patch drops
On 28.04.2014 11:37, Arun Kumar K wrote:
This patch adds the required clocks for ARM Mali IP
in Exynos5250.
Signed-off-by: Arun Kumar K arun...@samsung.com
---
Changes from v5
- Addressed comments from Tomasz Figa
http://www.spinics.net/lists/arm-kernel/msg326118.html
Changes from v4
-
On 04.04.2014 16:53, Tomasz Stanislawski wrote:
Export sclk_hdmiphy clock to be usable from DT.
Signed-off-by: Tomasz Stanislawski t.stanisl...@samsung.com
---
drivers/clk/samsung/clk-exynos4.c |2 +-
include/dt-bindings/clock/exynos4.h |1 +
2 files changed, 2 insertions(+), 1
Jonathan,
On Wed, Apr 30, 2014 at 1:49 PM, Jonathan Cameron ji...@kernel.org wrote:
On 30/04/14 10:26, Naveen Krishna Chatradhi wrote:
Add reinit_completion() before the wait_for_completion_timeout in
raw_read() call.
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
On Wednesday, April 30, 2014 10:12 PM, Catalin Marinas wrote:
On Wed, Apr 30, 2014 at 07:41:40AM +0100, Jungseok Lee wrote:
On Tuesday, April 29, 2014 11:48 PM, Catalin Marinas wrote:
On Tue, Apr 29, 2014 at 05:59:27AM +0100, Jungseok Lee wrote:
--- a/Documentation/arm64/memory.txt
On Tue, Apr 29, 2014 at 07:18:22PM +0800, Xia Kaixu wrote:
From: Arnd Bergmann a...@arndb.de
Building ARM randconfig got into a situation where CONFIG_INPUT
is turned off and SND_SOC_ALL_CODECS is turned on, which failed
for two codecs trying to use the input subsystem. Some other
Applied,
On Tue, Apr 29, 2014 at 09:31:30PM -0500, Brian Austin wrote:
I assume you mean the CS42L52 instead of the L51. INPUT is used for a BEEP
Generator but when I disable CONFIG_INPUT I do not get an error. Is there
any information available on what the error is?
I suspect it's ASoC built in and
On Apr 30, 2014, at 20:31, Mark Brown broo...@kernel.org wrote:
On Tue, Apr 29, 2014 at 09:31:30PM -0500, Brian Austin wrote:
I assume you mean the CS42L52 instead of the L51. INPUT is used for a BEEP
Generator but when I disable CONFIG_INPUT I do not get an error. Is there
any
On Apr 30, 2014, at 8:54 PM, Austin, Brian brian.aus...@cirrus.com wrote:
On Apr 30, 2014, at 20:31, Mark Brown broo...@kernel.org wrote:
On Tue, Apr 29, 2014 at 09:31:30PM -0500, Brian Austin wrote:
I assume you mean the CS42L52 instead of the L51. INPUT is used for a BEEP
Generator
This patch fixed the following checkpatch complaint as using pr_*
instead of printk.
WARNING: printk() should include KERN_ facility level
Cc: Catalin Marinas catalin.mari...@arm.com
Signed-off-by: Jungseok Lee jays@samsung.com
Reviewed-by: Sungjinn Chung sungjinn.ch...@samsung.com
---
This patch adds memory layout and translation lookup information
about 48-bit address space with 4K pages. The description is based
on 4 levels of translation tables.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Steve Capper steve.cap...@linaro.org
Signed-off-by: Jungseok Lee
This patch adds hardware definition and types for 4 levels of
translation tables with 4KB pages.
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Steve Capper steve.cap...@linaro.org
Signed-off-by: Jungseok Lee jays@samsung.com
Reviewed-by: Sungjinn Chung sungjinn.ch...@samsung.com
---
This patch adds virtual address space size and a level of translation
tables to kernel configuration. It facilicates introduction of
different MMU options, such as 4KB + 4 levels, 16KB + 4 levels and
64KB + 3 levels, easily.
The idea is based on the discussion with Catalin Marinas:
This patch implements 4 levels of translation tables since 3 levels
of page tables with 4KB pages cannot support 40-bit physical address
space described in [1] due to the following issue.
It is a restriction that kernel logical memory map with 4KB + 3 levels
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