On 18 June 2014 12:14, Doug Anderson wrote:
> From: Andrew Bresticker
>
> If we receive EC interrupts after the cros_ec driver has probed, but
> before the cros_ec_keyb driver has probed, the cros_ec IRQ handler
> will not run the cros_ec_keyb notifier and the EC will leave the IRQ
> line asserte
On 18 June 2014 12:14, Doug Anderson wrote:
> From: Bill Richardson
>
> Just because the host was able to talk to the EC doesn't mean that the EC
> was happy with what it was told. Errors in communincation are not the same
> as error messages from the EC itself.
>
> This change lets the EC report
On 18 June 2014 12:14, Doug Anderson wrote:
> From: Bill Richardson
>
> This is some internal structure reorganization / renaming to prepare
> for future patches that will add a userspace API to cros_ec. There
> should be no visible changes.
>
> Signed-off-by: Bill Richardson
> Signed-off-by: D
On Thu, Jun 19, 2014 at 6:11 PM, Jaehoon Chung wrote:
> On 06/19/2014 07:40 PM, Sachin Kamat wrote:
>> On Thu, Jun 19, 2014 at 2:40 PM, Tim Kryger wrote:
>>> On Thu, Jun 19, 2014 at 1:49 AM, Sachin Kamat wrote:
+cc Some relevant guys from Samsung
On Thu, Jun 19, 2014 at 2:12 PM, T
Hello Tomasz,
On 20 June 2014 06:00, Tomasz Figa wrote:
> On 20.06.2014 02:28, Chanwoo Choi wrote:
>> On 06/20/2014 09:24 AM, Tomasz Figa wrote:
>>> On 20.06.2014 02:22, Chanwoo Choi wrote:
Hi Tomasz,
On 06/18/2014 04:58 PM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 18.06
On 20.06.2014 02:28, Chanwoo Choi wrote:
> On 06/20/2014 09:24 AM, Tomasz Figa wrote:
>> On 20.06.2014 02:22, Chanwoo Choi wrote:
>>> Hi Tomasz,
>>>
>>> On 06/18/2014 04:58 PM, Tomasz Figa wrote:
Hi Chanwoo,
On 18.06.2014 04:20, Chanwoo Choi wrote:
> This patch control special cl
On 06/20/2014 09:24 AM, Tomasz Figa wrote:
> On 20.06.2014 02:22, Chanwoo Choi wrote:
>> Hi Tomasz,
>>
>> On 06/18/2014 04:58 PM, Tomasz Figa wrote:
>>> Hi Chanwoo,
>>>
>>> On 18.06.2014 04:20, Chanwoo Choi wrote:
This patch control special clock for ADC in Exynos series's FSYS block.
If
On 20.06.2014 02:20, Chanwoo Choi wrote:
> Hi Tomasz,
>
> On 06/18/2014 04:55 PM, Tomasz Figa wrote:
>> Hi Chanwoo,
>>
>> On 18.06.2014 04:20, Chanwoo Choi wrote:
>>> This patchset add 'exynos_adc_ops' structure which includes some functions
>>> to control ADC operation according to ADC version (v
On 20.06.2014 02:22, Chanwoo Choi wrote:
> Hi Tomasz,
>
> On 06/18/2014 04:58 PM, Tomasz Figa wrote:
>> Hi Chanwoo,
>>
>> On 18.06.2014 04:20, Chanwoo Choi wrote:
>>> This patch control special clock for ADC in Exynos series's FSYS block.
>>> If special clock of ADC is registerd on clock list of c
Hi Tomasz,
On 06/18/2014 04:58 PM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 18.06.2014 04:20, Chanwoo Choi wrote:
>> This patch control special clock for ADC in Exynos series's FSYS block.
>> If special clock of ADC is registerd on clock list of common clk framework,
>> Exynos ADC drvier have to c
Hi Tomasz,
On 06/18/2014 04:55 PM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 18.06.2014 04:20, Chanwoo Choi wrote:
>> This patchset add 'exynos_adc_ops' structure which includes some functions
>> to control ADC operation according to ADC version (v1 or v2).
>>
>> Signed-off-by: Chanwoo Choi
>> Ack
On Fri, 4 Apr 2014 17:22:01 +0800
Daniel Kurtz wrote:
> Kernel access to the eyxnos fbdev framebuffer is via its gem object's
> kernel mapping (kvaddr, stored in info->screen_base).
>
> User space access is provided by mmap(), read() and write() of /dev/fb/fb0.
> These functions also only use s
Kevin,
On Thu, Jun 19, 2014 at 11:43 AM, Kevin Hilman wrote:
> Doug Anderson writes:
>
>> The original code for the exynos i2c controller registered for the
>> "noirq" variants. However during review feedback it was moved to
>> SIMPLE_DEV_PM_OPS without anyone noticing that it meant we were no
the MCPM
> back-end.
>
> The patch is based on Linux-next 20140619. It has been tested on an
> exynos5420-based chromebook using the "/dev/bL_switcher" interface as
> well as the script provided by Nicolas Pitre and Dave Martin [1].
>
> Patch depends on:
> [v2] ARM: EXYN
Doug Anderson writes:
> The original code for the exynos i2c controller registered for the
> "noirq" variants. However during review feedback it was moved to
> SIMPLE_DEV_PM_OPS without anyone noticing that it meant we were no
> longer actually "noirq" (despite functions named
> exynos5_i2c_susp
By using the generic IRQ support in the Register map API, it
is possible to get rid max77686-irq.c and simplify the code.
Suggested-by: Krzysztof Kozlowski
Signed-off-by: Javier Martinez Canillas
Acked-by: Lee Jones
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
---
Changes since v2:
-
This patch adds a dt-binding include for Maxim 77686
PMIC clock IDs that can be to be shared between the
clk-max77686 clock driver and DeviceTree source files.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/clk-max77686.c | 7 +--
include/dt-bindings/clock/maxim,max
From: Doug Anderson
The max77686 includes an RTC that keeps power during suspend. It's
convenient to be able to use it as a wakeup source.
Signed-off-by: Doug Anderson
---
drivers/rtc/rtc-max77686.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/rtc/
Like most clock drivers, the Maxim 77686 PMIC clock binding
follows the convention that the "#clock-cells" property is
used to specify the number of cells in a clock provider.
But the binding document is not clear enough that it shall
be set to 1 since the PMIC support multiple clocks outputs.
Al
Maxim Integrated Power Management ICs are very similar with
regard to their clock outputs. Most of the clock drivers for
these chips are duplicating code and are simpler enough that
can be converted to use a generic driver to consolidate code
and avoid duplication.
Signed-off-by: Javier Martinez C
Add Device Tree binding documentation for Maxim 77802 PMIC.
Signed-off-by: Javier Martinez Canillas
---
Changes since v2:
- Explain better the Dynamic Voltage Scaling (DVS) support in some Buck
regulators and the max77802,pmic-buck-{dvs,selb}-gpios properties.
Suggested by Mark Brown.
D
Clocks drivers for Maxim PMIC are very similar so they can
be converted to use the generic Maxim clock driver.
Also, while being there use module_platform_driver() helper
macro to eliminate more boilerplate code.
Signed-off-by: Javier Martinez Canillas
---
drivers/clk/Kconfig| 1 +
dr
Maxim MAX77802 is a power management chip that contains 10 high
efficiency Buck regulators, 32 Low-dropout (LDO) regulators used
to power up application processors and peripherals, a 2-channel
32kHz clock outputs, a Real-Time-Clock (RTC) and a I2C interface
to program the individual regulators, clo
Some device drivers using the register map API need to copy the
value from one register to another. Even though it can be done
with a combination of regmap_read() and regmap_write(), it is
better to have a function to avoid code duplication, sanity check
passed values and do it atomically by holdin
The MAX77802 PMIC has 10 high-efficiency Buck and 32 Low-dropout
(LDO) regulators. This patch adds support for all these regulators
found on the MAX77802 PMIC and is based on a driver added by Simon
Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
Changes since
The MAX77802 PMIC has two 32.768kHz Buffered Clock Outputs with
Low Jitter Mode. This patch adds support for these two clocks.
Signed-off-by: Javier Martinez Canillas
---
Changes since v2: None
Changes since v1:
- Use module_platform_driver() instead of having init/exit functions.
Suggested
Add Device Tree binding documentation for the clocks
outputs in the Maxim 77802 Power Management IC.
Signed-off-by: Javier Martinez Canillas
---
Changes since v2:
- Split the DT binding documentation in a separate patch.
.../devicetree/bindings/clock/maxim,max77802.txt | 42
The MAX7802 PMIC has a Real-Time-Clock (RTC) with two alarms.
This patch adds support for the RTC and is based on a driver
added by Simon Glass to the Chrome OS kernel 3.8 tree.
Signed-off-by: Javier Martinez Canillas
---
drivers/rtc/Kconfig| 10 +
drivers/rtc/Makefile | 1 +
dr
Peach pit board uses a Maxim 77802 power management IC to
drive regulators and its Real Time Clock. This patch adds
support for this chip.
These are the device nodes and pinctrl configuration that
is present on the Peach pit DeviceTree source file in the
the Chrome OS kernel 3.8 tree.
Signed-off-
MAX77802 is a PMIC that contains 10 high efficiency Buck regulators,
32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs,
a Real-Time-Clock (RTC) and a I2C interface to program the individual
regulators, clocks and the RTC.
This third version of the patch-set addresses several issues
In (93bfb76 clocksource: exynos_mct: register sched_clock callback) we
supported using the MCT as a scheduler clock. We properly marked
exynos4_read_sched_clock() as notrace. However, we then went and
called another function that _wasn't_ notrace. That means if you do:
cd /sys/kernel/debug/tr
Daniel,
On Tue, Jun 17, 2014 at 5:13 AM, Daniel Lezcano
wrote:
> On 06/04/2014 07:30 PM, Doug Anderson wrote:
>>
>> In (93bfb76 clocksource: exynos_mct: register sched_clock callback) we
>> supported using the MCT as a scheduler clock. We properly marked
>> exynos4_read_sched_clock() as notrace.
On 19.06.2014 18:31, Doug Anderson wrote:
> Tomasz,
>
> On Thu, Jun 19, 2014 at 9:17 AM, Tomasz Figa wrote:
>> On 19.06.2014 18:01, Doug Anderson wrote:
>>> Hi,
>>>
>>> On Thu, Jun 19, 2014 at 3:21 AM, Tomasz Figa wrote:
> +static struct delay_timer exynos4_delay_timer;
> +
> +static
Tomasz,
On Thu, Jun 19, 2014 at 9:17 AM, Tomasz Figa wrote:
> On 19.06.2014 18:01, Doug Anderson wrote:
>> Hi,
>>
>> On Thu, Jun 19, 2014 at 3:21 AM, Tomasz Figa wrote:
+static struct delay_timer exynos4_delay_timer;
+
+static unsigned long exynos4_read_current_timer(void)
>>
>> N
On 19.06.2014 18:01, Doug Anderson wrote:
> Hi,
>
> On Thu, Jun 19, 2014 at 3:21 AM, Tomasz Figa wrote:
>>> +static struct delay_timer exynos4_delay_timer;
>>> +
>>> +static unsigned long exynos4_read_current_timer(void)
>
> Note: I think this should return a cycles_t, not an unsigned long.
> Th
Daniel,
On Thu, Jun 19, 2014 at 9:02 AM, Daniel Lezcano
wrote:
>> My understanding of the current status is:
>> * I posed the 64-bit version that's almost as fast as the 32-bit version.
>> * I asked if people want the 32-bit version: no answer
>> * I asked if anyone is opposed to the 64-bit versi
On 06/19/2014 05:49 PM, Doug Anderson wrote:
Daniel,
On Thu, Jun 19, 2014 at 2:07 AM, Daniel Lezcano
wrote:
On 06/19/2014 01:17 AM, Doug Anderson wrote:
Amit,
Thanks for posting!
On Wed, Jun 18, 2014 at 4:31 AM, Amit Daniel Kachhap
wrote:
This patch register the exynos mct clocksource a
Hi,
On Thu, Jun 19, 2014 at 3:21 AM, Tomasz Figa wrote:
>> +static struct delay_timer exynos4_delay_timer;
>> +
>> +static unsigned long exynos4_read_current_timer(void)
Note: I think this should return a cycles_t, not an unsigned long.
They're the same (right now), but probably shouldn't be (se
Daniel,
On Thu, Jun 19, 2014 at 2:07 AM, Daniel Lezcano
wrote:
> On 06/19/2014 01:17 AM, Doug Anderson wrote:
>>
>> Amit,
>>
>> Thanks for posting!
>>
>> On Wed, Jun 18, 2014 at 4:31 AM, Amit Daniel Kachhap
>> wrote:
>>>
>>> This patch register the exynos mct clocksource as the current timer
>>>
This situation arises when userspace remove the frambuffer object
and call setmode ioctl.
drm_mode_rmfb --> drm_plane_force_disable --> plane->crtc = NULL;
and
drm_mode_setcrtc --> exynos_plane_commit --> passes plane->crtc to
exynos_drm_crtc_plane_commit which is NULL.
This crashes the system.
On Wed, 18 Jun 2014 15:10:48 +0100
Lee Jones wrote:
> > So I guess you should either a) take the whole patch-set through your mfd
> > tree
> > or b) merge the mfd patches and create an immutable branch that can be
> > pulled by
> > Mark, Mike and Alessandro.
> >
> > I don't know what's the pre
On 19.06.2014 13:44, Daniel Drake wrote:
> On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
> wrote:
>> This patch adds port sub-nodes to exynos4 ehci and ohci modules, which
>> are required by recently merged new exynos4 usb2 phy support.
>>
>> Signed-off-by: Marek Szyprowski
>
> I checked th
On 19.06.2014 14:21, Daniel Drake wrote:
> On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
> wrote:
>> This patch adds support for common hardware modules available on all
>> Exynos4412-based Odroid boards, which already have complete support in
>> mainline kernel. This includes secure firmware
On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
wrote:
> This patch moves some parts of exynos4412-odroidx.dts to common
> exynos4412-odroid-common.dtsi file and adds support for Odroid X2 and
> U2/U3 boards. X2 is same as X, but it has faster SoC module (1.7GHz
> instead of 1.4GHz), while U2/U
On 06/19/2014 07:40 PM, Sachin Kamat wrote:
> On Thu, Jun 19, 2014 at 2:40 PM, Tim Kryger wrote:
>> On Thu, Jun 19, 2014 at 1:49 AM, Sachin Kamat wrote:
>>> +cc Some relevant guys from Samsung
>>>
>>> On Thu, Jun 19, 2014 at 2:12 PM, Tim Kryger wrote:
On Wed, Jun 18, 2014 at 8:54 PM, Sachin
polling the cluster power
status register.
Signed-off-by: Abhilash Kesavan
Acked-by: Nicolas Pitre
---
Change in v2:
Added a macro for the COMMON_OPTION register and used it in the MCPM
back-end.
The patch is based on Linux-next 20140619. It has been tested on an
exynos5420-based chromebook using the
On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
wrote:
> From: Kamil Debski
>
> This patch adds basic support for USB modules (host and device) on
> OdroidX board.
>
> Signed-off-by: Kamil Debski
> Signed-off-by: Marek Szyprowski
Checked that this conforms to the documented DT bindings.
Re
Hi Nicolas,
On Wed, Jun 18, 2014 at 9:10 PM, Nicolas Pitre wrote:
> On Wed, 18 Jun 2014, Abhilash Kesavan wrote:
>
>> Turning off a cluster when all 4 cores of the cluster are powered off
>> saves power significantly. Powering off the A15 L2 alone gives around
>> 100mW in savings. Add support for
On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
wrote:
> This patch adds support for common hardware modules available on all
> Exynos4412-based Odroid boards, which already have complete support in
> mainline kernel. This includes secure firmware calls, watchdog, g2d and
> fimc (mem2mem) multi
On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski
wrote:
> This patch adds port sub-nodes to exynos4 ehci and ohci modules, which
> are required by recently merged new exynos4 usb2 phy support.
>
> Signed-off-by: Marek Szyprowski
I checked this against the DT binding documentation for the
samsu
On Thu, Jun 19, 2014 at 4:00 PM, Daniel Lezcano
wrote:
> On 06/19/2014 12:21 PM, amit daniel kachhap wrote:
>>
>> On Thu, Jun 19, 2014 at 2:41 PM, Daniel Lezcano
>> wrote:
>>>
>>> On 06/19/2014 10:39 AM, Amit Daniel Kachhap wrote:
This patch register the exynos mct clocksource as t
On Thu, Jun 19, 2014 at 2:40 PM, Tim Kryger wrote:
> On Thu, Jun 19, 2014 at 1:49 AM, Sachin Kamat wrote:
>> +cc Some relevant guys from Samsung
>>
>> On Thu, Jun 19, 2014 at 2:12 PM, Tim Kryger wrote:
>>> On Wed, Jun 18, 2014 at 8:54 PM, Sachin Kamat wrote:
>>>
> On Wed, Jun 18, 2014 at 4:
On 06/19/2014 12:21 PM, amit daniel kachhap wrote:
On Thu, Jun 19, 2014 at 2:41 PM, Daniel Lezcano
wrote:
On 06/19/2014 10:39 AM, Amit Daniel Kachhap wrote:
This patch register the exynos mct clocksource as the current timer
as it has constant clock rate. This will generate correct udelay for
On Thursday 19 June 2014 15:51:58 amit daniel kachhap wrote:
> I also didn't want to use macros but used as a last option. you want
> me to put more comments here?
> Or something like below is also possible for checking the size of
> (unsigned long) in runtime.
>
> unsigned long x;
> unsigned int
Hi Amit,
Please see my comments inline.
On 19.06.2014 10:39, Amit Daniel Kachhap wrote:
> This patch register the exynos mct clocksource as the current timer
> as it has constant clock rate. This will generate correct udelay for the
> exynos platform and avoid using unnecessary calibrated jiffies
On Thu, Jun 19, 2014 at 2:41 PM, Daniel Lezcano
wrote:
> On 06/19/2014 10:39 AM, Amit Daniel Kachhap wrote:
>>
>> This patch register the exynos mct clocksource as the current timer
>> as it has constant clock rate. This will generate correct udelay for the
>> exynos platform and avoid using unnec
On 06/19/2014 10:39 AM, Amit Daniel Kachhap wrote:
This patch register the exynos mct clocksource as the current timer
as it has constant clock rate. This will generate correct udelay for the
exynos platform and avoid using unnecessary calibrated jiffies. This change
has been tested on exynos5420
On Thu, Jun 19, 2014 at 1:49 AM, Sachin Kamat wrote:
> +cc Some relevant guys from Samsung
>
> On Thu, Jun 19, 2014 at 2:12 PM, Tim Kryger wrote:
>> On Wed, Jun 18, 2014 at 8:54 PM, Sachin Kamat wrote:
>>
On Wed, Jun 18, 2014 at 4:33 AM, Sachin Kamat wrote:
>>
> I see the below error o
On 06/19/2014 01:17 AM, Doug Anderson wrote:
Amit,
Thanks for posting!
On Wed, Jun 18, 2014 at 4:31 AM, Amit Daniel Kachhap
wrote:
This patch register the exynos mct clocksource as the current timer
as it has constant clock rate. This will generate correct udelay for the
exynos platform and a
+cc Some relevant guys from Samsung
On Thu, Jun 19, 2014 at 2:12 PM, Tim Kryger wrote:
> On Wed, Jun 18, 2014 at 8:54 PM, Sachin Kamat wrote:
>
>>> On Wed, Jun 18, 2014 at 4:33 AM, Sachin Kamat wrote:
>
I see the below error on Exynos4210 based Origen board with linux-next
(20140618).
On Wed, Jun 18, 2014 at 8:54 PM, Sachin Kamat wrote:
>> On Wed, Jun 18, 2014 at 4:33 AM, Sachin Kamat wrote:
>>> I see the below error on Exynos4210 based Origen board with linux-next
>>> (20140618).
>>> Reverting the below commit works fine.
>>>
>>> Commit: 8d02e775a6 "mmc: sdhci: Use mmc core
This patch register the exynos mct clocksource as the current timer
as it has constant clock rate. This will generate correct udelay for the
exynos platform and avoid using unnecessary calibrated jiffies. This change
has been tested on exynos5420 based board and udelay is very close to
expected.
S
On Thu, Jun 19, 2014 at 4:47 AM, Doug Anderson wrote:
> Amit,
>
> Thanks for posting!
>
> On Wed, Jun 18, 2014 at 4:31 AM, Amit Daniel Kachhap
> wrote:
>> This patch register the exynos mct clocksource as the current timer
>> as it has constant clock rate. This will generate correct udelay for th
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