Hi, All.
Is there any other opinion about this patch?
Best Regards,
Jaehoon Chung
On 09/16/2015 03:43 PM, Shawn Lin wrote:
> DesignWare MMC Controller's transfer mode should be decided
> at runtime instead of compile-time. So we remove this config
> option and read dw_mmc's
Hi, All.
Is there any other opinion about this patch?
Best Regards,
Jaehoon Chung
On 09/16/2015 03:43 PM, Shawn Lin wrote:
> DesignWare MMC Controller's transfer mode should be decided
> at runtime instead of compile-time. So we remove this config
> option and read dw_mmc's
0
for mshc.
Signed-off-by: Jaehoon Chung
---
Changelog v2:
- Drop "mmc: dw_mmc: exynos: Add the exynos3250 compatible" patch.
- Describe commit-message more detailedly than before.
- Change to exynos5420, not add new compatible (exynos3250).
arch/arm/boot/dts/
On 10/22/2015 12:51 PM, Krzysztof Kozlowski wrote:
> On 22.10.2015 11:54, Jaehoon Chung wrote:
>> Hi, Krzysztof.
>>
>> On 10/22/2015 09:06 AM, Krzysztof Kozlowski wrote:
>>> On 21.10.2015 15:39, Jaehoon Chung wrote:
>>>> To check more exactly, add the exyn
Hi, Krzysztof.
On 10/22/2015 09:06 AM, Krzysztof Kozlowski wrote:
> On 21.10.2015 15:39, Jaehoon Chung wrote:
>> To check more exactly, add the exynos3250 compatible.
>> Not use exynos5250 compatibility.
>
> Hi,
>
> I can't find any difference between ol
= 5000Hz (slot
>>>>> req 5000Hz, actual 5000HZ div = 0)
>>>>> [4.001604] mmc1: new ultra high speed DDR50 SDHC card at address
>>>>> [4.00450
To use more excatly, change compatible from exynos5250 to exynos3250.
Exynos3250 and exnos5250 are some difference.
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos3250.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos3250.dtsi
b
To check more exactly, add the exynos3250 compatible.
Not use exynos5250 compatibility.
Signed-off-by: Jaehoon Chung
---
Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt | 2 ++
drivers/mmc/host/dw_mmc-exynos.c | 7 +++
2 files changed, 9 insertions(+)
diff
torage part of User manual, it described the overview.
Mobile storage host supports these specification:
- Secure Digital memory (SD memory version 3.0)
- Secure Digital I/O SDIO (SDIO version 3.0)
- etc...
SD3.0 is supported UHS-I mode.
If user manual of exynos5422 is mentioned this specificatio
g = <0 2>;
>>>>>>>> +vmmc-supply = <&ldo19_reg>;
>>>>>>>> +vqmmc-supply = <&ldo13_reg>;
>>>>>>>
>>>>>>> It looks wrong. LDO13 is used in one place as VQMMC and in other as
>>>>>>> VMMC. How did you figure out which regulator supplies which power
>>>>>>> domain?
>>>>>>>
>>>>>
>>>>> I refer Schematics diagram to XU4_MAIN_REV0.1.pdf
>>>>>
>>>>> From the PWR_PMCI_S2MPS11_LDO_CTRL document it LDO13 point to VDDQ_MMC2.
>>>>>
>>>>
>>>> Aaa right, by mistake I thought that you put LDO13 here and in the node
>>>> before, but there is LDO3, not 13. You did this correctly.
>>>>
>>>> But I have two other questions:
>>>> 1. Maybe these regulators now should not be always-enabled?
>>>
>>> regulator-always-on can be removed: I have tested this.
>>>
>>>> 2. Why changing minimum voltage of LDO13 to 1.8V? The schematics says 2.8V.
>>>>
>>>
>>> In the schematics diagram to XU4_MAIN_REV0.1.pdf
>>>
>>> >From the EXYNOS5422 MMC UFS diagram CH2 range is VDDQ_MMC2 (1.8V/2.8V).
>>
>> Okay, so try to setting it to 1.8V (min and max) and see if it works
>> correctly.
>>
>> On the same diagram few lines below:
>> VDDQ_MMC2: 2.8V 250mA
>>
>
> You are correct.
> While working on this issue I tent to encounter make bugs.
> -
> [4.713553] random: nonblocking pool is initialized
> [4.718423] 1453.hdmi supply hdmi-en not found, using dummy regulator
> [4.726206] exynos-drm exynos-drm: bound 1440.fimd (ops
> fimd_component_ops)
> [4.732555] exynos-drm exynos-drm: bound 1445.mixer (ops
> mixer_component_ops)
> [4.740180] exynos-drm exynos-drm: bound 1453.hdmi (ops
> hdmi_component_ops)
> [4.746936] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
> [4.753428] [drm] No driver support for vblank timestamp query.
> [4.940794] Console: switching to colour frame buffer device 274x77
> [4.995344] exynos-drm exynos-drm: fb0: frame buffer device
> [5.024573] [drm] Initialized exynos 1.0.0 20110530 on minor 0
> [5.031164] exynos-dwc3 usb@1200: no suspend clk specified
> [5.054571] usb 2-1: new full-speed USB device number 2 using exynos-ohci
> [5.159527] dwmmc_exynos 1222.mmc: Busy; trying anyway
> [5.163705] mmc_host mmc1: Timeout sending command (cmd 0x202000
> arg 0x0 status 0x0)
> -
> This is one bug. related to this changes. It stops booting waiting for
> the mmc1 card.
It seems that it failed to switch voltage.
Best Regards,
Jaehoon Chung
>
> -Anand Moon
>
>> Best regards,
>> Krzysztof
>
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On 10/12/2015 10:16 PM, Krzysztof Kozlowski wrote:
> W dniu 12.10.2015 o 22:04, Jaehoon Chung pisze:
>> On 10/12/2015 09:42 PM, Krzysztof Kozlowski wrote:
>>> W dniu 12.10.2015 o 19:46, Anand Moon pisze:
>>>> Hi Krzysztof,
>>>>
>>>> On 12
rds"). Why? There is no explanation in
>>> the commit message about this.
>>
>> I don't remember to send the patch relevant to this. Hmm...
>> Well, Is this patch really signed-off by me?
>>
>> Best Regards,
>>
>> Jaehoon Chung
>>>
>
Sandisk Ultra UHS-I class 10 card support.
>> OdroidXU3/XU4 board would not boot up using this card.
>>
>> Depending on the capability of the UHS-I card, the speed of the card
>> is selected.
>> I have just added the enhance capability feature to support them.
>
>
] mmc_host mmc1: Bus speed (slot 0) = 10000Hz (slot
> req 1Hz, actual 1HZ div = 0)
> [4.639820] mmc1: new ultra high speed SDR50 SDHC card at address
> [4.646266] mmcblk0: mmc1: SL32G 29.7 GiB
> [4.650293] IRQ56 no longer affine to CPU7
> [4.650581] CPU7: shutdown
> [4.658293] mmcblk0: p1 p2
>
> Note: Their is need to reset the PMIC
> S2MPS11_REG_L13CTRL/S2MPS11_REG_L19CTRL registers
> to support this feature consistently on every reboot.
I don't understand...why needs to reset?
I know it needs to switch the voltage, doesn't it?
Best Regards,
Jaehoon Chung
>
> -Anand Moon
>
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Hi,
On 10/12/2015 01:29 PM, Krzysztof Kozlowski wrote:
> On 12.10.2015 00:46, Anand Moon wrote:
>> From: Jaehoon Chung
>>
>> To detect sd-card use the cd-gpio method.
>> It can decrease the interrupt for detecting sd-card.
>>
>> Signed-off-by: Jaeh
Hi, Shawn.
On 10/02/2015 06:49 PM, Shawn Lin wrote:
> On 2015/10/1 17:14, Jaehoon Chung wrote:
>> Dear, All.
>>
>> I will apply patch 01-03 at my repository on today.
>> But i don't know better how i do about other patches relevant to config file.
>>
>
&g
Dear, All.
I will apply patch 01-03 at my repository on today.
But i don't know better how i do about other patches relevant to config file.
Best Regards,
Jaehoon Chung
On 09/16/2015 03:40 PM, Shawn Lin wrote:
> Synopsys DesignWare mobile storage host controller supports three
&g
Hi, Shawn.
Looks good to me.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 08/24/2015 10:25 AM, Shawn Lin wrote:
> This patch add some macros for HCON register operations
> to make code more readable.
>
> Signed-off-by: Shawn Lin
> ---
>
> Changes in v7: None
ich DMA interface to use */
> -#ifdef CONFIG_MMC_DW_IDMAC
> - host->dma_ops = &dw_mci_idmac_ops;
> - dev_info(host->dev, "Using internal DMA controller.\n");
> -#endif
> + if (trans_mode == TRANS_MODE_IDMAC) {
> + /*
> + *
On 08/27/2015 09:26 PM, Krzysztof Kozlowski wrote:
> W dniu 27.08.2015 o 18:29, Jaehoon Chung pisze:
>> Currently vmmc's property is wrong.
>> If it needs to control two supplies, then it has to use vmmc/vqmmc-supply.
>> (Card supply power and I/O Line supply Power.)
&g
Currently vmmc's property is wrong.
If it needs to control two supplies, then it has to use vmmc/vqmmc-supply.
(Card supply power and I/O Line supply Power.)
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 7 ---
1 file changed, 4 insertions(
On 08/21/2015 04:27 PM, Shawn Lin wrote:
> On 2015/8/21 14:35, Jaehoon Chung wrote:
>> On 08/21/2015 03:30 PM, Shawn Lin wrote:
>>> On 2015/8/21 14:27, Jaehoon Chung wrote:
>>>> Hi, Shawn.
>>>>
>>>> Is this based on Ulf's repository?
>
On 08/21/2015 03:30 PM, Shawn Lin wrote:
> On 2015/8/21 14:27, Jaehoon Chung wrote:
>> Hi, Shawn.
>>
>> Is this based on Ulf's repository?
>
>
> no, it's based on "https://github.com/jh80chung/dw-mmc.git
> tags/dw-mmc-for-ulf-v4.2" ：）
O
>num_slots)
> host->num_slots = host->pdata->num_slots;
> else
> - host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
> + host->num_slots = SDMMC_GET_SLOT_NUM(mci_readl(host, HCON));
Ditto. (with above.)
>
On 08/06/2015 04:31 PM, Shawn Lin wrote:
> 在 2015/8/6 15:08, Jaehoon Chung 写道:
>> Hi, Shawn.
>>
>> I remembered that Krzysztof has mentioned "Fix the title of cover letter."
>> Your cover letter's title is nothing.. "[RFC PATCH v4 0/9] " ??
>&
Hi, Shawn.
I remembered that Krzysztof has mentioned "Fix the title of cover letter."
Your cover letter's title is nothing.. "[RFC PATCH v4 0/9] " ??
[RFC PATCH v4 0/9] your title...
Best Regards,
Jaehoon Chung
On 08/06/2015 03:44 PM, Shawn Lin wrote:
> Add exter
Hi, Markus.
I have also tested on Odroid-xu3 board.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 04/08/2015 12:33 AM, Markus Reichl wrote:
> Hi,
>
> the base patch in [0] has been applied now.
>
> My patch was meanwhile
>
> Tested-by: Anand Moon
>
>
Hi,
Sorry for missing warning, and Thanks for pointing out.
Best Regards,
Jaehoon Chung
On 03/05/2015 07:02 PM, kbuild test robot wrote:
>
> Signed-off-by: Fengguang Wu
> ---
> dw_mmc-exynos.c |2 +-
> dw_mmc.c|2 +-
> 2 files changed, 2 insertio
pecific value.)
Using timing value can shift the H/W clock phase.
If invalid timing value is set, eMMC/SD/SDIO can produce the CRC error.
Do you think it can't include into device-tree?
I want to know your thinking. let me know, plz.
Best Regards,
Jaehoon Chung
>
> Rob
>
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Hi, Alim.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 01/29/2015 11:41 AM, Alim Akhtar wrote:
> From: Seungwon Jeon
>
> HS400 timing values are added for SMDK5420, exynos5420-peach-pit
> and exynos5800-peach-pi boards.
> This also adds RCLK GPIO line, this gpio sh
Hi, Alim.
Tested-by: Jaehoon Chung
Acked-by: Jaehoon Chung
I will include this patch into my tree, and i will request pull to Ulf.
Thanks!
Best Regards,
Jaehoon Chung
On 01/29/2015 11:41 AM, Alim Akhtar wrote:
> From: Seungwon Jeon
>
> Implements HS400 mode support for exynos ho
Hi, Vivek.
On 02/06/2015 02:52 PM, Vivek Gautam wrote:
> Hi Jaehoon,
>
>
> On Fri, Feb 6, 2015 at 6:48 AM, Jaehoon Chung wrote:
>> Hi, Alim.
>>
>> On my board, this patch isn't working fine.
>> So when i complete to test on my board(exynos5), i wi
Hi, Alim.
On my board, this patch isn't working fine.
So when i complete to test on my board(exynos5), i will reply with comments.
Sorry for late testing.
Best Regards,
Jaehoon Chung
On 01/29/2015 11:41 AM, Alim Akhtar wrote:
> This adds HS400 mode support for exynos dw_mmc host co
only initial time to clear the
previous status.
But i think it can be called at reboot time. (it needs to implement codes.)
how about?
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Marek Szyprowski
> ---
> .../devicetree/bindings/mmc/exynos-dw-mshc.txt | 6 +++
>
s
>> defined in that file, so i don't see the problem with including it in
>> that pinctrl file
>
> In that case I completely agree that it should be defined in the .dtsi
> but that is not what the commit message said though :-)
I will resend the patch with obvious commit m
Add sd0_rst node to exynos5420-pinctrl.dtsi.
(It's used on odroid-xu3 board)
Signed-off-by: Jaehoon Chung
---
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
b/arch/arm/boot/dts/exyno
Hi.
On 01/21/2015 11:12 PM, Alim Akhtar wrote:
> Hi Jaehoon
>
> On Wed, Jan 21, 2015 at 4:32 AM, Jaehoon Chung wrote:
>> Hi,
>>
>> If you want to enable the hs400 mode, need to add "mmc-hs400-1_8v" or
>> "mmc-hs400-1_2v".
>> But this
dts/exynos5420-pinctrl.dtsi
> index ba686e4..8b15316 100644
> --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
> @@ -201,6 +201,13 @@
> samsung,pin-drv = <3>;
> };
>
> +
lock timing for the requested speed mode*/
> + dw_mci_exynos_set_clksel_timing(host, clksel);
> +
> + /* Configure setting for HS400 */
> + dw_mci_exynos_config_hs400(host, timing);
> +
> + /* Configure clock rate */
> + dw_mci_exynos_adjust_clock(
on other exynos5/7 platform which supports emmc5.0
I will test this patch on exynos5/7 board.
Best Regards,
Jaehoon Chung
>
> Changes in V4:
> * drop the idea of changing existing binding for ciu_div as per [1]
> * addressed comments from Jaehoon Chung [2]
>
> [1
e SDMMC_CLKSEL 0x09C
> #define SDMMC_CLKSEL64 0x0A8
>
> +/* Extended Register's Offset */
> +#define SDMMC_HS400_DQS_EN 0x180
> +#define SDMMC_HS400_ASYNC_FIFO_CTRL 0x184
> +#define SDMMC_HS400_DLINE_CTRL 0
- "samsung,dw-mshc-sdr-timing", timing, 2);
> + ret = dw_mci_exynos_dt_populate_timing(host, priv->ctrl_type,
> + "samsung,dw-mshc-sdr-timing", &priv->sdr_timing);
> if (ret)
> return ret;
>
Hi, Alim.
I have also tested this patch with my board.
It's working fine. Looks good to me.
Dear, Ulf.
Could you merge this patch at your repository?
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 11/11/2014 11:14 PM, Alim Akhtar wrote:
> Hi Jaehoon,
> As 64bit dependen
ense to me, so I'm still kinda
> confused. If you want to call it good then that's your (and Ulf's)
> decision, but it's the kind of thing that would keep me up at night.
> How can this pin be high if all the regulators pulling it up are off?
> Is there a current leak so
22 whilst initialising SD card
OCR value is not matched. Which values are supported about the mmc_host's value
and card's value?
Could you share the value?
Best Regards,
Jaehoon Chung
>
> Without the patch:
>
> [ 10.866926] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (s
fset on exynos7.
If support the 64bit, dw-mmc.c need to modify.(according to v2.70, some offset
is changed for 64-bit address)
But i didn't see any patches at mailing.
Do you have the plan which send patch of dw-mmc.c?
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Abhilash Kesavan
>
On 08/28/2014 12:49 AM, Doug Anderson wrote:
> Jaehoon,
>
> On Tue, Aug 26, 2014 at 9:47 PM, Jaehoon Chung wrote:
>> Doug,
>>
>> On 08/27/2014 01:14 PM, Doug Anderson wrote:
>>> Jaehoon,
>>>
>>> On Tue, Aug 26, 2014 at 8:48 PM, Jaehoon Chung
Doug,
On 08/27/2014 01:14 PM, Doug Anderson wrote:
> Jaehoon,
>
> On Tue, Aug 26, 2014 at 8:48 PM, Jaehoon Chung wrote:
>> Hi, Doug,
>>
>> On 08/26/2014 12:25 AM, Doug Anderson wrote:
>>> Jaehoon,
>>>
>>> On Mon, Aug 25, 2014 at 1:50 AM,
to detect card insertion or removal.
>>>
>>> This patch is based off of one that Doug wrote (sent privately to
>>> Yuvaraj) which just modifies the MMC core, and should be split into
>>> two patches.
>>> One that modifies the mmc core and one that implements
Hi, Doug,
On 08/26/2014 12:25 AM, Doug Anderson wrote:
> Jaehoon,
>
> On Mon, Aug 25, 2014 at 1:50 AM, Jaehoon Chung wrote:
>> On 08/25/2014 05:13 PM, Ulf Hansson wrote:
>>> On 22 August 2014 20:27, Sonny Rao wrote:
>>>> On Fri, Aug 22, 2014 at 8:31 AM, U
the configuration may be uncommon, but you are moving from good
> hardware description to bad hardware description.
Well, i don't think it's bad hardware description. And this policy is suggested
by other mmc developers
/*return, if failed turn on vmmc*/
> + return;
> + }
> + }
> + if (!IS_ERR(mmc->supply.vqmmc) && !slot->host->vqmmc_enabled) {
Can't use the regulator_is_enabled() i
On 08/25/2014 09:09 PM, Jaehoon Chung wrote:
> On 08/25/2014 08:37 PM, Pavel Machek wrote:
>> On Mon 2014-08-25 20:28:21, Jaehoon Chung wrote:
>>> On 08/25/2014 08:21 PM, Pavel Machek wrote:
>>>> On Thu 2014-08-07 16:37:57, Jaehoon Chung wrote:
>>>>> Si
On 08/25/2014 08:37 PM, Pavel Machek wrote:
> On Mon 2014-08-25 20:28:21, Jaehoon Chung wrote:
>> On 08/25/2014 08:21 PM, Pavel Machek wrote:
>>> On Thu 2014-08-07 16:37:57, Jaehoon Chung wrote:
>>>> Since used the mmc_of_parse(), didn't parse the sub-node.
On 08/25/2014 08:21 PM, Pavel Machek wrote:
> On Thu 2014-08-07 16:37:57, Jaehoon Chung wrote:
>> Since used the mmc_of_parse(), didn't parse the sub-node.
>> So we can remove the sub-node, because almost SoC used the only one card per
>> a host.
>> And support
;>
>> This patch is based off of one that Doug wrote (sent privately to
>> Yuvaraj) which just modifies the MMC core, and should be split into
>> two patches.
>> One that modifies the mmc core and one that implements this in dw_mmc.
>
> I looked at the mmc core part
Hi, Kukjin
On 08/19/2014 01:54 AM, Kukjin Kim wrote:
> On 08/18/14 09:10, Andreas Färber wrote:
>> Hi Jaehoon,
>>
>> Am 18.08.2014 14:23, schrieb Jaehoon Chung:
>>> Socfpga and Rockchip were queued into each SoC tree.
>>> I want to know whether this patch
Hi, Kukjin.
Socfpga and Rockchip were queued into each SoC tree.
I want to know whether this patch is queued or not into Samsung-Soc tree.
Do you have any other plan for this patch?
Best Regards,
Jaehoon Chung
On 08/07/2014 04:38 PM, Jaehoon Chung wrote:
> dw-mmc controller can support multi
se recommended reset
>> procedure"
>>
>> Acked-by: Seungwon Jeon
>>
>> Thanks,
>> Seungwon Jeon
>
> I saw that Ulf applied "mmc: dw_mmc: change to use recommended reset
> procedure". Could we apply this one now, too? Do you want
Hi,
I remembered that this patch was pushed at Ulf's tree.
Since dw_mci_idmac_reset() is located into #if CONFIG_MMC_DW_IDMAC,
it occurred the compiler error.
And it seems that didn't need to use "IS_ENABLED()" at there.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chu
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 15 ---
arch/arm/boot/dts/rk3188-radxarock.dts |7 ++-
2 files cha
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
---
arch/arm/boot/dts/exynos4412-odroid-common.dtsi |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++--
arch/arm/boot/dts/exynos4412-trats
Almost all SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpg
- Fix the wrong bus-width value.
- Use the slot->host->quirks instead of brq->quirks.
- Add tested-by and reviewd-by.
Changelog V2:
- Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to
host's quirk"
Jaehoon Chung (5):
m
Slot quirks "disable-wp" is deprecated.
Instead, use the host quirk "disable-wp".
(Because the slot-node is removed in dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
---
drive
about?
And I want to know who can apply this patch-set(#3~#5).
Best Regards,
Jaehoon Chung
On 08/01/2014 03:36 AM, Kukjin Kim wrote:
> On 08/01/14 01:02, Doug Anderson wrote:
>> Jaehoon
>>
>> On Wed, Jul 30, 2014 at 10:35 PM, Jaehoon Chung
>> wrote:
>>> Sl
Slot quirks "disable-wp" is deprecated.
Instead, use the host quirk "disable-wp".
(Because the slot-node is removed in dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c | 11 +--
include/linux
t;quirks instead of brq->quirks.
- Add tested-by and reviewd-by.
Changelog V2:
- Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to
host's quirk"
Jaehoon Chung (5):
mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.
m
Almost all SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/a
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpg
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts
Almost SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon
w_mmc: replace "disable-wp" from slot's quirks to
host's quirk"
Jaehoon Chung (5):
mmc: dw_mmc: modify the dt-binding for removing slot-node and
supports-highspeed
ARM: dts: exynos: unuse the slot-node and deprecated the
supports-highspeed for dw-mmc
ARM: d
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/bo
Replaced the "disable-wp" into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c |8 +++-
include/linux/mmc/dw_mmc.h |2 ++
2 files changed, 9 i
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpg
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++-
Hi, Doug.
Thanks for review.
On 07/30/2014 03:01 AM, Doug Anderson wrote:
> Jaehoon,
>
> On Sun, Jul 27, 2014 at 7:29 PM, Jaehoon Chung wrote:
>> Replaced the "disable-wp" into host's quirks.
>> (Because the slot-node is removed at dt-file.)
>>
>
Replaced the "disable-wp" into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c | 12 +---
include/linux/mmc/dw_mmc.h |6 ++
2 files change
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++-
Almost SoCs use one slot per host controller.
(Even if controller can support the multiple slot, Recommend to use one slot
per host controller.)
Don't use the slot-node and deprecate the "supports-highspeed" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon
Fix the wrong bus-width value.
- Use the slot->host->quirks instead of brq->quirks.
- Add tested-by and reviewd-by.
Changelog V2:
- Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to
host's quirk"
Jaehoon Chung (5):
mmc:
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/bo
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpg
Hi, Andreas,
On 07/25/2014 09:11 PM, Andreas Färber wrote:
> Hi Jaehoon,
>
> Am 25.07.2014 03:11, schrieb Jaehoon Chung:
>> Almost Soc is used the slot per a host.
>
> Something's very wrong with this sentence. What are you trying to say?
> Almost all SoCs use one
Replaced the "disable-wp" into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c | 12 +---
include/linux/mmc/dw_mmc.h |6 ++
2 files change
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Acked-by: Seungwon Jeon
Acked-by: Dinh Nguyen
---
arch/arm/boot/dts/socfpga_arria5.dtsi |9 +++--
arch/arm/boot/dts/socfpga_cyclone5.dtsi |9 +++--
arch/arm/boot/dts/socfpg
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/bo
Almost Soc is used the slot per a host.
Don't use the slot-node and deprecated the "supports-highsped" property.
Instead, use the cap-mmc/sd-highspeed.
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++-
nstead of brq->quirks.
- Add tested-by and reviewd-by.
Changelog V2:
- Add the "mmc: dw_mmc: replace "disable-wp" from slot's quirks to
host's quirk"
Jaehoon Chung (5):
mmc: dw_mmc: modify the dt-binding for removing slot-node and
supports
oblem.
And it's also degraded the performance since add the overhead.
I'm using "clkgate-delay = 3 ~ 10".
Anyway, we need to fix this. I will consider this.
Best Regards,
Jaehoon Chung
On 06/25/2014 12:52 AM, Tomasz Figa wrote:
> Hi Daniel,
>
> [adding Ulf, Chris an
Looks good to me.
Acked-by: Jaehoon Chung
On 06/24/2014 10:57 PM, Tomasz Figa wrote:
> For internal card detection mechanism it is required that the local I/O
> clock is always running. However while current implementation accounts
> for this, it does so incorrectly leading to race c
On 07/12/2014 05:53 AM, Sonny Rao wrote:
> This patch changes the fifo reset code to follow the reset procedure
> outlined in the documentation of Synopsys Mobile storage host databook.
>
> Signed-off-by: Sonny Rao
> Signed-off-by: Yuvaraj Kumar C D
> ---
> v2: Add Generic DMA support
> per
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
Acked-by: Kukjin Kim
---
arch/arm/boot/dts/exynos4412-odroidx.dts |8 ++--
arch/arm/boot/dts/exynos4412-origen.dts |8 ++-
Replaced the "disable-wp" into host's quirks.
(Because the slot-node is removed at dt-file.)
Signed-off-by: Jaehoon Chung
Tested-by: Sachin Kamat
Acked-by: Seungwon Jeon
---
drivers/mmc/host/dw_mmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff
ot; from slot's quirks to
host's quirk"
Jaehoon Chung (5):
mmc: dw_mmc: modify the dt-binding for removing slot-node and
supports-highspeed
ARM: dts: exynos: unuse the slot-node and deprecated the
supports-highspeed for dw-mmc
ARM: dts: socfpga: unuse the slot-nod
mmc-highspeed".
Signed-off-by: Jaehoon Chung
Reviewed-by: Tushar Behera
Reviewed-by: Ulf Hansson
Reviewed-by: Heiko Stuebner
Acked-by: Seungwon Jeon
---
arch/arm/boot/dts/rk3066a-bqcurie2.dts | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/arch/arm/bo
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